| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch reduces redundant condition checking in connecting
or disconnecting UART TX.
BUG=none
BRANCH=cr50
TEST=manually checked ccd state with/without servo connection and/or
ccd connection.
[AFTER]
> ccdstate
AP: on
AP UART: on
EC: on
Rdd: connected
Servo: connected
CCD EXT: enabled
State flags: UARTAP UARTEC
CCD ports blocked: (none)
> ccdstate
AP: on
AP UART: on
EC: on
Rdd: disconnected
Servo: connected
CCD EXT: disabled
State flags:
CCD ports blocked: (none)
> ccdstate
AP: on
AP UART: on
EC: on
Rdd: connected
Servo: undetectable
CCD EXT: enabled
State flags: UARTAP+TX UARTEC+TX I2C SPI
CCD ports blocked: (none)
> ccdstate
AP: off
AP UART: off
EC: on
Rdd: connected
Servo: undetectable
CCD EXT: enabled
State flags: UARTEC+TX I2C SPI
CCD ports blocked: (none)
> ccdstate
AP: on
AP UART: on
EC: on
Rdd: connected
Servo: disconnected
CCD EXT: enabled
State flags: UARTAP+TX I2C SPI
CCD ports blocked: EC
> ccdstate
AP: on
AP UART: on
EC: on
Rdd: connected
Servo: disconnected
CCD EXT: enabled
State flags: I2C SPI
CCD ports blocked: AP EC
> ccdstate
AP: on
AP UART: on
EC: on
Rdd: connected
Servo: ignored
CCD EXT: enabled
State flags: UARTAP+TX UARTEC+TX I2C SPI
CCD ports blocked: IGNORE_SERVO
WARNING: enabling UART while servo is connected may damage hardware
Change-Id: Icea2978b15e15bbf7cea8e48fd2bf4fdecc78f46
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2013823
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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This change introduces a mechanism which allows to use one of board
strap pins as the CCD gpio and makes DIOA9 the CCD pin on boards with
strap os 0xE.
This change uses 2 bits from the board properties to determine which pin
is used as the ccd gpio.
0 - no ccd gpio
1 - DIOA1
2 - DIOA9
3 - DIOA12
DIOA6 is another strap pin, but there's only one valid strap with a 5kPU
left, so I decided not to use another board property bit to support it
as a possible ccd gpio. I want to save the board property bit, since
we're running out of them and there are so many other I2C straps boards
can use. We can add it later if we need to.
BUG=b:147812066
BRANCH=cr50
TEST=manual. Use pinmux and gpiocfg to verify the output is only enabled
when the gpio is asserted.
no added brdproperties - nothing is different with pinmux
run on Puff
gpioset CCD_REC_LID_SWITCH 0
EC shows recovery button pressed
gpioset CCD_REC_LID_SWITCH 0
EC shows recovery button released
add BOARD_CCD_REC_LID_PIN_DIOA1 to SPI board
pinmux output adds
DIOA1 27 IN GPIO1_GPIO10
GPIO1_GPIO10 24 DIOA1
gpioset CCD_REC_LID_SWITCH 0
gpiocfg shows "GPIO1_GPIO10: read 0 drive 0"
gpioset CCD_REC_LID_SWITCH 1
gpiocfg doesn't show GPIO1_GPIO10 as an output
add BOARD_CCD_REC_LID_PIN_DIOA9 to SPI board
pinmux output adds
DIOA9 27 IN GPIO1_GPIO10
GPIO1_GPIO10 16 DIOA9
gpioset CCD_REC_LID_SWITCH 0
gpiocfg shows "GPIO1_GPIO10: read 0 drive 0"
gpioset CCD_REC_LID_SWITCH 1
gpiocfg doesn't show GPIO1_GPIO10 as an output
add BOARD_CCD_REC_LID_PIN_DIOA12 to I2C board
pinmux output adds
DIOA12 27 IN GPIO1_GPIO10
GPIO1_GPIO10 13 DIOA12
gpioset CCD_REC_LID_SWITCH 0
gpiocfg shows "GPIO1_GPIO10: read 0 drive 0"
gpioset CCD_REC_LID_SWITCH 1
gpiocfg doesn't show GPIO1_GPIO10 as an output
Change-Id: If74385135a572e7e5d0763fad9f5368fdec8d7a0
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2006210
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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This CL add a board property indicating EC-CR50 communication
support. The target boards are Volteer,Dedede,Puff, and Zork.
It shall be detected if the H1 strap configuration value is
either 0x0E or 0xE0.
BUG=b:146567516, chromium:1027660
BRANCH=cr50
TEST=Flashed AP firmware through CCD on Grunt, Octopus, Scarlet
and Atlas.
This is the captured console log:
--- UART initialized after reboot ---
...
strap pin readings: a1:2 a9:2 a6:0 a12:0
[0.005886 Valid strap: 0xa properties: 0x41]
> brdprop
properties = 0x1141
> brdprop
properties = 0x201141
> pinmux
...
400600b0: DIOB2 2 IN GPIO0_GPIO1
400600b8: DIOB3 3 IN GPIO0_GPIO2
400600c0: DIOB4 0 IN PD
...
40060100: GPIO0_GPIO2 7 DIOB3
...
40060120: GPIO0_GPIO10 6 DIOB4
Flashed AP firmware on a reworked board with 1M ohm on DIOA1 and
5k ohm on DIOA9.
This is the captured console log:
--- UART initialized after reboot ---
...
strap pin readings: a1:2 a9:3 a6:0 a12:0
[0.005886 Valid strap: 0xe properties: 0x200041]
> brdprop
properties = 0x201141
> pinmux
...
400600b0: DIOB2 2 IN GPIO0_GPIO1
400600c0: DIOB4 3 IN PD GPIO0_GPIO2
...
40060100: GPIO0_GPIO2 6 DIOB4
...
40060120: GPIO0_GPIO10 6 DIOB4
Change-Id: If60765190a385a0e728177911b1ec738c6a00d99
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1979612
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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There is no need to keep the code supporting chip factory mode in
Chrome OS production branches, this code is never used outside of the
chip factory environment.
BRANCH=cr50, cr50-mp
BUG=none
TEST=built an image, verified that an Atlas device boots up into the
previously created Chrome OS account.
Change-Id: If72635b014d15ef6e97fbc4fd5b54b61ec23299a
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1994369
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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The only board which would be built from this branch is Cr50. bds,
fizz and host boards are necessary for proper make infrastructure
operation and tests.
lm4 and npcx are chips used by the bds and fizz boards, so they are
also kept around.
BRANCH=cr50, cr50-mp
BUG=b:145912698
TEST='make buildall -j' succeeds
Change-Id: I937b2b8642c1fe91578fc9615438ae22c165b20f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1986942
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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It takes 14.5 ms to decrypt two 12K flash spaces into SRAM, then
calculate their hash to see if either one is is a valid NVMEM
space.
There is no need for this check when the 'other' Cr50 image is newer
than {3,4}.18.
BRANCH=Cr50, Cr50-mp
BUG=b:132665283
TEST=with added instrumentation verified that in case the other slot
is occupied by 0.0.22 image, the check takes 14.5 ms, when the
other slot is occupied by 0.4.23 image the check takes 8 us.
Change-Id: I0414ca3d7e90d343589a21e91319f35479632eff
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1967543
Reviewed-by: Keith Short <keithshort@chromium.org>
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Change the OWNERS to cr50 team members and remove OWNERS files from all
subdirectories.
BUG=none
BRANCH=none
TEST=none
Change-Id: I5ddff7c433a55b6724d92c026e9e64e82e1492ad
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957850
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Cr50 firmware is required to update the rollback prevention map in
INFO1 for both RO and RW images.
This patch adds code to display the state of the RO map and both RO_A
and RO_B headers in addition to previously reported RW information.
BRANCH=cr50, cr50-mp
BUG=b:136284186
TEST=loaded the new image and observed reported rollback state:
> sysinfo
...
Rollback: 0/1/1 0/128/128
...
Change-Id: I32206545b6a59a5693e4274e62fcf0627780f61f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949546
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
(cherry picked from commit 565c54c270bd93ee30e8f8560d3d1691d128e762)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954341
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Added definition of FWMP_DEV_FIPS_MODE matching same definition in vboot.
Support function board_fwmp_fips_mode_enabled() introduced to read
it's status. It's not currently used, but will be consumed by
FIPS code.
BUG=b:138577491
BRANCH=cr50
TEST=make BOARD=cr50
Change-Id: Iebf672cfebfeb18ae62892097fbf1fa30a770338
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1950813
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
(cherry picked from commit bf8241699ba35984887e3f1a71d29ea1e92b21fe)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954340
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
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DCRYPTO_gcm_init hardcoded key length to 128 bit causing preventing
testing of 192 and 256 bit functionality for AES-GCM.
BUG=b:135623371
BRANCH=cr50
TEST=compile, specific test for issue as described in bug
Change-Id: I4fc41f6155661709115c57aa944c8976e17bffac
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1766098
Reviewed-by: Andrey Pronin <apronin@chromium.org>
(cherry picked from commit 24f7511e41c1f8140b19d69d9440a3ea6f91bd89)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954339
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
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The new RW dev key does not follow the existing convention of bit 0x4
set in prod Key ID and unset in dev key ID.
The suggested approach is to check values of some key manager
registers to determine if the device is running in fully configured
prod mode or not.
BRANCH=cr50, cr50-mp
BUG=b:144455990
TEST=tried running this patch on a node locked image:
> sysinfo
...
RO keyid: 0xaa66150f
RW keyid: 0x334f70df
...
Key Ladder: dev
Change-Id: I73088ce44a8b8bf8e11a0d240d07152b49a3225b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1915504
Reviewed-by: Andrey Pronin <apronin@chromium.org>
(cherry picked from commit 74237689eb277bf1fe0e682cb256825508fa511f)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954338
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Simplified the usb_mux_get() function and made the MUX info
prints same as in ectool.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Iefb16e1dbd323afbe248b06fe9c53abc63be9a67
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1931284
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The schematic has changed to 9.31k / 47k resistors on this input.
BUG=b:1829597655
TEST=still builds
BRANCH=None
Change-Id: I2856df05b2611edd30d497a35bb871b8f5b173e9
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1935467
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
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treeya need support three new batteries
--SMP:L19M3PG1
--LGC:L19L3PG1
--Celxpert:L19C3PG1
The same manufacturer(SMP) has two kinds of
batteries, manuf_name can't specify the unique
battery, so need to check device_name.
BUG=none
BRANCH=none
TEST=boot treeya board with new batteries,
charging/discharging/cutoff work as expected.
Change-Id: I09e2a68961e5df92c6b6d639963ac8894eb7ec20
Signed-off-by: xiaoqiang.zhu <xiaoqiang.zhu@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1933788
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Peichao Li <peichao.wang@bitland.corp-partner.google.com>
Tested-by: Peichao Li <peichao.wang@bitland.corp-partner.google.com>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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BUG=none
BRANCH=none
TEST=none
Change-Id: I7cd71e246708dd4423b7fc3021a644e2988e2771
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1930868
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:141259174
BRANCH=hatch
TEST=faninfo can see the 2nd fan works with console.
2019-11-22 14:23:55 Fan 0 Actual: 3309 rpm
2019-11-22 14:23:55 Fan 0 Target: 3291 rpm
2019-11-22 14:23:55 Fan 0 Duty: 42%
2019-11-22 14:23:55 Fan 0 Status: 2 (locked)
2019-11-22 14:23:55 Fan 0 Mode: rpm
2019-11-22 14:23:55 Fan 0 Auto: yes
2019-11-22 14:23:55 Fan 0 Enable: yes
2019-11-22 14:23:55 Fan 0 Power: yes
2019-11-22 14:23:55
2019-11-22 14:23:55 Fan 1 Actual: 3101 rpm
2019-11-22 14:23:55 Fan 1 Target: 3291 rpm
2019-11-22 14:23:55 Fan 1 Duty: 37%
2019-11-22 14:23:55 Fan 1 Status: 2 (locked)
2019-11-22 14:23:55 Fan 1 Mode: rpm
2019-11-22 14:23:55 Fan 1 Auto: yes
2019-11-22 14:23:55 Fan 1 Enable: yes
Change-Id: I88aa8efcbb55d8a64ae51c68b5a142e5a4997f46
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1928542
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Adjust current=4ma, pwm=1/32, and change the state as:
charging is blue
charged full is green
low battery is red
BUG=b:137618886
BRANCH=kukui
TEST=Do a full charging test, notice LED indicator status under
different charge state
Change-Id: Ic1b7a99ab3edaee5c92a5cae56bc6d9a321e9c23
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918995
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Tested-by: Kook Zhang <zhangbinbin@huaqin.corp-partner.google.com>
Commit-Queue: Leo Zhou <zhoubo@huaqin.corp-partner.google.com>
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The module ID in alternate function setting for spi
master should be corrected as MODULE_SPI_MASTER.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Ib52b09a5f1e0c496374d4ed2f3a222dab9af2eb0
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1868133
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:144886704
BRANCH=hatch
TEST=make buildall
Change-Id: I0d520a5c375a2b47c55a335da91f556ccfd59c29
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1928422
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
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There is an error where SYS_RST_ODL is assigned to GPIO02 where it is
actually assigned to GPIOC5 in the schematics. This should cause AP
reset to fail from the ec console.
BUG=b:141476349
BRANCH=hatch
TEST=None (I don't have a hatch board to test this out on)
Change-Id: I855a65489ce974ee92be4bf51a83d5af40e4e2da
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1928421
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
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A new temperature sensor is added to Dratini/Jinlon boards, close to the
CPU. It is used to support the fan control.
BUG=none
BRANCH=hatch
TEST=temp command in EC console
Change-Id: Icd5974133da5e1aec81f2201f87e1b83b79c6169
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1925802
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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This patch chagnes TCPC port 0 from ANX7447 to PS8751, It includes the gpio
name, function name and reset signal.
BUG=none
BRANCH=hatch
TEST=make sure tcpc port 0 is workable.
Change-Id: I698d70750727080f46cffdc136ffd8a54967ca89
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918984
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
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This is an initial commit for Trogdor. Use Cheza as a baseline.
Make the change according to the schematic, e.g.
* Reflect the GPIO change
* Reflect the TCPC/PPC part change
* Update the USB topology, e.g. no device mode support
* Remove the detachable related code
* Add keyboard support
* Support keyboard backlight
* Update the battery characteristic
* Add initial support of muxing DP path
* Support a single USB-A port
* Change sensors from lid to base
* Minor code style improvement
BRANCH=None
BUG=b:143616352
TEST=BOARD=trogdor make
Change-Id: Ia9bb0adfcb8d347e6335fd3ae1e565b0f9d1a025
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1847204
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I7fe9ab23254dbd8515936d10ad6782305e76236c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1925173
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Disable CONFIG_BRINGUP option now that the AP power up sequence is
working. Also change the default console mask to disable CC_HOSTCMD,
which is flooded with motion sense requests (0x60) from the kernel.
BUG=b:142409811
BRANCH=none
TEST=make buildall
TEST=verify Volteer boots to OS automatically.
Change-Id: I58f850188ca3981373af06369eb70c5887c7da31
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1919402
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Updated cr50 owners to reflect current status.
BUG=none
TEST=none
BRANCH=cr50
Change-Id: Iac77303a0192af3a40fda598392cbd774f5f3270
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1924781
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
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Need to use polling mode for lsm6dsm on tgl rvp.
BUG=b:141519691
BRANCH=none
TEST=tested on tgl rvp
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Change-Id: I1161e0c38c81f8205e28ae2428224a9e6552e820
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1916680
Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
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This change refactors the lsm6dsm to allow building without the
use of the FIFO or sensor interrupts.
BUG=None
BRANCH=None
TEST=make buildall
Change-Id: I5b338d81061f25fd1c8209b4555f63ea4d8b2dbc
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1916679
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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No code depending on this define is relevant for Cr50, it was added to
this board file by mistake.
BRANCH=cr50, cr50-mp
BUG=none
TEST=size of the generated Cr50 image remains the same before and
after this patch.
Change-Id: I31d5bffdc9b5109f1d4bb929dea66834a3bfa660
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1925681
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Counter implementation has been moved to the AP, no need to keep space
for it in the flash.
BUG=b:65253310
BRANCH=cr50, cr50-mp
TEST=generated image uses 2048 bytes less than before this patch.
Change-Id: I8225e9923932ce06ca0a4333c06508cf7d7c70d8
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1753677
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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Clone form CL:1916160
BUG=none
BRANCH=none
TEST=make BOARD=kappa
Change-Id: I18905f7ace402debf1fad93e72b8a86ee27d1f50
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918986
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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Enable simple GPIO control of the fan. Still need to add PWM controls
once a smart fan is available.
BUG=b:140582490
BRANCH=none
TEST=make buildall
TEST=verify fan turns on when exiting G3 and turns off before entering
G3.
Change-Id: I3ec5b36fd5c7ca607f03efa9a76f8dc2efacbb22
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1924503
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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BUG=b:140578872
BRANCH=none
TEST=USB2.0 & USB3.0 device detected over Type-C port 0
Change-Id: I44790aac3543589c32dcd60f84e4e67d5d76cdab
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1922752
Reviewed-by: Keith Short <keithshort@chromium.org>
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Fix Matrix to rotate lid sensor into standard reference frame
BUG=b:144569069
make BOARD=drallion_ish and copy ec.bin to /lib/firmware/intel/drallion_ish.bin
Verify by rotate DUT. Make sure correct direction.
Change-Id: I703317aa71c44f24e28cba7eb7714d69513b654a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1923631
Reviewed-by: Selma Bensaid <selma.bensaid@intel.corp-partner.google.com>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Antony Wang <antony_wang@compal.corp-partner.google.com>
Tested-by: Mathew King <mathewk@chromium.org>
Tested-by: Antony Wang <antony_wang@compal.corp-partner.google.com>
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Added support for SHA-384 and SHA-512 testing by providing direct access
to algorithms using TPM extension commands enbaled with CRYPTO_TEST=1.
This is used by ACVP tests for completness of SHA2 coverage. ACVP tests
to be added separately.
BUG=none
BRANCH=cr50
TEST=make BOARD=cr50 CRYPTO_TEST=1 -j
Change-Id: I3152d5186a5488793f6487ec5d50acdec2813c77
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1910525
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
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Some servo micros will fail to jump to RW if we leave the USART hardware
modules active during the RW jump and the RW jump tries to change the
gpio flags to anything other than alternate in gpio.inc.
We would like the state transition from RO to RW to be as clean as
possible, so shutdown the hardware modules that RW will reinitialize in
board_init right after the jump
BRANCH=servo
BUG=b:144356961
TEST=flash this image on a bad servo micro, the remove then change
GPIO_ALTERNATE to GPIO_INPUT and reflash and see that it sauce's fully
flashes from then on
Change-Id: I81fcbbcda9f63761a719f6e0cb6bb4cf6962f18f
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1922240
Tested-by: Brian Nemec <bnemec@chromium.org>
Reviewed-by: Brian Nemec <bnemec@chromium.org>
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
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Added IT8801 io expander (which includes keyboard controller) and
the keyscan task.
BUG=b:133200075
TEST="it8801_dump" should check presence of the IT8801 chip
TEST="ksstate on", press keys, see keyboard log things being printed on console
BRANCH=master
Change-Id: I08e7312cec59b6d293c01daf40b2f784a10b7e72
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1693863
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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BUG=b:143188569
TEST=make buildall still succeeds
BRANCH=none
Change-Id: I9193878c65b20293fad5914af88ea4e49be369a8
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913939
Reviewed-by: Andrew McRae <amcrae@chromium.org>
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Change battery discharging max temperature from 60 to 70.
BUG=b:143910072
BRANCH=master
TEST=flash EC and check battery charging.
Change-Id: Ia5a6a7c565e96e880715c6a03727c51a70dcab7c
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1806175
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Let's make sure any change to files used explicitly in Cr50 are
approved by relevant persons.
BRANCH=none
BUG=none
TEST=none
Change-Id: If6affd837063311e3215e7596a3a424dc56c7603
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1919649
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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Enable the CONFIG_BATTERY_CHECK_CHARGE_TEMP_LIMITS option so that
when charging stops due to battery overtemperature, the battery LED
will be green regardless of the state of charge of the battery.
BUG=b:140596424
BRANCH=None
TEST=`make -j BOARD=kohaku && ./util/flash_ec --board=kohaku`
Ensure battery is not fully charged
LED is blue
Plug in AC adapter
LED is still blue
Close lid
LED turns red
Access EC console
> batttempfake 3300
This overrides the normal temperature read and forces the value to
330.0 K, which is 56.9 C. The Kohaku battery has a maximum charge
temperature of 55 C, and a maximum discharge temperature of 60 C,
so this temperature is hot enough to stop charging, but not so hot
that the system will shut down.
LED turns green
Unplug the power adapter
LED turns off
Plug in the power adapter
LED turns green
> batttempfake -1
LED turns red
Unplug the power adapter
LED turns off
Plug in the power adapter
LED turns red
Unplug the power adapter
LED turns off
> batttempfake 3300
Plug in the power adapter
LED turns green
Change-Id: Ie9f5032fbb5666b02bec86d3f7f474d30e759338
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1919401
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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Should enable charge first then the charge port can function normally.
Besides, for device using mt6370 and in force discharge mode,
mt6370 would receive a DPDM detach event and release BC1.2
charge supply info. We should force BC1.2 detection again to
recognize BC1.2 device again.
TEST=on krane 'ectool chargecontrol discharge;
ectool chargecontrol normal' and see the charge is
charging.
BUG=b:143045248
BRANCH=kukui
Change-Id: I72481dfddf48b1e274d8d81f8d9223ccb8295c72
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1916160
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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This change ensure the eDP backlight control is driven high so that the
PCH can turn the backlight on and off. Still need to add controls to the
EC to turn the backlight off.
BUG=b:144520387
BRANCH=none
TEST=make buildall
TEST=verify backlight on Volteer
Change-Id: Idb075781dc358c5c7a6fe68f828a28407b92c94d
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918005
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Add config for INA3221 power monitor sensors.
BRANCH=none
BUG=b:144127082
TEST=EC buildall
Change-Id: I87b3da86403b0ec7314b4084bc710c59f019930d
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1915481
Tested-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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- Update the GPIO and USB/I2C port lists following the Endeavour schematic
- Endeavour does not use a software-controlled TCPC so remove USB PD
- Remove LED panel
- Remove CEC
- Add OEM_ID
BUG=b:143780700
TEST=emerge-endeavour chromeos/ec
Change-Id: Idb554a4f87369ea1c42de0a1532ce11d28e4da56
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1902407
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Jeff Chase <jnchase@google.com>
Tested-by: Jeff Chase <jnchase@google.com>
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Change the names of the temperature sensors as displayed by the EC
to indicate what they are sensing, not just Temp1/2/3/4.
BUG=None
BRANCH=None
TEST=`make -j BOARD=kohaku && ./util/flash_ec --board=kohaku`
After programming, run the 'temps' command and see that the temperature
sensors are named according to what they are measuring, not Temp1/2/3/4.
Change-Id: Ifca845143e00acb721a06a31f7a2b725fe48a50e
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913324
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Fix space/tab indents to match the rest of the file
BUG=None
BRANCH=None
TEST=n/a
Change-Id: Idf162fc7ac4777212991ab6b7897242b973a282a
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913391
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Need to cleanup naming around USBC Retimers for adding
PI2DPX1207 code
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I7e18e0abbe5bfd89bf0e20fa7b5174669689778f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911296
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Copy jaccuzi for kappa EC image. Below CLs will come after this CL merged.
1. Battery configration.
2. Implement leds.
BUG=b:144388520
BRANCH=none
TEST=make BOARD=kappa
Change-Id: Ica52cc6ddaf5d7bc6c94a11525584edad0258c00
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913943
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Fixes: commit 2f2a81079191ca "Add double tap and make motion sense wake up ap"
CONFIG_GESTURE_DETECTION_MASK includes significant motion in activity
list. We cannot use it for double tap.
Add more flags to distinguish it.
BUG=b:135575671
BRANCH=kukui
TEST=AP can receive mkbp event when double tap is triggered
Change-Id: I13776a01b14dc251396a615c8c97353f2d0477d4
Signed-off-by: Heng-Ruey Hsu <henryhsu@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1911263
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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