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* willow: Support new battery AP19B8KDavid Huang2020-09-112-0/+29
| | | | | | | | | | | | | Add new battery config : AP19B8K. BUG=b:166225039 BRANCH=master TEST=Check found battery info in console and cutoff work. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I80ee052832dd03eb985fa746b7c3565ce11fbbad Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2400548 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* Meep: Enable SSFC for PPC on C1 portDevin Lu2020-09-102-17/+56
| | | | | | | | | | | | | | BRANCH=firmware-octopus-11297.B BUG=none TEST=Set SSFC value for SYV682x and NX20P348x for two daughterboards. Make sure port can be charged. Remove SSFC field and make sure board is able to recongize correct ppc type by PPC ID. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I1be1c5cf23f1fd7f049fdc3879f16334547ec16a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396097 Reviewed-by: Marco Chen <marcochen@chromium.org>
* Octopus: Add SSFC field for PPCDevin Lu2020-09-101-3/+3
| | | | | | | | | | | | | | Octopus already supported SSFC with CL:2377058. This patch extends SSFC field of CBI for PPC. BRANCH=firmware-octopus-11297.B BUG=none TEST=EC log of Meep device can output value of SSFC in CBI. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I1d0815a29673d535e53fdb7efe6b756999bc9f3a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396096 Reviewed-by: Marco Chen <marcochen@chromium.org>
* Meep: Set SYV682x high voltage path ilimit to 5.5ADevin Lu2020-09-101-0/+2
| | | | | | | | | | | BUG=b:162221222 BRANCH=firmware-octopus-11297.B TEST=EC console ppc_dump <port> to make sure setting. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I3840e6a86563d2e7faa6eb3c12c51925718ef306 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396098 Reviewed-by: Marco Chen <marcochen@chromium.org>
* Meep: Fix triggering condition for PPC interrupt of SYV682ADevin Lu2020-09-102-10/+23
| | | | | | | | | | | | | | Apply CL:2309522 to meep. BUG=none BRANCH=firmware-octopus-11297.B TEST=1. make BOARD=meep. 2. Verify USBC charger is able to charging. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I7407e360bb1521e4a9c5be38111508545a970733 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396095 Reviewed-by: Marco Chen <marcochen@chromium.org>
* voxel:Switch RT1715 TCPC for TUSB422Ben Chen2020-09-102-29/+32
| | | | | | | | | | | | | | | Replace the TUSB422 driver/I2C address with the RT1715 of C0/C1 type-C port by BOARD version define BUG=b:165765710 BRANCH=master TEST=check usb and DP function workable. Change-Id: Id53e4b05e9a5509e8af9eb7ffff35c2941899104 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2389725 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Volteer: Add support for RT1715Eric Herrmann2020-09-091-1/+30
| | | | | | | | | | | | | | | | | | | Add support for replacing the TUSB422 with the RT1715. Since they are pin-to-pin compatible and currently only used with a rework, make the decision of which to use at runtime. The logic is to check if the RT1715 is both on the I2C bus and the vendor ID matches. If either fail, default to the TUSB422 address and driver. BUG=b:162617664 TEST=make buildall TEST=check both TUSB422 functionality and RT1715 functionality BRANCH=none Change-Id: I8306f086bf030ddd7238532b1f12aa259cb72422 Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343734 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* ec: remove "sushi" variant.Paul Fagerburg2020-09-097-1026/+0
| | | | | | | | | | | | | | | | | Sushi is not a real product, just a test of the new_variant program. The effort to keep it up-to-date with the rest of Hatch is no longer worth it. Remove the variant. BUG=b:168030592 BRANCH=None TEST=hatch-cq builds successfully Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Cq-Depend: chrome-internal:3259091, chromium:2398781 Change-Id: I161bff8ba529b94aaaa9a119155cc2962c686d36 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2399199 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
* Woomax: Set HDMI_DATA_EN_DB low after pi3hdx1204_enableEdward Hill2020-09-091-1/+2
| | | | | | | | | | | | | | | | Setting HDMI_DATA_EN_DB low to make PI3HDX1204 go into power down mode before pi3hdx1204_enable would give "pi3hdx1204 enable failed: 1" error. BUG=none BRANCH=zork TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ief512912c7d048c4ac66dfed62e3d42b0bba4214 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2401580 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* Ezkinil: Set HDMI_DATA_EN_DB low after pi3hdx1204_enable doneSue Chen2020-09-091-1/+2
| | | | | | | | | | | | | | | | | Setting HDMI_DATA_EN_DB low to make PI3HDX1204 go into power down mode before pi3hdx1204_enable would got "pi3hdx1204 enable failed: 1" error. BUG=none BRANCH=zork TEST=EC log doesn't show "pi3hdx1204 enable failed: 1" while the DUT is entering S3. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I1a54264ebe515acd8ff334fee47f7e46ddffdd4f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397935 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* Dedede: Define GPIO_USB_C1_INT_ODL for all variantsDiana Z2020-09-095-0/+24
| | | | | | | | | | | | | | | | | Naming for the C1 interrupt line varies slightly between variants due to schematic name differences, and version or functional differences. This change ensures all boards have GPIO_USB_C1_INT_ODL defined for baseboard code to reference. BRANCH=None BUG=b:153684907 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I9303be2f9f142eed249da4f2f5e660985ceb7fdd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391213 Tested-by: Divagar Mohandass <divagar.mohandass@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Revert "Waddledoo: Add thermistors"Sooraj Govindan2020-09-092-27/+0
| | | | | | | | | | | | | | | | This reverts commit e834efc7488bc98211084f54fad9da9b584daec1. Reason for revert: DUT fails to enter G3 state on shutdown BUG=b:164202851, b:163486924 BRANCH=None TEST=Verify DUT entering into G3 after shutdown. Change-Id: I67876ec7ed22526770ac38e261b5b1903bcb6476 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397934 Tested-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Fennel: Add batterys for fennel.Aaron Zhang2020-09-092-76/+51
| | | | | | | | | | | | | | | Add L20L3PG2,L20D3PG2,L20M3PG2 battery information for fennel. BUG=b:163110890 BRANCH=master TEST=make -j BOARD=fennel Change-Id: I0a8eda12dca924831a5536242e4ff77b03cb3cd9 Signed-off-by: Aaron Zhang <zhangjianbo@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2342955 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Hash.Hung <hongzhaoyou@huaqin.corp-partner.google.com> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
* Puff: Add setup_thermal for setting thermal configDavid Huang2020-09-091-1/+33
| | | | | | | | | | | | | Use FW_CONFIG to set correct thermal config for different sku. BUG=b:166696500, b:167477885 BRANCH=master TEST=Thermal team verified thermal policy is expected. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I53a4998da5b01cfa4c69335062a64cbff2433752 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391033 Reviewed-by: Andrew McRae <amcrae@chromium.org>
* burnet: add case EC_LED_ID_POWER_LED to led_set_colorTommy Chung2020-09-091-0/+3
| | | | | | | | | | | | BUG=none BRANCH=firmware-kukui-12573.B TEST=make sure power led can be controlled by ectool. Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Change-Id: I43dc4af865a28505e0d6e3a74d89f99505a627be Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397937 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* Dooly: Initial commit (puff variant)Andrew McRae2020-09-097-0/+1755
| | | | | | | | | | | | | | | | Initial commit of Dooly EC image. Copy from Puff. BUG=b:164921469 TEST=buildall BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: I18ddec3fe3cb7aaa43ded2091fc120555ef9019f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397939 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: Andrew McRae <amcrae@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org>
* Waddledee: Change the lid accel sensor driverDavid Huang2020-09-092-9/+9
| | | | | | | | | | | | | Change the driver to KX022. BRANCH=None BUG=b:161821146 TEST=Build the waddledee image and check the lid accel sensor info. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: Iea5f19529689381a3ce2a10179f9e0341fda7728 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397295 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Quiche: Adding skeleton GPIO tableUdaya Kiran Ammu2020-09-081-20/+7
| | | | | | | | | | | | | | | | This CL adds GPIOs required to build and alt-func for EC console. Nothing else is included. BUG=b:155137749 BRANCH=None TEST=make BOARD=quiche and verify that image builds successfully. Signed-off-by: Udaya Kiran Ammu <udaykiran@google.com> Change-Id: Ic4fda8b21a4710bc5c27610177b5938f71631e3d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171041 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* Magolor: Add temp sensor to read temperatureDavid Huang2020-09-082-0/+26
| | | | | | | | | | | | | Add temp sensor for reading temperature. BUG=b:166732783 BRANCH=master TEST=Use console "temps" to check temperature. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I45a2ff451714ff5078f3440d081a5513cde7cee5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391189 Reviewed-by: Diana Z <dzigterman@chromium.org>
* morphius: Use HPD to disable pi3hdx1204 in S0Edward Hill2020-09-083-11/+36
| | | | | | | | | | | | | BUG=b:165442828 BRANCH=zork TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I32795377040221ac9459eb4c30cb6cf9648855b1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2389321 Tested-by: Keith Tzeng <keith.tzeng@quanta.corp-partner.google.com> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* hayato: add new boardEric Yilun Lin2020-09-081-0/+1
| | | | | | | | | | | | | | This is simply a symlink to asurada BUG=b:163789704 TEST=make BOARD=hayato BRANCH=none Change-Id: I682a4bd8ab1ae196b01de6b93653ed22dc3ea374 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397929 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* Puff: Add f/w config field for thermal solutionAndrew McRae2020-09-082-0/+12
| | | | | | | | | | | | | | | | | | | A new field has been added to the f/w config for defining the thermal solution used on the board. Add support for this new field. The config specific handling for this field has not been added yet. BUG=b:167981895 TEST=make buildall BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: Idd2616ef25fdf13245d31f63751e47b4565cad07 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396975 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Andrew McRae <amcrae@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org> Tested-by: Andrew McRae <amcrae@chromium.org>
* asurada: remove customized keyboard configTing Shen2020-09-072-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | The keyboard config copied from Jacuzzi does not suitable for Asurada for following two reasons: - `output_settle_us` too short causes the scan timing of column 2 and 3 overlapped. - Jacuzzi adjusted the scan delay to reduce bitbang error rate. Asurada does not need that. The default config should be good enough for us. BUG=b:167652253 TEST=press refresh key doesn't trigger 't' BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Ic2310bf1f9e37310d380da8d7efc26d1d0dbbd85 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2392074 Tested-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
* eve: Don't wake up on any MKBP eventAseda Aboagye2020-09-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | Eve will now be able to wake up from suspend on any MKBP event, however we don't want to do that by default. Defining CONFIG_MKBP_EVENT_WAKEUP_MASK will allow the host to define which MKBP events it wants to be woken up for. BUG=chromium:985228 BRANCH=firmware-eve-9584.B TEST=Flash eve, verify that no MKBP events wake the system from suspend. Change-Id: I9677011dac63eb6e5dafe65ed20ead64ce9a9a48 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1719753 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320267 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* kukui_scp: mask CC_HOSTCMD and CC_IPI outTzung-Bi Shih2020-09-071-0/+2
| | | | | | | | | | | | | To keep console quiet enough. BRANCH=none BUG=b:167634229 TEST=make BOARD=kukui_scp Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: Idb5a6983fb9bae64e3b25fc58490f6780070ffc1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2394975 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Revert "eve: Use PCH ACOK signal to control Deep Sleep entry"Duncan Laurie2020-09-073-22/+11
| | | | | | | | | | | | | | | | | | | | | | This reverts commit a49f19a1aa9ad3f4951490f96f0320fa646b572e. Battery life in S3 (not Deep S3) is terrible, so reverting this change until we determine if improvements can be made. BUG=b:79346372 BRANCH=eve TEST=none Change-Id: I570c5ea1b2b74f17fb41cd46424bfe2a5749d49a Reviewed-on: https://chromium-review.googlesource.com/1047845 Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Duncan Laurie <dlaurie@google.com> Tested-by: Duncan Laurie <dlaurie@google.com> Trybot-Ready: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320266 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* asurada: pwm config for rev1Ting Shen2020-09-064-13/+27
| | | | | | | | | | | | | | | | | | | | Code update according to following pwm changes in rev1. - PWM0 netname changed from PWRLED to LED1_SUB. - PWM1/2 connected to a real led. - PWM3 became PACKET_MODE_EN, not a PWM pin anymore. Also lowered the brightness of the led connected to PWM 2/3. BUG=b:162814191 TEST=none BRANCH=master Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Ib7009d987826cd777c5295c18b014a5675f9a3ae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2342985 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* eve: Move PMIC init to a deferred functionDuncan Laurie2020-09-061-1/+4
| | | | | | | | | | | | | | | | | | Instead of doing I2C traffic in an init hook, move it to a deferred function to be called outside of INIT_HOOK processing. BUG=b:77336348 BRANCH=eve TEST=build and boot on Eve Change-Id: If1289a48925f5921ee43fe4ab9d7131dd55e2d00 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/1001474 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320265 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Add battery vendor command for OTD recovery temperatureDuncan Laurie2020-09-051-20/+87
| | | | | | | | | | | | | | | | | | Add a new battery vendor command to fix the OTD recovery temperature register in the battery flash. BUG=b:74242993 BRANCH=eve TEST=make -j BOARD=eve Change-Id: If707d6083fa101a6af29ac7b15872cc52066c58c Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/967107 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320264 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Make BATTERY_DISCONNECTED depend only on XDSGScott Collyer2020-09-051-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The battery_check_disconnect() function was checking for both XCGH and XDSG to be set before returning BATTERY_DISCONNECTED. This works consistently when recovering from a battery cutoff when issued via a I2C command. However, if the battery cutoff was initiated due to a cell under voltage (CUV) trip, only the discharge FET will be disabled. When an external charger is connected, the battery may not be able to recover if the CUV event happened while SOC > 3%. By modifying the battery_check_disconnected to look only at XDSG then the normal battery cutoff and CUV triggered cutoff are recovered properly when an external charger is connected. BUG=b:67332823 BRANCH=eve TEST=Had two different units where I was able to confirm that a CUV event had happened. I obsereved that the system would brown out when the AP was powered up, preventing the EC from being able to charge the battery to get out of the CUV condition. Once I loaded FW that only checked XDSG, then verified that the AP was not powered on and the battery was able to be charged by the EC. Change-Id: I893cfcdd4123810137e2d09a15256d51c918b38b Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/705055 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320262 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Provide batteryparam implementation to disable CTOScott Collyer2020-09-052-0/+250
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The charger timeout threshold settings are not correct. This can lead to the CTOS (charge timeout suspend) safety alert getting set. Until the batteries flash can be updated, disable this check by clearing bit 4 of the protect_c register. This CL implements battery_set_vendor_param() and battery_get_vendor_param() where param of 0 means to disable the CTO bit in the protect_c flash register (bit 4 of 0x482c). BUG=b:66457399 BRANCH=eve TEST=Sent 'ectool batteryparam set 0 <key>' and verifed that new value of this register is 0x5. Also, used debug console command to write the value back to 0x15 and repeated the test. Change-Id: Ia77a505fddfbcedfe31a92caae37e09e0a7f17a1 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/696436 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Scott Collyer <scollyer@chromium.org> Trybot-Ready: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320261 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* berknip: add mst function supportZick Wei2020-09-053-7/+49
| | | | | | | | | | | | | | | This patch add mst function support for board version >=3 dali sku. BUG=b:159304034 BRANCH=zork TEST=verify on rework dali DUT mst hub can work Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: I09172b9355af8e50e636c84b564dd70bc86b1155 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2386693 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* eve: Enable optimized SHA256 implementationDuncan Laurie2020-09-051-0/+1
| | | | | | | | | | | | | | | BRANCH=eve BUG=b:64196191 TEST=boot eve and check hash done time Change-Id: I48e64d126b67c3f58fc3a8cd4f0aa3226ce89f33 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/664164 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320260 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Re-enable discharge-on-ac for all boardsDuncan Laurie2020-09-042-1/+3
| | | | | | | | | | | | | | | | | Enable discharge on ac when battery is full. BUG=b:64913617 BRANCH=eve TEST=test that when on AC and battery is full it goes into discharge mode Change-Id: I71397e7f0b24e449b13c00da87c8f81cfd806c2c Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/662907 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320259 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Modify LED tables to match updates to specScott Collyer2020-09-041-25/+23
| | | | | | | | | | | | | | | | | | | | | | | One of the pulse red patterns has been removed, so only 1 pulse red pattern is required. In addition the double tap length of the two lowest battery patterns has been increased. BUG=b:35584895 BRANCH=eve TEST=Manual Used 'battfake' EC console command to move through the different battery charge states and verifed that the correct double tap pattern is displayed. Change-Id: I6f92ecdbdd5476da2eb0d9f09e9f853ed5f45b53 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/663951 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320258 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Make a few pmic init commands run on RW imageDuncan Laurie2020-09-041-10/+10
| | | | | | | | | | | | | | | | | | | | | | Currently all of board_pmic_init() is skipped if you jump to the image, which means it never runs on RW, or on RO if it is updated by flashing, and requires a power+refresh boot to take effect. Move a few of these that are adjusting important settings to also run on system jump so they get applied when rolling out a new FW. BUG=none TEST=manual: flash new ec.bin and check that pmic register is set to disable VCCIO from ALL_SYS_PWRGD. Change-Id: I07a96dd052d142e5026778a7e785e1cb4c4849a1 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/617267 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320257 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* magolor: Support new battery AP18C8K/AP18C4KBen Chen2020-09-042-90/+98
| | | | | | | | | | | | | | Add new battery config : AP18C8k/AP18C4K. BUG=b:166237036, b:166237839, b:166736661 BRANCH=master TEST=Check found battery info in console and cutoff work. Change-Id: Ib352f13701c5feac5dae03fe1c82340c3828bab3 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2379354 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* ln9310: Move battery cell type to board customizationWai-Hong Tam2020-09-042-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Checking the input voltage to make the decision of 2S battery or 3S battery is not reliable. The 3S battery with very low charge might be under 10V that we initialized the switchcap to 2:1 mode. When the battery was then charged up to 12V, VOUT would go to 6 V which would be a problem. This change moves the decision to board customization. It checks the SKU ID. It can be extended to other ways, like checking the battery manufacturer and device names. To prevent any damage when attaching a 3S battery to a 2S-SKU board, add a check before configuring the switchcap to 2:1 mode. BRANCH=None BUG=b:163867792, b:151393598 TEST=Built successfully. Change-Id: I3f69132bc00b13ec39b229e98a34a5f7f75008f1 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391210 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* lazor/limozeen: Support clamshell SKUsWai-Hong Tam2020-09-042-114/+156
| | | | | | | | | | | | | | Configure the sensor count to 0, disable the tablet mode switch, and disable the interrupt line for the clamshell SKUs. BRANCH=None BUG=b:166934151 TEST=Tested Lazor; its sensors working properly. Change-Id: Id70c2f2925a5538e3492810fec9aad000514ea17 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391203 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* pompom: Change TCPC from PS8751 to PS8805 for board rev1AlvinCC_Hsu2020-09-042-0/+28
| | | | | | | | | | | | | | | | This patch adds a marco to define the board version and use it to determine what TCPC is used. BUG=b:167476139 BRANCH=none TEST=make BOARD=pompom Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com> Change-Id: If8cb4a7f213c68b37883a8a8a6f53478d8fd5924 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391027 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com>
* pompom: Remove TCPC port1 configurationAlvinCC_Hsu2020-09-046-49/+5
| | | | | | | | | | | | | | | | This patch removes configurations (I2C, GPIO, TASK and Interrupt...) about TCPC port1 for pompom. BUG=b:167476139 BRANCH=none TEST=power on after flashing FW and it works normal. Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com> Change-Id: I1275c1ef7e7d3e65d695dace834a9bcbb4e66dcc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391022 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com>
* lazor: Fix turning switchcap off when sysjump to RWWai-Hong Tam2020-09-042-7/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The polarity of the enable pins of DA9313 and LN9310 are different. DA9313 is active-high while LN9310 is active-low. For power saving, the enable pin of LN9310 has an external pull-up; so EC should configure it open-drain. The existing code causes an issue that the switchcap is turned off when sysjump to RW. We should configure the enable pin properly. DA9313 is GPIO-controlled without needing any configuration. So the default setting in gpio.inc should favors DA9313, i.e. GPIO_OUT_LOW; otherwise, DA9313 may turn on unexpectedly. In the board init, should not set the level; otherwise, it will override its level and shutdown the switchcap when sysjump to RW. LN9313 is similar but a bit tricky. As the gpio.inc configures it GPIO_OUT_LOW. When sysjump to RW, will output push-pull a short period of time. As it outputs LOW, should be fine. The GPIO changes like: (1) EC boots from RO -> high-Z (2) GPIO init according to gpio.inc -> push-pull LOW (3) This function configures it -> open-drain HIGH (4) Power sequence turns on the switchcap -> open-drain LOW (5) EC sysjumps to RW (6) GPIO init according to gpio.inc -> push-pull LOW (7) This function configures it -> open-drain LOW BRANCH=None BUG=b:163867792, b:151393598 TEST=Tested on Lazor: when sysjump to RW, switchcap not off. Change-Id: Iec8ea7e16f525fa431230546d712c3e081fdab5c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391830 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* eve: Disable PMIC power button shutdown timerDuncan Laurie2020-09-031-0/+3
| | | | | | | | | | | | | | | | | | | Disable the PMIC shutdown timer for power button to prevent it from being able to shutdown the system. Refresh+Power is still the best way to do a PMIC reset. BUG=none TESET=manual: Close lid and enter suspend, hold power button for >30 seconds and ensure EC stays up and system stays in suspend. Change-Id: I1e03c6acab57aeba10083eb7bb6a6141bfa56993 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/614600 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320256 Commit-Queue: Patryk Duda <pdk@semihalf.com> Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Modify LED behavior to show double tap patterns when chargingScott Collyer2020-09-031-172/+255
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous LED behavior was to have only the LED on side that was charging show white or green. The other side LED was always off. This CL modifies the behavior so that when double tap patterns are allowed and a charger is connected to display the double tap pattern on the opposite side LED which was previously off. In addition, when the device is charging, if the power level is such that AP can't boot, the opposite side LED will display the BLINK_RED pattern continuously as it would duirng a double tap event. In order to support the ability to have different LED patterns simultaneously, the LED code was refactored so that static variables used to manage the patterns and varialbes required to manage color gradient transitions were grouped together in to a static led descriptor. In addition, the led_manage_pattern and change_color functions had to be modified to deal with each LED independently. BUG=b:35584895 BRANCH=eve TEST=Manual Used EC console command 'battfake' to force different charge levels and verified the correct patterns for double tap events. Confirmed that double tap patterns are displayed on the non-charging port when a charger is connected. Tested connecting and removing charger while observing non-charging port. Change-Id: I05e1671deada761388bf898096ed7d3ae6f8da0f Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/611781 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com> Commit-Queue: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320255 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* eve: Update hibernate delayDuncan Laurie2020-09-031-0/+6
| | | | | | | | | | | | | | | | | | Hibernate after 7 days, or 1 day if battery is less than 10%. BUG=b:35584895 BRANCH=eve TEST=check that hibernate delay by default is 604800 seconds, but only 86400 seconds if the battery is less than 10%. Change-Id: I826b6df170f296afb2af8c053c05521383030cb1 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/611017 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320254 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* asurada_scp: mask CC_HOSTCMD and CC_IPI outTzung-Bi Shih2020-09-031-0/+2
| | | | | | | | | | | | | To keep console quiet enough. BRANCH=none BUG=b:167634229 TEST=make BOARD=asurada_scp Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: I3b82d809f5172ac25dd384879b81caf1b1479668 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391026 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* eve: Remove VCCIO from ALL_SYS_PWRGD on early boardsDuncan Laurie2020-09-031-0/+4
| | | | | | | | | | | | | | | | | | To work around rail issues with VCCIO remove it from the PMIC ALL_SYS_PWRGD tree. BUG=b:64228149 BRANCH=eve TEST=manual stress testing on 5x units Change-Id: Ic1eca099c3ef1f3b296bd3ebb6dba8d6ae8a676a Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/611016 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2320253 Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* magolor: Add PS8802 driverBen Chen2020-09-032-3/+5
| | | | | | | | | | | | | change mux to ps8762 for C1 typec port. BUG=b:166057842 BRANCH=none TEST=USB3 device enumerates, DP display normal. Change-Id: I98c56047b7164d4a2cf7f73b149ce12aa2f53b6a Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2388363 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* voxel: modify mb gpio pin defineBen Chen2020-09-032-11/+9
| | | | | | | | | | | | | config mb gpio pin define. BUG=b:160363945 BRANCH=master TEST=make buildall PASS. Change-Id: Iee9295b09d4629be3fbbe7852db43d1b607f1086 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2388364 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* halvor: Initialize the keyboardSamsp_Liu2020-09-031-2/+26
| | | | | | | | | | | | | | | Initialize the keyboard BUG=b:149536282 BRANCH=none TEST=halvor test Change-Id: I0081587e62836e09e2874589047ef46813e13238 Signed-off-by: Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2366317 Tested-by: SamSP Liu <samsp_liu@compal.corp-partner.google.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
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