| Commit message (Collapse) | Author | Age | Files | Lines |
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The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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For the normal lab use, emulating a sink has no PD comm, like a passive
hub. For the PD FAFT use, we need to validate some PD behavior, should
support sink roles with PD comm enabled. Two new roles "pdsnk" and
"pdsnkdts" are introduced.
BRANCH=servo
BUG=b:134700685
TEST=Typed "cc pdsnk" or "cc pdsnkdts" can transit the DUT port to
the PD state "SNK_READY", instead "SNK_DISCOVERY".
Change-Id: If6a7c39cd296986b8b28de1c1fbe66ee8438c709
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1682920
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Support a new flag to enable DRP. The do_cc() function becomes having 4
arguments. So change to merge them into a single cc_config with
different bit masks.
For the force_source or force_sink role, we explicitly set the the Rp
or Rd resistors on CC lines. But for DRP role, the Rp/Rd toggling is
controlled by the PD state machine. So don't set any CC pull resistor
for DRP.
Support an "on" option in "cc" command to restore the previous role
before emulating detach.
Add "usbc_action drp" to toggle the DRP state, which is compatible with
Plankton.
BRANCH=servo
BUG=b:135691171
TEST=Ran the firmware_PDTrySrc test passed, and not break all the
existing PD FAFT tests.
Change-Id: I3b90611c9840f502e496c42f80354e7ee002f96e
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1682919
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Update the PD policy and comments:
* Only allow data role swap on DUT port;
* Remove the dts mode condition to initiate a data role swap
(not necessary to limit it to dts mode).
BRANCH=servo
BUG=b:135691171
TEST=Checked the CHG port is always UFP.
TEST=Checked the DUT port is SRC/UFP, a data role swap happened (but
it was initiated by DUT).
Change-Id: I668703209301a9542e94768f31f6ce8e2d9eb0f4
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1682918
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The pd_config_init() does two things:
* pd_tx_init() to init the GPIO MODULE_USB_PD;
* pd_set_host_mode() to set CC pull resistors.
The pd_config_init() is called on PD phy init hook.
For setting CC pull resistors, calling pd_set_host_mode() is enough.
Don't need to reinit GPIO MODULE_USB_PD.
BRANCH=servo
BUG=b:135691171
TEST=Set "cc" role to "src", "snk", "srcdts", "snkdts", and "off".
TEST=Unplugged and replugged the CHG port cable.
Change-Id: I1e783dfa5da4f8e8f1d9d591818eb1128b7a8caa
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1682917
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Opt for 7bit slave addresses in EC code. If 8bit is
expected by a driver, make it local and show this in
the naming.
Use __7b, __7bf and __8b as name extensions for i2c/spi
addresses used in the EC codebase. __7b indicates a
7bit address by itself. __7bf indicates a 7bit address
with optional flags attached. __8b indicates a 8bit
address by itself.
Allow space for 10bit addresses, even though this is
not currently being used by any of our attached
devices.
These extensions are for verification purposes only and
will be removed in the last pass of this ticket. I want
to make sure the variable names reflect the type to help
eliminate future 7/8/7-flags confusion.
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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In servo v4 hardware logic, both CC lines are wired directly
to DUT. When servo v4 as a snk, DUT may source Vconn to CC2
and make the voltage high as vRd-3.0, which makes the PD
state mess up. As the PD state machine doesn't handle this
case. It assumes that CC2 is separated by a Type-C cable,
resulting a voltage lower than the max of vRa.
It fakes the voltage within vRa so the PD state machine
checks the value as expected.
This is an issue only happening on servo v4 as it wires both
CC lines to DUT.
BUG=b:134700685
BRANCH=servo
TEST=Servo v4 as snk, verified the CC2 is sensed vRa, i.e.
the output "CC1:0" (TYPEC_CC_VOLT_OPEN), instead of "CC1:7"
(TYPEC_CC_VOLT_SNK_3_0).
2019-06-18 15:05:47 > cc snk
2019-06-18 15:05:50 cc: on
2019-06-18 15:05:50 dts mode: off
2019-06-18 15:05:50 chg mode: off
2019-06-18 15:05:50 chg allowed: off
2019-06-18 15:05:50 > C1 st2 SNK_DISCONNECTED
2019-06-18 15:05:50 C1 st3 SNK_DISCONNECTED_DEBOUNCE
2019-06-18 15:05:50 C1 st5 SNK_DISCOVERY
2019-06-18 15:05:51 > tcpc 1 state
2019-06-18 15:05:53 Port C1, Dis - CC:2, CC0:6, CC1:0
2019-06-18 15:05:53 Alert: 0x00 Mask: 0x007d
2019-06-18 15:05:53 Power Status: 0x48 Mask: 0x00
TEST=Ran the PD FAFT test firmware_PDConnect passed.
Change-Id: I10f1ffe80768100ee3ed4c374598df7c2f9a8d05
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1666468
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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According to the DisplayPort Alt Mode on USB Type-C specification, if
the DisplayPort Source device does not need to maintain HPD connectivity
information prior to entering a low power state, the device shall exit
the DP Alternate Mode. Previously, we were always entering DP Alt Mode
regardless of the SoC state. When we are shutting the device down to S5
or G3, there's no need to monitor the HPD connectivity information.
This commit simply does not enter DP Alt Mode when the SoC is off.
BUG=chromium:927636
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne, shut DUT down to S5/G3, plug in a USB-C monitor
that can also act as a Source, verify with PD analyzer that DUT does not
Enter DP Alt mode, boot system up, verify that external display works.
Change-Id: I2ad3619cabeae5d90e8af1bfa9cab67452d9fc16
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1450815
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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The power rail for the 5V used for sourcing is not available while the
chipset is off. Therefore pd_set_power_supply_ready() should return an
error if chipset is off.
BUG=b:118646299
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne; plug in a USB Type-C ethernet adapter, run
`dut-control power_state:rec` and verify that VBUS is present at the
insert screen.
TEST=Repeat the above test 20 times and verify that it always succeeds.
Change-Id: Ie675d862dfbbe1e1ce08f6b203008ee784eb8ede
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1307699
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit b6db88f25366a4519ad45d4b54e91cb40e7ea7fb)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1708266
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Setting Type-C Port1 controller register 0xE8 (High Speed Signal
Detector threshold adjustment) to 0x80 (-25%).
BUG=b:136531130
BRANCH=master
TEST=Manual
Check Type-C Port1 register 0xE8.
Change-Id: I5957fcd3389296500992ea3075dcde4a3b690f98
Signed-off-by: Barney_Liao <barney_liao@pegatron.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1703724
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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This adds fake SPI Master and TRNG support to the
host target.
This change also adds the missing emulated gpio
interface function.
Although general purpose, these changes are setup for
allowing fuzzing of the FPMCU specific host commands.
Thus, they do not impact any outstanding code.
BRANCH=none
BUG=b:116065496
TEST=make buildall -j
Change-Id: Icfc40e7bf8ee421a4c3ad15377fd56ae68c763d7
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1684223
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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By fixing the bug(b/136282898) to allow MKBP events to wake the system
in suspend, all MKBP events would wake the system which goes against our
chrome OS wake sources spec. By defining CONFIG_MKBP_EVENT_WAKEUP_MASK,
nocturne will not wake on any MKBP event.
BUG=chromium:786721
BRANCH=firmware-nocturne-10984.B
TEST=Build and flash nocturne, suspend DUT, plug in powered charge-thru
hub w/ an external display connected, verify that DUT does not wakes up
and display is not shown.
Change-Id: I0810d0ea625689ee39f0e52b62a8ee7c00c49aad
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1685788
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Includes System Clock, Timer, Uart, Watchdog
Change-Id: I195059c87d97e70c6a134304143613b86b623e22
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1647741
Reviewed-by: Jes Klinke <jbk@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Jerry Bradshaw <jerry.bradshaw@maximintegrated.com>
Commit-Queue: Jes Klinke <jbk@chromium.org>
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Presently the CR50_DEV environment variable is overloaded, if its
value is a number exceeding 1, it enables inclusion in the image of
the dcrypto tests.
To make things cleaner let's use a separate environment variable to
add dcrypto tests to the image. Note that the tests still can not be
enabled, as they do not fit into the flash code space.
BRANCH=cr50, cr50-mp
BUG=b:137659935
TEST=verified that image building with CRYPTO_TEST=1 fails due to
exceeded code size.
Change-Id: I550c219c1eefe01fbe035b85a1d5aae88ea439de
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704607
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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Looking at where the non-standard %T printf modifier is used in EC
codebase, the majority is cases where CPRINTS could have been used
instead of CPRINTF. This is a somewhat-mechanical refactor of these
cases, which will make implementing a standard printf easier.
BUG=chromium:984041
BRANCH=none
TEST=buildall
Change-Id: I75ea0be261bfbfa50fb850a0a37fe2ca6ab67cb9
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1703128
Reviewed-by: Evan Green <evgreen@chromium.org>
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Depend on placement modify rotation matrix for the lid and base sensor.
BUG=b:135554555
BRANCH=ToT
TEST=Manual
Check EC console accleinfo.
Change-Id: I287808dde06ff752f9e10766f3c348e0d63606f3
Signed-off-by: Barney_Liao <barney_liao@pegatron.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1687037
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: If44a363d1288cbfabe5c6545e550f2b8fc623227
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1700793
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:130578043
BRANCH=none
TEST=battery command on EC console
Change-Id: I2518892dac3daeae8734bd3b45f225f4723dc7c6
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704788
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
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This contains the initial firmware for Fluffy rev 1.1 boards.
Fluffy is a 20:1 USB-C power mux. For more information, see
go/usbc-fluffy.
BUG=b:136671092,b:134075217,b:134074302,b:134074465,b:134075521,
b:134075834
BRANCH=None
TEST=flash fluffy, verify it boots and functions.
Change-Id: Ica6817e7cfa4481aa98fed1c24ea243bf622eb2a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1535117
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
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For kohaku board id 1, there is a known issue which prevents in
getting battery presence signal correctly. This change returns BP_YES
if the board id reads out as 1. In all other cases, it returns
BP_NOT_SURE to allow baseboard to read gpio to determine battery
present state.
BUG=b:135278000
BRANCH=None
TEST=None
Change-Id: I882f05ddcf4e8a0127f336b4a524bf162ad796b5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1702870
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: YongBeum Ha <ybha@samsung.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Tested-by: YongBeum Ha <ybha@samsung.com>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
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new battery: LGC AP19A8K
BUG=b:135496272
BRANCH=octopus
TEST=Make sure battery can cutoff by console "cutoff" or "ectool cutoff"
and resume by plug in adapter.
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Change-Id: I11a00c0ee88a668dcfd995b46f4b6dd43fec318b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1657076
Reviewed-by: Marco Chen <marcochen@chromium.org>
Reviewed-by: David Huang <David.Huang@quantatw.com>
Tested-by: David Huang <David.Huang@quantatw.com>
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The sensors on the i2c line do not operate reliably
at 1Mhz i2c bus speed. Lower to 400kHz
BRANCH=75,76
BUG=b:136676970
TEST=verify that i2c bus speed when from ~1Mhz to ~400kHz after
this change with an oscilloscope.
Change-Id: Ie970f76fe7408de17f92bfc9f22a951b635fd278
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1691309
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Remove unused clode blocks and includes.
BUG=None
TEST=make
BRANCH=master
Change-Id: I66994039e4c215ce652cdef227207a6bbd94b316
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1692364
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Adjust the rotation matrix for lid accel to fit the kohaku board.
BUG=b:136626453
BRANCH=master
TEST=Boot and check if the system keyboard and touchpad work
Change-Id: Icd1f634924693b2e951bbb7cf5d090c980fa95b0
Signed-off-by: Inno.Park <ih.yoo.park@samsung.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1686925
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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This is needed to support CCD testing of UART to USB bridging.
BRANCH=none
BUG=b:38448364
TEST=ran 'make BOARD=kukui -j', verified that command is included in
the symbol map.
Change-Id: I675df026c16b5c0b07ed55c99aa5e8b333fd0fab
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1688136
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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new battery: LGC KT0030G020,Murata KT00304012
BUG=b:131126718,b:131126717
BRANCH=master
TEST=Make sure battery can cutoff by console "cutoff" or "ectool cutoff"
Signed-off-by: ben.chen2@quanta.corp-partner.google.com
Change-Id: Ic8d216cea8cdc085a536df5e0d1dfaf940390c5f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1657850
Reviewed-by: David Huang <David.Huang@quantatw.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Tested-by: David Huang <David.Huang@quantatw.com>
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
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According to the comments in CL:1666260, we don't need it anymore.
BUG=b:129430139
TEST=make
BRANCH=master
Change-Id: I98944518e1e70d2a2ea2a607b3dfd478f9c09e55
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1679855
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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BRANCH=none
BUG=b:124996507
TEST=fpcapture/fpsensor/fpenroll from the console work
Change-Id: I6f481ed6b5185585aa01506e292b6b31e202a3b7
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1558938
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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BRANCH=none
BUG=b:124996507
TEST=make buildall -j
Change-Id: I49f87cb9f6a6551f83f91d55242f2c5c250e8b83
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1681378
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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CONFIG_MKBP_WAKEUP_MASK is a bit confusing and is wrongly named. The
comment stated that "With this option, we can define the MKBP wakeup
events in this mask (as a white list) in board level, those evets allow
to interrupt AP during S3.". However, these events are NOT MKBP events
at all but are instead host events. This commit tries to clear things
up by renaming CONFIG_MKBP_WAKEUP_MASK to
CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK to better show that these events are
in fact host events.
BUG=b:136282898
BRANCH=None
TEST=`make -j buildall`
Change-Id: I42beadec8217435fd30e679ccf52d784a8ef99a0
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1685784
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Some battery and fuel gague combinations for fleex are unable to
withstand the loss of a charger's Vbus signal when they are reporting 1%
charge. This change increases the Try.SRC battery required, and also
prevents the PD state machine from starting reset timers until the
battery is at 2%.
BUG=b:128935567
BRANCH=octopus
TEST=verified hard resets don't occur on grabbiter when system is locked
and coming back from battery cutoff with low battery, verified soft
followed by hard reset later occurs when battery passes config level
Change-Id: Ia0eca111daaf6b63f71c397231de4cfa30e34b8c
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1606742
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This patch allows EC to override display backlight control for
hatch family.
Also enable CONFIG_BACKLIGHT_LID so that EC can specifically
turn off display backlight when the lid is closed.
BUG=b:135511415
BRANCH=none
TEST=On hatch rev1 board, turn off/on display backlight by
'ectool backlight 0' and 'ectool backlight 1'
TEST='emerge-hatch chromeos-ec'
Change-Id: I894ef2879fb584ccf84cd643cc4c0cd5fdcb8525
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1679047
Reviewed-by: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
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BIT(0) of SKU_ID indicates a keyboard backlight controller presence.
If it's not present, we shouldn't register a driver.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/78360907,b/78141647,b/76182445,b/79898204
BRANCH=Nami
TEST=buildall
Change-Id: I0288c271a844990bdf015a8aa7dc695dbe936d87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1680665
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
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This patch makes EC check the currently active LED pattern before
setting a new pattern. This will prevent a power LED from blinking
every time the soc changes.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/135897885
BRANCH=Nami
TEST=Verify LED behavior on Sona
Change-Id: I5175dcd12c17c405bdb41f8fd6d370cf0ab272e8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1676609
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
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This is a cosmetic CL that moves index_config[] to the end of
virtual_nvmem.c file to minimize the number of declarations for static
functions set as handlers in it.
Trades 3 current handler for oen forward declaration of
GetNvIndexConfig.
BRANCH=none
BUG=none
TEST=build and boot
Change-Id: I8d9aa251f1982e200c4f96b4ddd2a60b4751d49a
Signed-off-by: Andrey Pronin <apronin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1679596
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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This is a cosmetic CL that gets rid of breaking BUILD_ASSERT statements
in virtual_nvmem.c into two lines since they all fit 80 chars.
BRACH=none
BUG=none
TEST=build
Change-Id: Iaec1115101c36d8ec20967c64931666b760b027d
Signed-off-by: Andrey Pronin <apronin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1679595
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Louis Collard <louiscollard@chromium.org>
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This CL adds a vNVRAM space that exposes RSU Device ID for userland.
BRANCH=none
BUG=b:136091350
TEST=Verify that RSU Device ID reported through vNVRAM that uses this
new method mathes the same ID calculated from device ID in G2FA
certificate:
hex_to_binary_file() {
local hex_value="$1"
local file_name="$2"
local escaped_string="$(echo -n "${hex_value}" | \
sed 's/.\{2\}/\\x&/g')"
echo -n -e "${escaped_string}" >"${file_name}"
}
trunks_send --u2f_cert --crt=/tmp/cert
serial="$(openssl x509 -in /tmp/cert -inform der -noout -serial | \
sed 's/serial=\s*//')"
chip_id="$(printf "%64s" ${serial} | sed 's/ /0/g' | \
sed 's/.\{2\}/& /g' | tac -s' ' | sed 's/ //g')"
hex_to_binary_file "${chip_id}" /tmp/chip
rma_device_id="$(openssl sha -sha256 -mac hmac \
-macopt hexkey:"${chip_id}" -hex /tmp/chip | \
sed 's/.*=\s*//' | cut -c1-16)"
hex_to_binary_file "${rma_device_id}" /tmp/data
rsu_salt="Wu8oGt0uu0H8uSGxfo75uSDrGcRk2BXh"
echo -n ${rsu_salt} >> /tmp/data
rsu_device_id="$(openssl sha -sha256 -hex /tmp/data | \
sed 's/.*=\s*//')"
hex_to_binary_file "${rsu_device_id}" /tmp/rsu_device_id
tpm_manager_client read_space --index=0x013fff03 --file=/tmp/vnvram
if diff -q /tmp/rsu_device_id /tmp/vnvram; then
echo "OK"
else
echo "Wrong vNVRAM"
fi
Change-Id: I0f577a54f74da9ef70a092e024b51c7c8219a605
Signed-off-by: Andrey Pronin <apronin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1677238
Reviewed-by: Louis Collard <louiscollard@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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TEST=make BOARD=krane analyzestack section=RW, and see no tasks
uses stack more than it could.
BUG=b:135992789
BRANCH=none
Change-Id: Ic28b5fed5db35f001fad71ec64db511c700cf614
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1677979
Tested-by: Youcheng Syu <youcheng@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
Commit-Queue: Yilun Lin <yllin@chromium.org>
Auto-Submit: Yilun Lin <yllin@chromium.org>
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TEST=make BOARD=kukui analyzestack
BUG=b:135992789
BRANCH=none
Change-Id: Ie5e6447a353e9115199cbab1c5147b95ecfbfdb6
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1677978
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Auto-Submit: Yilun Lin <yllin@chromium.org>
Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
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Update board_battery_info with latest battery pack information.
BUG=b:135074326
BRANCH=Master
TEST=Manual
Battery charge and discharge and check EC console message.
Change-Id: Ie3dbbdc06a9ebf3873c9b255539b40bb29ec7d19
Signed-off-by: michael5_chen <michael5_chen@pegatroncorp.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660527
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
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Add a new kodama folder and BOARD configuration for
Kodama.
BUG=b:135490566
BRANCH=None
TEST=1. emerge-kukui chromeos-ec
2. check coreboot binary could be generated under
the /build/chroot/kukui/firmware/kodama/.
Change-Id: Ia48243ce59597e7f0b85ff46a4c71eb5bbb30661
Signed-off-by: peichao.wang <peichao.wang@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1666340
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
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BUG=b:134207072, b:135216932
BRANCH=none
TEST=build kohaku
Change-Id: I7b3d01d5dfb193262055b6aff2d101844159aa94
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1670165
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
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VSYNC pin is added to rev1.
We need to hook up driver/pin to enable ARCore.
This pin doesn't exist on rev0, so I don't expect this patch
to break rev0.
BUG=b:135216932
BRANCH=none
TEST=build kohaku
Change-Id: I700d628f064315693911ec53319960491fe0608a
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1670163
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
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From rev0 to rev1, USB_C0_BC12_CHG_DET_L and USB_C1_BC12_CHG_DET_L
pins move to GPIO60 and GPIO96, respectively.
The change shouldn't break anything in rev0 since these pins
are not really used yet.
BUG=b:135216932
BRANCH=none
TEST=build kohaku
Change-Id: I65ef800970ed014a0c5924dcd627b6ce3600af69
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1670162
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
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BUG=b:129419982
TEST=Combined with CL:1621449, run ectool motionsense.
BRANCH=None
Change-Id: I028f9a286ba96d7813bb76ba5e1e5235955e40b3
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1628630
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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This commit allows nocturne to wake from suspend when the device enters
DisplayPort Alternate mode and if an attention VDM is received while in
the mode. Note that since our policy is to be a sink only during
suspend, only powered charge through hubs with external display
capability will wake us up.
BUG=chromium:786721
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne; suspend DUT, plug in powered charge through hub,
verify that DUT wakes up.
TEST=Use a powered MST hub, plug in a second monitor, verify DUT wakes
up as well.
Change-Id: I7e0fc6745ef06865e9fc4c23c29adf5974664388
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1666367
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Benson Leung <bleung@google.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
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Kukui doesn't have superspeed lanes, we should avoid
using such pin assginments.
Also,
1. update usb_mux on receiving DP config packet accordingly, and
2. fix usb_mux setting by removing usb_mux update when receiving DP
attention packet. We should inform DP mux on at DP config, and
DP mux off at DP safe mode.
TEST=print choosed pin mode, and see it choose PIN_C rather than PIN_D.
TEST=Plug hub JCA-374 and see the external display is functional.
BUG=b:135079572
BRANCH=master
Change-Id: Id1edfc5b1962dbef7e5ab79c512d8f2c568777e8
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660524
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Auto-Submit: Yilun Lin <yllin@chromium.org>
Commit-Queue: Yilun Lin <yllin@chromium.org>
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Servod now uses the "cc" console command to change the dts mode. So no
one uses the "dts" command. Remove it to save the flash space (128
bytes).
BUG=b:131840808
BRANCH=servo
TEST=Flashed the servo v4 firmware and started servod. Tried:
$ dut-control servo_v4_dts_mode
servo_v4_dts_mode:on
$ dut-control servo_v4_dts_mode:off servo_v4_dts_mode
servo_v4_dts_mode:off
$ dut-control servo_v4_dts_mode:on servo_v4_dts_mode
servo_v4_dts_mode:on
Change-Id: I35778ff8975af35e623a9c9c70926264161cff3d
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1669742
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Commit-Queue: Jason Clinton <jclinton@chromium.org>
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This CL adds support for the power LED.
BUG=b:133501368
BRANCH=none
TEST=make -j BOARD=helios
Change-Id: Ib0d117631b7482fad65e6b8df326194281b21d5b
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636433
Tested-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Auto-Submit: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Helios will not have any USB-A ports so can remove EC support for that
feature. The GPIO signals for this feature are routed to test points
and so have kept those signals, but changed them to GPIO_INPUTS to
avoid any potential leakage issues.
BUG=b:133501368
BRANCH=none
TEST=make -j BOARD=helios
Change-Id: Ia6ee1436abd26b428fa5381fe64b7ad837783d2b
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636432
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Auto-Submit: Scott Collyer <scollyer@chromium.org>
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