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* lantis: Move C1 SM5803 processing to the PD_INT taskTommy Chung2021-04-071-1/+15
| | | | | | | | | | | | | | | | | Since the SM5803 shares an interrupt line with the TCPC, allow the PD_INT task for C1 to process interrupts for this chip. This will ensure that any interrupts from the charger are handled at a high priority and cannot leave the shared IRQ line low for extended periods. BUG=none BRANCH=dedede TEST=On lantis, confirm charger attach to C1 works reliably. Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Change-Id: Id363b743eb7825f4a03f7119248218d0259e9d5b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2804004 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* brya: Update generated-gpio.inc from spreadsheetCaveh Jalali2021-04-071-1/+1
| | | | | | | | | | | | | | This refreshes generated-gpio.inc from the latest GPIO spreadsheet. The change is to configure EC_ACCEL_INT_R_L for 1.8v instead of 3.3v. BRANCH=none BUG=b:179648721 TEST=buildall passes, brya boots. accel interrupts tested by bmbm@ Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ib0c2667e7593329e533b47fdb1ce09a4eece6590 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2807252 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* Homestar: Remove the DA9313 support, add the LN9310 supportxuxinxiong2021-04-063-11/+45
| | | | | | | | | | | | | | | | LN9310 and DA9313 are not pin compatible. The layout of Homestar can only choose one and it is LN9310. So remove the DA9313 support and add the LN9310's. BRANCH=Trogdor BUG=b:182358144 TEST=Built homestar image Change-Id: I3c07c0f062a68f64a13a006aa7010c438dfe1b5e Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748208 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* Drawcia: Move C1 SM5803 processing to the PD_INT taskDiana Z2021-04-061-1/+15
| | | | | | | | | | | | | | | | Since the SM5803 shares an interrupt line with the TCPC, allow the PD_INT task for C1 to process interrupts for this chip. This will ensure that any interrupts from the charger are handled at a high priority and cannot leave the shared IRQ line low for extended periods. BRANCH=None BUG=b:182534117,b:173056845 TEST=on drawcia, confirm charger attach to C1 works reliably Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I6670c62ca6d59fc3f5db4151cf7142b2da1fec38 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2803462 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* nightfury: Change down debounce time to 30msPatryk Duda2021-04-062-0/+15
| | | | | | | | | | | | | | | This patch is implementation of CL:2744760 from firmware-hatch-12672.B for ToT. This change can't be cherry-picked because CL:2194160 removes keyscan_config structure from baseboard/hatch/baseboard.c. BUG=b:181307934 BRANCH=none TEST=make BOARD=nightfury Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I070390b1f4f13dcce5a93ed0c8982b82a3574d6c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784642 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* kohaku : limit charging current to 0.45CYongBeum.Ha2021-04-062-0/+32
| | | | | | | | | | | | | | | | | Change charging current from 0.72C to 0.45C when system is in S0 BUG=b:144532818 BRANCH=firmware-hatch-12672.B TEST=FW_NAME=kohaku emerge-kohaku chromeos-ec & check charging current Change-Id: Iba1dd08465b2469a6456cc04ad72a39c7af8b8a4 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957605 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784641 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Patryk Duda <pdk@semihalf.com> Commit-Queue: Patryk Duda <pdk@semihalf.com>
* cret: Initial EC image setup battery parameterjohnwc_yeh2021-04-062-18/+180
| | | | | | | | | | | | | | | | Setup battery parameter for cret. BUG=b:183875170 BRANCH=dedede TEST=make BOARD=cret Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I3f4df0a4255bbc6aaf9bbee1260abc7660e4626d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789807 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Cozmo: Remove motion sensorsSue Chen2021-04-064-211/+4
| | | | | | | | | | | | | For Cozmo is clamshell, it doesn't have motion sensors. BUG=b:183454206 BRANCH=icarus TEST=make BOARD=icarus Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I3da637bdc5a5ea4a11e1b715fdd8bff030e388b6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2799331 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* boldar: Reset SLP VW signals on EC-AP eSPI resetSooraj Govindan2021-04-061-0/+2
| | | | | | | | | | | | | | | | | | | | This enables an option for the NPCX eSPI support code to reset SLP signals when eSPI# is asserted because of a global reset. This is needed exclusively on platforms that do not use deep Sx. The EC console apshutdown command forces the AP into G3 but the SLP_S4 signal is not reset in this case as virtual wire signals are not reset on ungraceful AP shutdown (global reset). BRANCH=none BUG=none TEST=Use EC "powerindebug" command to observe the SLP_S4 virtual wire is now reset after "apshutdown" command. Signed-off-by: Sooraj Govindan <sooraj.govindan@intel.com> Change-Id: I09b78492d24ddeb2e372b7a2390854bd991488a6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2803999 Reviewed-by: caveh jalali <caveh@chromium.org>
* spherion: remove motion sensor functionBen Chen2021-04-064-150/+4
| | | | | | | | | | | | | | Not supports tablet mode, disable motion sensor function. BUG=b:183064682 BRANCH=asurada TEST=check ec console don't initialize motion sensors. Change-Id: Ibeadb05849bb7e4bdd8bb780be805ef1d057e945 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2794201 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* PCHG: Support firmware updateDaisuke Nojiri2021-04-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds EC_CMD_PCHG_UPDATE, which allows the host to update firmware of ctn730 via I2C. An updater (e.g. ectool) is expected to issue EC_PCHG_UPDATE_CMD_OPEN, multiple EC_PCHG_UPDATE_CMD_WRITEs, then EC_PCHG_UPDATE_CLOSE. Each sub-command completion is notified to the host via EC_MKBP_EVENT_PCHG. An updater is supposed to wait for the previous sub-command to complete before proceeding to the next. Example: localhost ~ # ectool pchg 0 State: DOWNLOAD (6) FW Version: 0x104 localhost ~ # ectool pchg 0 update 0x207000 0x105 /path/to/image.bin Update file /path/to/image.bin (85632 bytes) is opened. Writing firmware (port=0 ver=0x105 addr=0x207000 bsize=128): ********************************************************************** FW update session closed (CRC32=0x7bd5c66f). localhost ~ # ectool pchg 0 reset Reset port 0 complete localhost ~ # ectool pchg 0 State: ENABLED (2) FW Version: 0x105 BUG=b:182600604, b:173235954 BRANCH=trogdor TEST=ectool pchg 0 update 0x201200 0x105 /tmp/user_ee_X0.1_V1.5.bin TEST=ectool pchg 0 reset Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I9c62f1714dd69428ab5870c443cb4eb77881a6c6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2757099
* Lindar: Lindar's lightbar support in S0ix/S3reno.wang2021-04-034-2/+480
| | | | | | | | | | | | | | | | | | | | | | | | | 1. Lid is closed, lightbar keep off 2. Lid is opened, its behavior follow below. AC+Battery < 20%, lightbar solid 2 amber led on. AC+Battery < 40%, lightbar solid 4 amber led on. AC+Battery < 60%, lightbar solid 6 amber led on. AC+Battery < 80%, lightbar solid 8 amber led on. AC+Battery < 97%, lightbar solid 10 amber led on. AC+Battery >= 97%, lightbar solid 10 green led on. Battery only >= 15%, lightbar keep off. Battery low < 15%, lightbar blink amber color, 1s on, 5s off. 3. Some SKU un-support lightbar, and shouldn't run lightbar task. 4. Lightbar is powered by PP3300_A, and shouldn't run it in S4/S5/G3. 5. Add debounce time for lightbar state change. BUG=b:174133147 BRANCH=volteer TEST=make buildall, test lightbar behavior in S0ix/S3. Signed-off-by: reno.wang <reno.wang@lcfc.corp-partner.google.com> Change-Id: Ibbdc17627f7b2d1b2abbbad23b6c06024455e66b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2739008 Reviewed-by: Keith Short <keithshort@chromium.org>
* lazor: Move GPIO_CCD_MODE_ODL to the shared fileSimon Glass2021-04-032-7/+6
| | | | | | | | | | | | | | | | | | Move this init to the shared usbc_config file so that Zephyr can use it. BUG=b:183296099 BRANCH=none TEST=build for lazor Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I65b0f835b5005b783b752fe33085002f9689f9cc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789805 Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* fpsensor: Support building firmware that works for both sensorsYicheng Li2021-04-022-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a refactoring to allow building FPMCU firmware that works for one FPC sensor and one ELAN sensor. 1. When both drivers implement our common functions, e.g. fp_sensor_init(), rename them to fp_sensor_init_fpc() and fp_sensor_init_elan(). 2. There are a few functions implemented not in FPC driver but in FPC private library, e.g. fp_sensor_finger_status(). I kept this as-is for FPC but renamed the one in ELAN driver to fp_sensor_finger_status_elan() 3. If building for ELAN, need to hardcode elan=1 in hatch_fp/board.c because the sensor type GPIO always says FPC. BRANCH=none BUG=b:175158241 TEST=make run-fpsensor; make run-fpsensor_status; make run-fpsensor_crypto TEST=make -j BOARD=dartmonkey TEST=add CONFIG_FP_SENSOR_ELAN515 to board/hatch_fp/board.h; make -j BOARD=bloonchipper Firmware binary fully works on Dragonair (FPC) and Voema (ELAN) TEST=run device tests with http://crrev/c/2750547 and http://crrev/i/3654297 on Dragonclaw, all pass Change-Id: I789090dbdfe35ac6aefd6a629fa4c7bde89dc437 Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2727971 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Tom Hughes <tomhughes@chromium.org>
* sasuke : set nc pin to pull-downYongBeum.Ha2021-04-021-19/+19
| | | | | | | | | | | | | Set NC pin to pull-down to reduce power consumption BUG=b:178356507 BRANCH=None TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I3725751abfe28302322a4fe3e0143b8b3a70fdcd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2801179 Reviewed-by: Diana Z <dzigterman@chromium.org>
* quiche: Add board_set method for ps8822 mux for rx dp eqScott Collyer2021-04-021-0/+17
| | | | | | | | | | | | | | | | | This CL adds a method to change Rx DP gain from 12 to 20 dB. This value was requested by the MST vendor. BUG=b:178656398 BRANCH=None TEST=verifed register setting when DP mode is active on quiche Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I6355da1ad88c3e1f29f07ca036adbf8fc9b908ca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2686919 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* keeby/lalala: Initial commitAseda Aboagye2021-04-029-0/+1485
| | | | | | | | | | | | | | | | This is the initial commit for lalala, a NPCX797FC variant of keeby. BUG=b:184191507 BRANCH=None TEST=`make -j BOARD=lalala` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I0420cf7252cba5571fe82d0d88d4dccc5d866782 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2798524 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* sasuke: remove CONFIG_SYSTEM_UNLOCKED, enable CONFIG_USB_PD_COMM_LOCKEDYongBeum.Ha2021-04-021-6/+1
| | | | | | | | | | | | | | | Remove the CONFIG_SYSTEM_UNLOCKED option configurations and enable CONFIG_USB_PD_COMM_LOCKED for final firmware. BRANCH=none BUG=b:183305545 TEST=flash on sasuke and PD communication did not negotiate (when WP was asserted)in RO but did RW. Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: Ia1fea35c6dd7ff126d273a8c86b453cfad7ae8b0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2801174 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* dedede/raa489000: Enable ASGATE when sourcingAseda Aboagye2021-04-0110-1/+50
| | | | | | | | | | | | | | | | | | | | With the previous change to disable the ASGATE from the charger side, this actually ended up breaking sourcing VBUS. This commit enables the ASGATE when we are attempting to source VBUS. BUG=b:183220414 BRANCH=dedede TEST=Build and flash madoo, plug in a Type-C sink, verify that VBUS is sourced. TEST=Verify that DUT can PR_Swap with peripheral. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I1938f2b827e57a04ef72e2ad35ad6ff29ce18712 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2795073 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* Reland "dedede/raa489000: Disable ASGATE from READY state"Aseda Aboagye2021-04-0110-25/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of f7fbc629f0655229cc7ffdadfb18c9e13118e3d2 Original change's description: > dedede/raa489000: Disable ASGATE from READY state > > On the boards which use the RAA489000, we keep the ADC enabled while > giving VBUS control to the charger side. This can cause a situation > where VBUS is not quite zero volts when a charger is removed. This > commit uses the charger side registers to control the ASGATE when > selecting our active charge port. This is done in addition to the > existing implementation which uses the TCPCI registers to control > ASGATE. When we place the parts into low power mode, we move the VBUS > control from the TCPC side of the IC to the charger side. It should > be safe to issue both commands as if the TCPC side has control, the IC > ignores the setting from the charger side registers. > > BUG=b:183220414 > BRANCH=dedede > TEST=Build and flash madoo, plug in charger to port, unplug, verify > that VBUS falls to < 200mV and decays from there. > > Signed-off-by: Aseda Aboagye <aaboagye@google.com> > Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058 > Tested-by: Aseda Aboagye <aaboagye@chromium.org> > Reviewed-by: Diana Z <dzigterman@chromium.org> > Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Bug: b:183220414 Change-Id: I36db53f3e13ba848308cd7e0c94a1b5a3551c600 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2797549 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* Trogdor: Change the flash size to 512KBWai-Hong Tam2021-04-011-1/+1
| | | | | | | | | | | | | Rev-2 uses another EC SKU, which has 512KB flash instead. BRANCH=None BUG=b:184071830 TEST=Built the image and checked it bootable on rev-2. Change-Id: I51c6c280e9c58e371ef0288afe4736508a950edd Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2798976 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* asurada: support USM in S0Eric Yilun Lin2021-04-012-1/+15
| | | | | | | | | | | | | | Enable USM to cancel the charging noise. BUG=b:175168848 TEST=EN_5V_USM=1 in S0, =0 in S3. BRANCH=asurada Change-Id: I7cdfafee8b826c8cb165e3aa3d487afdf6625ff9 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793850 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* voxel: add refresh key maskBen Chen2021-04-011-0/+1
| | | | | | | | | | | | | | | | Add refresh key mask to enable recovery mode. BUG=b:183353285 BRANCH=volteer TEST=Press and hold Esc + Refresh , then press Power. check recovery mode is workable. Change-Id: I21d465f42f4e3be428ed3c4f4011a76ce6870008 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2780457 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* kappa: Remove motion_sense taskGwendal Grignou2021-03-314-42/+0
| | | | | | | | | | | | | | Kappa does not have any sensors, no need to have motion_sense task. BUG=none BRANCH=kukui TEST=compile Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: Icda2beec15278b25d7c9da1413152ba1e3ad608a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2791770 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Devin Lu <Devin.Lu@quantatw.com>
* brya: Update generated-gpio.inc from spreadsheetCaveh Jalali2021-03-312-3/+2
| | | | | | | | | | | | | | | | | | | | | This refreshes generated-gpio.inc from the latest GPIO spreadsheet. * ACOK_EC_OD has been renamed to ACOK_OD (the name is now consistent with the next rev. of the board) * GPIO85 is not marked as ALT mode. NPCX9 support code ignores ALT on this pin as it should never be in ALT mode (i.e. no functional change). BRANCH=none BUG=b:173575131 TEST=buildall passes, brya boots Change-Id: I541c52e83ff169818edcbc0716a84193ae9bd6a4 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2780840 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* dedede/raa48900 boards: Apply 4% ICL reductionMike Lee2021-03-312-4/+6
| | | | | | | | | | | | | | | | | | The RAA48900 charger IC seems to over draw its contract by roughly 4%. This commit simply modifies our input current limit to account for that. BUG=b:147463641 BRANCH=dedede TEST=Build and flash storo and sasukette,verify that input current limit is reduced and is under the contract. Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I37bc4fba776114f3386d79ff118edd7add104a67 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2780856 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Henry Sun <henrysun@google.com>
* dooly: update thermal parameterZick Wei2021-03-311-2/+2
| | | | | | | | | | | | | | | | This patch update prochot trigger/release point. trigger at 75C release at 65C BUG=b:174514010 BRANCH=puff TEST=verify prochot setting as intended. Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: Iaa7090d3cb401cbd442ddcfa06a34f483abdaec8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2796835 Reviewed-by: Andrew McRae <amcrae@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org>
* Add a common header for board_vbus_sink_enable()Simon Glass2021-03-317-14/+0
| | | | | | | | | | | | | | | | This function prototype is defined in quite a few files, none of which is visible to Zephyr. Add a prototype in one place and remove the others. BUG=b:183296099 BRANCH=none TEST=make buildall Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I2f3f1e08614408e7b8f6bb0633a478765c73beaa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789800 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Add a common header for board_is_sourcing_vbus()Simon Glass2021-03-3137-57/+0
| | | | | | | | | | | | | | | | This function prototype is defined in lots of files, none of which is visible to Zephyr. Add a prototype in one place and remove the others. BUG=b:183296099 BRANCH=none TEST=make buildall Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ia324327a69b117483ab9ee5c85eba93c0fb5ad9c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789799 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Revert "dedede/raa489000: Disable ASGATE from READY state"Aseda Aboagye2021-03-3110-62/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit f7fbc629f0655229cc7ffdadfb18c9e13118e3d2. Reason for revert: Breaks sourcing of VBUS. Original change's description: > dedede/raa489000: Disable ASGATE from READY state > > On the boards which use the RAA489000, we keep the ADC enabled while > giving VBUS control to the charger side. This can cause a situation > where VBUS is not quite zero volts when a charger is removed. This > commit uses the charger side registers to control the ASGATE when > selecting our active charge port. This is done in addition to the > existing implementation which uses the TCPCI registers to control > ASGATE. When we place the parts into low power mode, we move the VBUS > control from the TCPC side of the IC to the charger side. It should > be safe to issue both commands as if the TCPC side has control, the IC > ignores the setting from the charger side registers. > > BUG=b:183220414 > BRANCH=dedede > TEST=Build and flash madoo, plug in charger to port, unplug, verify > that VBUS falls to < 200mV and decays from there. > > Signed-off-by: Aseda Aboagye <aaboagye@google.com> > Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058 > Tested-by: Aseda Aboagye <aaboagye@chromium.org> > Reviewed-by: Diana Z <dzigterman@chromium.org> > Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Bug: b:183220414 Change-Id: Ibf6c161adca9981a065e969b6c3b73dd408ef1ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2796411 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
* dedede/raa489000: Disable ASGATE from READY stateAseda Aboagye2021-03-3010-25/+62
| | | | | | | | | | | | | | | | | | | | | | | | | On the boards which use the RAA489000, we keep the ADC enabled while giving VBUS control to the charger side. This can cause a situation where VBUS is not quite zero volts when a charger is removed. This commit uses the charger side registers to control the ASGATE when selecting our active charge port. This is done in addition to the existing implementation which uses the TCPCI registers to control ASGATE. When we place the parts into low power mode, we move the VBUS control from the TCPC side of the IC to the charger side. It should be safe to issue both commands as if the TCPC side has control, the IC ignores the setting from the charger side registers. BUG=b:183220414 BRANCH=dedede TEST=Build and flash madoo, plug in charger to port, unplug, verify that VBUS falls to < 200mV and decays from there. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I8e8c8cc32575d18c9d3d1210ed3c5cf69ad5ca4b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2793058 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* genvif: Use VIF overrides by defaultAbe Levkoy2021-03-30143-0/+429
| | | | | | | | | | | | | | Use board-specific override files when generating VIFs for boards. BUG=b:172276715 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I197365018ceb8197c22d631cebf4cbce1c0119f7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785506 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Cozmo: Remove tablet mode relative functionSue Chen2021-03-303-3/+6
| | | | | | | | | | | | | | For Cozmo is clamshell, it doesn't need tablet mode function. BUG=b:183454206 BRANCH=icarus TEST=make sure the DUT doesn't change to tablet mode while the TABLET_MODE_L is low. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I74b5d35b69a19c6fb99ee94ba7ff4e81b94dee35 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784339 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* cret: Initial EC image set gpiojohnwc_yeh2021-03-303-40/+22
| | | | | | | | | | | | | Initial gpio for cret. BUG=b:181325655 BRANCH=None TEST=This ec bin file can boot on madoo. Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I8d6e0b534503bf08e5f81f739543337e92af19b2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2787949 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* blipper: Implement keyboard function.wuzhongtian2021-03-302-4/+5
| | | | | | | | | | | | | | | Blipper delete the function row key of "forward" and add a new function key of "snapshot". BUG=b:182018600 BRANCH=dedede TEST=make -j BOARD=blipper Change-Id: I8124c3e051d15034268b3ffd23935c8dfe15d4b7 Signed-off-by: Zhongtian Wu <wuzhongtian@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2786800 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* quiche: Add console command to change lane control signalScott Collyer2021-03-301-0/+32
| | | | | | | | | | | | | | | | | | | There is a gpio signal controlled by the EC to communicate to the MST hub if 2 lane or 4 lane DP should be trained. The lane control GPIO signal must be set when the MST is in reset. This CL adds a console command 'dp_lane' to execute this sequence. BUG=b:183288657 BRANCH=None TEST=verified lane control is low for 'dplane 4' and high following 'dplane 2' Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I65d197ad55e86bba9b9ea5374c89cc6505b1100f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2682788 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org>
* quiche: Add support for C2 usbc portScott Collyer2021-03-293-7/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 3rd usbc port (C2) is type-c only port which is managed directly by the PS8803 TCPC, but C2 has a PPC and the EC needs to control VBUS on/off via the PPC. This CL adds an interrupt handler to track the signal that indicates when the TCPC is in Attached.SRC or Unattached.SRC. In addition, the PPC for C2 must be initialized at the board level as this port is not managed by the TCPMv2 stack. BUG=b:171915198 BRANCH=None TEST=Used C -> A adapter, verifed that when connected C2 is in Attached.src and removed in Unattached.SRC. Validated bus signals with TotalPhase trace. Also checked have a device connected to this port enumerates at the host. > [28.613330 C2: State = Unattached.SRC] [36.500398 C2: State = Attached.SRC ] [135240.133949] usb 1-2.2.1: new full-speed USB device number 87 ... [135240.229223] usb 1-2.2.1: New USB device found, idVendor=046d, ... [135240.229246] usb 1-2.2.1: New USB device strings: Mfr=1, ... [135240.229257] usb 1-2.2.1: Product: BOOM 3 [135240.229267] usb 1-2.2.1: Manufacturer: Logitech [135240.229276] usb 1-2.2.1: SerialNumber: 000001 Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Ie2583ae9271333e2ecd9561eed60fab6cdb4fda1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2519799 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org>
* Use generic voltage reduce function instead of provided by boardPatryk Duda2021-03-2914-188/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch switches implementation of input voltage reduction to generic one. It removes reduce_input_voltage_when_full() function from board code and defines CONFIG_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV with appropriate voltage. Affected boards: - Ampton - Asurada - Cherry - Dratini - Jinlon - Liara - Nocturne BUG=b:182546058 BRANCH=none TEST=Compile firmware for affected boards. TEST=Flash EC ToT on one of affected boards. Charge battery to full. Shutdown board and check if voltage is reduced. Power on board, check if previous voltage is restored. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I8f285e75c11f84f4711d5e6a4008174b6fb639cf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2773219 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* gumboz: add thermal protect parameterZick Wei2021-03-292-0/+102
| | | | | | | | | | | | | | | | | | | This patch add thermal protect parameter for gumboz(same as dirinboz): All trigger/release by charger thermistor, Charging current 0.5A: Trigger > 58’C ; Release < 57’C CPU PROCHOT: Trigger > 63’C ; Release < 62’C Set USB-C0 port to 1.5A: Trigger > 63’C ; Release < 62’C BUG=b:181803301 BRANCH=zork TEST=verify EC behavior intended when trigger/ release thermal protection. Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: Ia2d840536b6e96474de293c7a014ae76816eb607 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2780818 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* galtic: Add GPIO_EC_ENTERING_RW2Michael5 Chen12021-03-262-1/+16
| | | | | | | | | | | | | | | | | | | | This commit add a new GPIO, GPIO_EC_ENTERING_RW2 which does the same thing as GPIO_EC_ENTERING_RW. However, it's on a pin that's more will behaved around init time. This commit also overrides the board_pulse_ec_entering_rw() function such that both lines can be pulsed. BUG=b:181740591 BRANCH=dedede TEST=make board=galtic Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: Ibc65bafed0374e6356311b0e4c2133ea3be7d4f6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2786885 Reviewed-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* lindar: remove config for firmware qualjerry2.huang2021-03-261-3/+0
| | | | | | | | | | | | | | 1.Remove CONFIG_SYSTEM_UNLOCKED 2.Remove CONFIG_BYPASS_CBI_EEPROM_WP_CHECK BUG=b:183477746 BRANCH=firmware-volteer-13672.B-main TEST=make buildall Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com> Change-Id: I02d87972f465e8343d41f2fe0be84acfb17a1ae1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2783549 Reviewed-by: Keith Short <keithshort@chromium.org>
* dratini: Set TCPC_AUX_SWITCH to 0xC on Port 0 on CCD enableBoris Mittelberg2021-03-253-0/+29
| | | | | | | | | | | | | | | | | | When the screen brightness is changed, DP sends signal on AUX channel. This causes CCD mode to be disconnected. This patch sets the MUX to aux+ <-> sbu2, aux- <-> sbu1 to fix it. Same change as I3dba1bdfd44a921077a2f60dec17119bb0077238 BUG=b:183123775 BRANCH=none TEST=manually verify servod doesn't exit when screen brightness is changed Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: Iff91a4b4753b42ee42cd5baac36ba8243d966ce0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785192 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Drobit: Enable FRSEric Herrmann2021-03-253-0/+21
| | | | | | | | | | | | | | | Set flag and configure GPIOs to enable Fast Role Swap. Clear the GPIOs passed to the PPC driver for boards which don't support FRS due to older PPC versions. BUG=b:148144711 TEST=make buildall BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: I1236d6c4e9e3c66ce7289817f5737186163b7144 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2752340 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Voema: Enable FRSEric Herrmann2021-03-252-0/+3
| | | | | | | | | | | | | Set flag and configure GPIOs to enable Fast Role Swap. BUG=b:148144711 TEST=make buildall BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: Ia3586858c89f37e42284c5e585adf1aca36c67a8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2752271 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* cret: Initial EC imageIan Feng2021-03-258-0/+1235
| | | | | | | | | | | | | | | | | | | | Create the initial EC image for the cret variant by copying the waddledoo reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.5.0). BUG=b:181325655 BRANCH=None TEST=make BOARD=cret Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Change-Id: Icdc166c2189dc35512818884c72aa553f3b7c0f1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764219 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Copano: Enable FRSEric Herrmann2021-03-252-0/+3
| | | | | | | | | | | | | | Set flag and configure GPIOs to enable Fast Role Swap. BUG=b:148144711 TEST=With an FRS device with power passed through, remove the power cord and check that the device doesn't re-enumerate. BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: Ie3159c53a290b3aeed8c18a1cae19446b712791c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2754491 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* spherion: enable GPIO_EN_SPL_Z at hibernate processBen Chen2021-03-251-1/+0
| | | | | | | | | | | | | Default implement GPIO_EN_SLP_Z at hibernate process BUG=b:183574877 BRANCH=asurada TEST=make buildall PASS Change-Id: I58c26fa8505c4f528507e5eae4d48d4751fceda5 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784325 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* asurada_scp: don't cache DRAMTzung-Bi Shih2021-03-251-1/+1
| | | | | | | | | | | | | Don't cache DRAM. BRANCH=asurada BUG=b:167466842 TEST=make BOARD=asurada_scp Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: If73b0f37d1ea0cc66dce4ec9f53ae7d55fc027d5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784337 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* Nami: Set TCPC_AUX_SWITCH to 0xC on Port 1 on CCD enableDaisuke Nojiri2021-03-253-1/+27
| | | | | | | | | | | | | | | | | | | | | When the screen brightness is changed, DP sends signal on AUX channel. This causes CCD mode to be disconnected. This patch sets the MUX to aux+ <-> sbu2, aux- <-> sbu1 to fix it. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/113266817 BRANCH=nami TEST=Verify on Syndra UART over CCD doesn't get disconnected when the screen brightness is changed. Change-Id: I3dba1bdfd44a921077a2f60dec17119bb0077238 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1595212 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
* asurada_scp: add MDP serviceYunfei Dong2021-03-254-1/+106
| | | | | | | | | | | | | | | | | | Adds MDP service. BRANCH=asurada BUG=b:167466842 BUG=b:176313143 BUG=b:167469080 BUG=b:167469726 BUG=b:167468918 BUG=b:167469732 TEST=make BOARD=asurada_scp Change-Id: Iadddfec204d998cb1b6e226da29238c6cf86813b Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2710229 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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