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* osiris,volmar: disable TCPC VCONNBoris Mittelberg2023-02-222-4/+1
| | | | | | | | | | | | | | | | | Disable TCPC sourcing VCONN via SYV682. The CC pins on SYV682 are not 5V tolerant, use internal VCONN sourcing instead. BUG=b:180973460 BRANCH=none TEST=make buildall Change-Id: I5a852a998cfcef613c720e200b542e43eece9cd5 Signed-off-by: Boris Mittelberg <bmbm@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4279301 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: YH Lin <yueherngl@chromium.org> Commit-Queue: YH Lin <yueherngl@chromium.org>
* dibbi: Update EN_PPVAR_BJ_ADP_OD and its uses.Sam McNally2023-02-212-3/+3
| | | | | | | | | | | | | | It should be open-drain, and the logic has been inverted since the original definition. BUG=none TEST=none BRANCH=none Change-Id: I78092db8314baa512589a79bfe538fb4401f4cab Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4273905 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* dibbi: Change EC_RECOVERY_BTN_OD to active high.Sam McNally2023-02-212-2/+3
| | | | | | | | | | | | | | EC_RECOVERY_BTN_OD is active-high, so set the recovery button flags for this signal to BUTTON_FLAG_ACTIVE_HIGH. BUG=b:268309238 TEST=dibbi boots in normal mode BRANCH=none Change-Id: Id7f7e65e0e3a35097de4865a8578bd0b47aea5eb Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4240911 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* dibbi: Keep barrel-jack presence interrupts enabled.Sam McNally2023-02-211-2/+0
| | | | | | | | | | | BUG=b:269666578 TEST=none BRANCH=none Change-Id: Ie641fc103e6ff2fb31f73717599ebbfc80ad1e19 Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4273626 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* dibbi: Set maximum PD input to 20V, 3.25A, 65W.Sam McNally2023-02-211-1/+5
| | | | | | | | | | | BUG=b:269666625 TEST=dibbi negotiates 65W BRANCH=none Change-Id: Ic26e683235b066ca12f02c4196a44e4bc237e7d0 Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4273625 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* chip/stm32: ADC fixesJes B. Klinke2023-02-212-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ADC drivers for STM32L4 (and L5) seems to have significant flaws. The chip has the ability to continuously perform ADC conversions according to a set sequence of channels and bit depths. In addition to that, the chip can perform a one-off "injected" sequence of up to four channels, in response to a hardware or software trigger. The driver uses only a software triggered "injected" sequence to convert two pre-set channels. The code of `adc_read_channel()` has some odd properties, though. On first invocation, it sets up the injected sequence to consist of the two configured ADC channels. Each invocation takes one particular ADC channel number as input, but the code simply kicks of the sequence of two channels to read, and then returns the relevant of the two, discarding the other reading. The has the needless limitation that it cannot be used with more than two ADC channels. Since it is permitted to modify the list of channels in the injected sequence as long as no conversion is in progress, it would be more straightforward, if each invocation of `adc_read_channel()` would reconfigure the injected sequence to consist of a single channel, the one requested. This CL makes that change. BUG=b:269621551 TEST=Read and of a dozen ADC channels on HyperDebug Change-Id: I62387979faf494cfefc3b6e7dd1d9a1954017ae6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4265223 Tested-by: Jes Klinke <jbk@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com> Auto-Submit: Jes Klinke <jbk@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com>
* aurash: update EC related functionScott Chao2023-02-2015-586/+522
| | | | | | | | | | | | | | | | | | | | | - Support power on by HDMI/ DP monitor. - Remove third type-c port. - Update GPIO setting according to schematic. - Update power_monitor function according to aurash design. - Update ADC channel setting. - Update Barrel adapter to 90w and 135w. - Remove all fan related function. - Update thermal shutdown point from thermal team request. BUG=b:269212574 BRANCH=none TEST=make buildall Change-Id: Ic268884c9e633e65774394445ca24bcabf23614f Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4248461 Reviewed-by: Ricky Chang <rickytlchang@chromium.org> Commit-Queue: Ricky Chang <rickytlchang@chromium.org>
* board/hyperdebug: Add DAC supportJes B. Klinke2023-02-162-11/+117
| | | | | | | | | | | | | | | | | | The HyperDebug board is a versatile debugger, serving a similar purpose to uServo for development boards for Google Security Chips or other microcontrollers, rather than full Chromebooks. This change allows the DAC circuits of HyperDebug to be enabled, and particular voltages specified, through console commands. BUG=b:269621551 TEST=Observe AndreiBoard detect CCD connect/disconnect Change-Id: I6850821da9b7a3ef576eee9a458f43466df0692c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4259215 Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Jes Klinke <jbk@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org>
* Marasov: Disable TCPC VCONNMichael5 Chen12023-02-161-1/+0
| | | | | | | | | | | | | | | Disable PS8xxx tcpc vconn. BUG=b:269050063 BRANCH=none TEST=On marasov, make sure the host-side CC pin are <3.3v when sourcing VCONN. Change-Id: I1f979acfc1f157f42ab0036935c477c998b1bb1f Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4243898 Commit-Queue: Kyle Lin <kylelinck@google.com> Reviewed-by: Kyle Lin <kylelinck@google.com>
* dibbi: Configure USB_C0_SBU_MUX_FAULT as input, without pull-down.Sam McNally2023-02-151-1/+1
| | | | | | | | | | | | | It isn't currently used, but is connected, with an external pull-up. BUG=b:268309238 TEST=none BRANCH=none Change-Id: Ifc0a75b45a1b112a63b0c394086445220bf6f17d Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4252440 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* dibbi: Split I2C configuration from baseboard and add HDMI-related busesSam McNally2023-02-152-2/+49
| | | | | | | | | | | BUG=b:269367960 TEST=i2cscan can scan all buses BRANCH=none Change-Id: Iccb3a28a24de4e82119d50a1f581162ac58913cf Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4252439 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* kuldax: Using fw_config return peripheral charger countben chen2023-02-153-2/+25
| | | | | | | | | | | | | | | | | | | | Using fw_config control in board_get_pchg_count() to determined pchg_count at runtime. some sku w/wo pheripheral charger. peripheral_charger flag address bit5 size 1 of cbi fw_config: 0 :PERIPHERAL_CHARGER_ENABLE 1 :PERIPHERAL_CHARGER_DISABLE BUG=b:267700817 BRANCH=None TEST=make BOARD PASS Change-Id: I19fe61b910274a5f1594d3d9410dfcb317a61c46 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4252926 Reviewed-by: Derek Huang <derekhuang@google.com> Commit-Queue: Derek Huang <derekhuang@google.com>
* brask,coachz,constitution,kuldax,redrix: add board_get_pchg_count()ben chen2023-02-155-5/+25
| | | | | | | | | | | | | | | | | | implement board_get_pchg_count() to determined pchg_count at runtime. BUG=b:267700817 BRANCH=None TEST=make BOARD PASS TEST=make run-pchg_fuzz PASS Cq-Depend:chromium:4218552 Cq-Depend:chromium:4248459 Change-Id: Ic14a841132c732f30887b4e3ef8e7f7a8c8728ae Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4248823 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Derek Huang <derekhuang@google.com>
* dibbi: Update board_vbus_source_enabled() to use ppc_is_sourcing_vbus().Sam McNally2023-02-151-1/+1
| | | | | | | | | | | BUG=b:269050050 TEST=Boot dibbi from USB-C power BRANCH=none Change-Id: Id811b71710a53bd64e13648dfa52093d9b23bcda Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4240912 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* dibbi: Remove configuration for CC lines.Sam McNally2023-02-152-10/+5
| | | | | | | | | | | | | Dibbi is using a PPC so no explicit action is required for CC lines. BUG=b:268309238 TEST=none BRANCH=none Change-Id: I6976a3392ba18639fb41bd27076dfde7ffb3c76a Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4240908 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* dibbi: Update USB-C i2c channel.Sam McNally2023-02-151-0/+2
| | | | | | | | | | | | | USB-C is using i2c bus 2 on dibbi, so update the config to channel C. BUG=b:268309238, b:269050050 TEST=EC can communicate with USB-C-related peripherals. BRANCH=none Change-Id: I65261250c93faf5d3d16714fa0a53ae369fb3c81 Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4240907 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* dibbi: Add USB-A port 3.Sam McNally2023-02-152-1/+2
| | | | | | | | | | | BUG=b:269065101 TEST=all USB-A VBUS are enabled BRANCH=none Change-Id: I4d7f3c88424ab198d84c6be38b99cd29254f76fe Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4240909 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* dibbi: Invert BJ_ADP_PRESENT_L.Sam McNally2023-02-152-8/+8
| | | | | | | | | | | | | | BJ_ADP_PRESENT is active-high now, so rename and invert the logic for anything depending on its value. BUG=b:268309238 TEST=Barrel-jack adapter is correctly detected BRANCH=none Change-Id: I37116ab3501c8aa30a8cc848be40a1ee9e107821 Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4240906 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* board/hyperdebug: Atomic setting of gpio mode and levelJes B. Klinke2023-02-141-1/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, we use `opentitantool transport init` to configure all pins according to some "standard" initial values. This involves configuring open drain / push pull as well as setting default levels. Unfortunately, if a pin is for instance listed as being "open drain, high level" as default (no active drive), we currently have to make the choice of whether to first configure the pin as open drain output, or first configure the output to high. If we first configure the level to become 1, we run the risk that the pin was set as push pull, and it will be actively be driven high for a fraction of a second, before it is set to open drain, and goes floating. If we instead first configure the mode to become open drain, then we risk that the pin was previously in input mode, with a "leftover" value of 0 in the output register, meaning that switching to open drain mode will briefly drive the pin drongly down, before the level is set to 1. In order to avoid glitches, this CL introduces a "gpio multiset" command, which can be used to simultaneously set the output level, pin mode, and weak pull configuration of the pin. BUG=b:192262089 TEST=Watch tast test work Change-Id: Ie16771e5cb676af02a0dabe454e4173721629b30 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4245899 Tested-by: Jes Klinke <jbk@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jes Klinke <jbk@chromium.org>
* aurash: Initial EC imageZoey Wu2023-02-1415-0/+2081
| | | | | | | | | | | | | | | | | | | Create the initial EC image for the aurash variant by copying the brask reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.5.0). BUG=b:263691099 BRANCH=None TEST=make BOARD=aurash Change-Id: I78a4e4adc9122ce66e35278e8ff299752279c90b Signed-off-by: Zoey Wu <zoey_wu@wistron.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4236324 Tested-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Commit-Queue: Ricky Chang <rickytlchang@chromium.org> Reviewed-by: Ricky Chang <rickytlchang@chromium.org>
* brask: move externs to header fileScott Chao2023-02-143-3/+3
| | | | | | | | | | | | | | During pre-upload check, it will show warning that "externs should be avoided in .c files". BUG=b:268581418 BRANCH=none TEST=make buildall Change-Id: I973390da06bf6594212391bf48d6940f4ac29a07 Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4238096 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* omnigul: Modify power parametersLogan_Liao2023-02-131-3/+3
| | | | | | | | | | | | | | | | | Base on power team modify power parameters. BUG=none BRANCH=none TEST=make BOARD=omnigul success. Change-Id: Id3823dcf67f77c1e77ead10c18debfadc54a3364 Signed-off-by: Logan_Liao <Logan_Liao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4238059 Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Kyle Lin <kylelinck@google.com> Commit-Queue: Kyle Lin <kylelinck@google.com> Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com>
* zephyr: move usbc interrupt handler to shimJason Yuan2023-02-091-2/+2
| | | | | | | | | | | | | | | | | | | TCPC interrupt no longer uses gpio-int. Instead the shim tcpc completely handles its own interrupt. An optional config is added to allow projects to use the legacy tcpc interrupt. The program intelrvp is excluded from this CL. BUG=b:254148652 TEST=twister, usbc charging on villager, lazor, and xivu BRANCH=none Change-Id: Ieeb4fb61ca6cf8f44df212a6cf520d265cff5147 Signed-off-by: Jason Yuan <jasonyuan@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4108942 Commit-Queue: zhi cheng yuan <jasonyuan@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Diana Z <dzigterman@chromium.org>
* jinlon: Adjust TEMP_SENSOR_4 thresholds to reduce fan speed in clamshellDevin Lu2023-02-091-14/+14
| | | | | | | | | | | | | BUG=b:261696880 BRANCH=firmware-hatch-12672.B TEST=Thermal team verified thermal policy is expected. Change-Id: Ia376eddaaaf8036aa244011a7cf097e8f883ca7a Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4225587 Tested-by: Devin Lu <devin.lu@quantatw.com> Commit-Queue: Devin Lu <devin.lu@quantatw.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Casta : Change charging voltage and currentYongBeum.Ha2023-02-081-1/+6
| | | | | | | | | | | | | Change charging voltage(8600mV) and current(3200mA). BUG=b:266123223 BRANCH=firmware-octopus-11297.B TEST=build, update and check charging voltage and current Change-Id: Ib7b520fbb355ac7ad73634e21271569ed5073d10 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4199245 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Omnigul: implement keyboard matrixfelixtw_chang2023-02-085-2/+241
| | | | | | | | | | | | | | | enable customization define, implement customization matrix. BRANCH=none BUG=b:267817382 TEST=make -j BOARD=omnigul pass Change-Id: Ie1a555ef77a2fa6bad17150a7c20b0cc1133b5a2 Signed-off-by: felixtw_chang <felixtw_chang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4220796 Reviewed-by: Kyle Lin <kylelinck@google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Kyle Lin <kylelinck@google.com>
* Nautilus : Change charging voltage and currentYongBeum.Ha2023-02-081-0/+6
| | | | | | | | | | | | | | Change charging voltage(8600mV) and current(3200mA). BUG=b:266123223 BRANCH=firmware-octopus-11297.B TEST=build, update and check charging voltage and current Change-Id: I589692ae43231b2af61a7ced129b5340a5cbd041 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4199247 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Henry Sun <henrysun@google.com>
* test: Check TPM_SEED is reset after rebootFiras Sammoura2023-02-082-0/+2
| | | | | | | | | | | | | | | Add a unit test to check that TPM_SEED is reset after the FPMCU is rebooted. BRANCH=None BUG=b:143471027 TEST=test/run_device_tests.py -b dartmonkey -t tpm_seed_clear TEST=test/run_device_tests.py -b bloonchipper -t tpm_seed_clear Change-Id: I478c8ffcfc75c8188438d56958f0bf16f752efef Signed-off-by: Firas Sammoura <fsammoura@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4199160 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* dibbi: Add PPC supportLiam Flaherty2023-02-074-20/+57
| | | | | | | | | | | | | | Update to enable I2C functions to enable/disable USB charging via PPC. BUG=b:267742066 BRANCH=none TEST=make -j BOARD=dibbi Change-Id: Ieb6785bd944805f5ab665cb8f58a4cd72904520f Signed-off-by: Liam Flaherty <liamflaherty@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4227433 Reviewed-by: Sam McNally <sammc@chromium.org> Reviewed-by: Adam Mills <adamjmills@google.com>
* board/hyperdebug: Correct TX/RX namingJes B. Klinke2023-02-061-2/+2
| | | | | | | | | | | | | TX/RX on the console pins had been flipped in the GPIO list. (Not that they are used for GPIO very often.) BUG=b:266832220 Change-Id: I6555a1633888755320a4d6fdbc5c18b0593d0a6d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4221978 Reviewed-by: Jett Rink <jettrink@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org> Commit-Queue: Jes Klinke <jbk@chromium.org>
* board/hyperdebug: Increase clock speedJes B. Klinke2023-02-061-3/+15
| | | | | | | | | | | | | Optimize gpio edge detection latency, by increasing CPU clock speed from 16Mhz to 104MHz. BUG=b:266832220 Change-Id: Ic93c4c68832b870df4246bc11851d08fa43c4a81 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4221977 Commit-Queue: Jes Klinke <jbk@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* dibbi: Updating EC pinout based on latest schematicsAdam Mills2023-02-064-66/+81
| | | | | | | | | | | | BUG=b:257833880 TEST=make -j BOARD=dibbi BRANCH=dedede Change-Id: Iec7296d47565714682d6ad59bf4e4273da631cb0 Signed-off-by: Adam Mills <adamjmills@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4199243 Reviewed-by: Liam Flaherty <liamflaherty@chromium.org> Reviewed-by: Sam McNally <sammc@chromium.org>
* constitution: Initial EC imageDavid Wu2023-02-0315-0/+2123
| | | | | | | | | | | | | | | | | | Create the initial EC image for the constitution variant by copying the brask reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.5.0). BUG=b:267539938 BRANCH=None TEST=make BOARD=constitution Change-Id: I5ccb29db2b7397924b190ef96e872f18af5205f8 Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4216995 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: David Huang <david.huang@quanta.corp-partner.google.com>
* omnigul: Modify GPIO configLeila Lin2023-02-0311-554/+57
| | | | | | | | | | | | | | | | | Base on HW design remove the unused parts. BUG=b:263223008, b:262494863 BRANCH=none TEST=build omnigul success Change-Id: Id245d2c5d8380954d569329a7ddf2b6c424e08f0 Signed-off-by: Leila Lin <leilacy_lin@compal.corp-partner.google.com> Signed-off-by: Logan_Liao <Logan_liao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4179444 Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Commit-Queue: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Kyle Lin <kylelinck@google.com>
* board/hyperdebug: Add logic analyzer supportJes B. Klinke2023-02-023-87/+699
| | | | | | | | | | | | | | | | This CL adds special purpose commands to initiate monitoring (edge detection) on a given set of pins, and record the precise time of each edge, allowing it to be streamed to the host machine (currently in a text-based format on the console.) BUG=b:266832220 TEST=Run with local OpenTitan tool changes Change-Id: I899010e258cd5420a176645e9bba634229cb41be Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4166671 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jes Klinke <jbk@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org>
* Omnigul : Enable Battery parameter.Logan_Liao2023-01-312-27/+29
| | | | | | | | | | | | | | | | | | According to the power team, modify the battery parameter for Omnigul. BUG=b:263691095 BRANCH=none TEST=make BOARD=omnigul Change-Id: I85c85803bcf1140c32cf12ad4cab56614b1304cb Signed-off-by: Logan_Liao <Logan_Liao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4160821 Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Commit-Queue: Kyle Lin <kylelinck@google.com> Reviewed-by: Kyle Lin <kylelinck@google.com> Code-Coverage: Kyle Lin <kylelinck@google.com> Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
* Casta : Change Maximum Voltage of BatteryYongBeum.Ha2023-01-311-1/+1
| | | | | | | | | | | | | Change max voltage of battery to 8600mV BUG=b:266123223 BRANCH=firmware-octopus-11297.B TEST= build, update and check charging voltage Change-Id: I4caaf30dceb87dc8de6c41aa2e996f89fc7f00d8 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4199244 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Nautilus : Change Maximum Voltage of BatteryYongBeum.Ha2023-01-311-1/+1
| | | | | | | | | | | | | Change max voltage of battery to 8600mV BUG=b:266123223 BRANCH=firmware-octopus-11297.B TEST= build, update and check charging voltage Change-Id: Iccb17ad8e503e8743a4de591d79375810f86c2f8 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4199246 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Zephyr: Add configs for F75303matt_wang2023-01-302-0/+14
| | | | | | | | | | | | | | | | | | The F75303 driver needs a Kconfig, and needs to build in zephyr. Add support to the device tree parsing and definition for the F75303 i2c temperature sensors. LOW_COVERAGE_REASON=no emulator for the F75303. b:266089368 BUG=b:262409595 BRANCH=none TEST=build the project that using the F75303 success.(mushu nami markarth) Change-Id: Id769718fbcda3e4213c50c90c9c7918bc0a31a43 Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4142061 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Chao Gui <chaogui@google.com> Reviewed-by: Chao Gui <chaogui@google.com>
* board/hyperdebug: Split board.c into several filesJes B. Klinke2023-01-265-514/+537
| | | | | | | | | | | | | | In preparation for more board-specific logic for HyperDebug, this CL breaks GPIO and SPI parts of board.c into separate files. BUG=none TEST=make BOARD=hyperdebug Change-Id: I2df152e3aada246264ca2f9d0cb7722b1fda3477 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4166663 Commit-Queue: Jes Klinke <jbk@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org>
* board/hyperdebug: Enable DFUJes B. Klinke2023-01-254-4/+44
| | | | | | | | | | | | | | | Configure HyperDebug board similar to Servo V4, in that the RO copy of the firmware is replaced with a 4kB bootloader, whose only task is to decide whether to jump to STM ROM DFU bootloader or to RW. BUG=b:192262089 TEST=Upgrade firmware on STM32L5 based Nucleo board using dfu-util Change-Id: I5a9461a5a9b28642b274f26affa1c64a4c2bfe11 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4183942 Reviewed-by: Brian Nemec <bnemec@google.com> Commit-Queue: Jes Klinke <jbk@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org>
* Omnigul : Change Charger from BQ25720 to ISL9241.Logan_Liao2023-01-162-9/+8
| | | | | | | | | | | | | | | | | | This patch change Charger from BQ25710 to ISL9241. BUG=b:262693403 BRANCH=none TEST=make BOARD=omnigul success Change-Id: Idedbcb7cf7beed994b46d8853a21088894313781 Signed-off-by: Logan_Liao <Logan_Liao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4160822 Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Kyle Lin <kylelinck@google.com> Commit-Queue: Kyle Lin <kylelinck@google.com>
* Default charger current derating to 5%Peter Marheine2023-01-1261-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not derating seems like a common pitfall that can cause problems with some chargers, so set a reasonably conservative default. 5% is chosen as the most common derating factor used among boards today (counting occurrences in source code, so this may undercount 5% occurrences because several projects set 5% at the project rather than board-level): 1. 38 x 5% 2. 23 x 4% 3. 6 x 10% 3. 2 x 3% 4. 1 x 2% Boards that currently configure this setting are modified only to continue building without warnings regardless of whether they use the new default value in order to signal that they were explicitly configured. BUG=b:260774380 TEST=make buildall / zmake build -a BRANCH=none Change-Id: I017849d38572fbc48090ae1fa2c539b808e426f9 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4109651 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* vell: Lower priority to set board id 5 GPIOsDevin Lu2023-01-121-1/+1
| | | | | | | | | | | | | | | | | | To avoid setting board id 5 GPIOs early to cbi data ready. BUG=b:253957352 BRANCH=none TEST=On Vell. System boots. Shorting the SEQ_EC_ALL_SYS_PG to ground is able to see the system shutting down. Change-Id: I99d9fb9572e15908dbb3df30d5c4327d76b4bbf3 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4145098 Tested-by: Devin Lu <devin.lu@quantatw.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: Devin Lu <devin.lu@quantatw.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* kuldax: Remove the bring-up featuresben chen2023-01-121-0/+3
| | | | | | | | | | | | | | | This patch remove CONFIG_CMD_POWERINDEBUG configuration. BUG=b:255199345 BRANCH=none TEST=make BOARD kuldax PASS Change-Id: I23d55bba87c0bd4443d3222a221a305171d45d40 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4160811 Reviewed-by: Derek Huang <derekhuang@google.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: caveh jalali <caveh@chromium.org>
* omnigul: Initial EC imagejamie_chen2023-01-1219-0/+2278
| | | | | | | | | | | | | | | | | | Create the initial EC image for the omnigul variant by copying the brya reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.5.0). BUG=b:263060849 BRANCH=None TEST=make BOARD=omnigul Change-Id: Ic663c847cd46c539ac2ed72cac587de55c4319ff Signed-off-by: jamie_chen <jamie_chen@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4131895 Reviewed-by: Kyle Lin <kylelinck@google.com> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* board/hyperdebug: Enumerate and configure SPI ports via USBJes B. Klinke2023-01-112-2/+146
| | | | | | | | | | | | | | | | | | | Add console commands: spiget and spisetspeed The first can list information on all SPI port or a particular port. The other, spisetspeed, can be used to modify the clock divisor between SPI transactions. BUG=b:192262089 TEST=Observed different clock speeds on analyzer Change-Id: I113b8bdef48f58d5941212c8a8598f3293b5da91 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4078008 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Jes Klinke <jbk@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Commit-Queue: Jes Klinke <jbk@chromium.org>
* board/hyperdebug: Add support for OCTOSPIJes B. Klinke2023-01-111-21/+308
| | | | | | | | | | | | | | | Add ability to perform individual SPI transactions on the OCTOSPI controller, so far using only 1 data wire in each direction. BUG=b:192262089 TEST=Observe HyperDebug communicate with SPI flash Change-Id: I19ffdc510c00c8fdce636f2400c395184bbf8e87 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4089988 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Tested-by: Jes Klinke <jbk@chromium.org> Commit-Queue: Jes Klinke <jbk@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* include/spi.h: Introduce CONFIG_SPI_MUTABLE_DEVICE_LISTJes B. Klinke2023-01-093-2/+3
| | | | | | | | | | | | | | | | | | | | Previously, one of the effects of CONFIG_FINGERPRINT_MCU was that spi_devices[] would not be declared 'const', enabling run-time reconfiguration of clock divisor or other fields of the struct. This CL separates the const-ness into a new configuration option, which can be enabled by others (such as HyperDebug.) BUG=b:192262089 TEST=./util/compare_build.sh -b nocturne_fp Change-Id: I895a4ec04759706be14bf544fb9b9d66c3b46131 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4110029 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Tested-by: Jes Klinke <jbk@chromium.org> Reviewed-by: Andrea Grandi <agrandi@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Jes Klinke <jbk@chromium.org>
* dratini: Set TCPC_AUX_SWITCH to 0xC on Port 0 on mux setBoris Mittelberg2023-01-092-0/+25
| | | | | | | | | | | | | | | | | | When the screen brightness is changed, DP sends signal on AUX channel. This causes CCD mode to be disconnected. This patch sets the MUX to aux+ <-> sbu2, aux- <-> sbu1 to fix it. BUG=b:183123775 BRANCH=main,firmware-hatch-12672.B TEST=manually verify servod doesn't exit when screen turns off due to the device being idle for 8 minutes on dragonair Change-Id: I2c8761f81252d87d7aca4878023fb4db3d73812a Signed-off-by: Boris Mittelberg <bmbm@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4098335 Reviewed-by: Mary Ruthven <mruthven@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
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