summaryrefslogtreecommitdiff
path: root/board
Commit message (Collapse)AuthorAgeFilesLines
* kunimitsu_pd: enable kunimitsu PD buildstabilize-7356.BWenkai Du2015-08-122-0/+3
| | | | | | | | | | | | | | Symbolic link kunimitsu_pd to glados_pd folder. Disable PD test build until issue is fixed. BUG=chrome-os-partner:43142 TEST=emerge-kunimitsu chromeos-ec and check EC and PD binaries Change-Id: Ic0f1d73246333d8ec7752bb4c42b1c0ac220b5c3 Signed-off-by: Wenkai Du <wenkai.du@intel.com> Reviewed-on: https://chromium-review.googlesource.com/292841 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* glados: Enable `tests` buildShawn Nematbakhsh2015-08-121-0/+2
| | | | | | | | | | | | | | | `tests` build was previously disabled for glados due to errors building power/skylake.c. Properly undef the chipset config to make `tests` work for all skylake platforms. BUG=None TEST=`make BOARD=glados tests` BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I7a730cdd5e30a932ff0cd1f3beef77873b9e0630 Reviewed-on: https://chromium-review.googlesource.com/292910 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* glados: Turn off LEDs in hibernateShawn Nematbakhsh2015-08-111-0/+30
| | | | | | | | | | | | | | | Use new board-level hibernate GPIO state function to turn off LEDs in hibernate. BUG=chrome-os-partner:43807 TEST=Manual on Glados with subsequent commit. Run 'hibernate' on console, verify that LED remains off. Press power button, verify that board wakes. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Id695df9b5e75514f8f807a894b63f71676b66f92 Reviewed-on: https://chromium-review.googlesource.com/292317 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* strago: Increase chipset stack size.Kumar, Gomathi2015-08-111-1/+1
| | | | | | | | | | | | | | | | | | Chipset task is overflowing and causing runtime crash. Increasing the chipset task stack size by 128 bytes. BUG=chrome-os-partner:43329 BRANCH=none TEST=Build/flash EC and boot the platform to OS. Change-Id: I57dfa23080d11e6e86a6ba5917bf28d05239bc0d Signed-off-by: Kumar, Gomathi <gomathi.kumar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/291393 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Divagar Mohandass <divagar.mohandass@intel.com> Tested-by: Divagar Mohandass <divagar.mohandass@intel.com> (cherry picked from commit bd478accd09fa488cd7c9c73e5714ff02dd0a89b) Reviewed-on: https://chromium-review.googlesource.com/292321
* cr50: code modifications to support FPGA B1Vadim Bendebury2015-08-111-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The new FPGA version adds a lot of few features, while temporarily cutting off some existing capabilities like clocking configuration (hardwared clocks used instead), pinmux assignment for SPS interface (hardwared connections used), etc. This patch removes some now unused code, modifies some configuration items and adds TODO_FGPA comment blocks highlighting code which needs to be reviews next time FPGA version changes). The new register definitions file is derived from hardware description. BRANCH=none BUG=chrome-os-partner:43791 TEST=with these changes in place the B1 board boots to the console prompt. Change-Id: I78ec6b2831a44cbfd40ee726a5d3c2cc11bf2cfa Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/291855 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cr50: control adding USB specific code using proper configVadim Bendebury2015-08-111-1/+1
| | | | | | | | | | | | | | | | CONFIG_USB is a better indicator that USB related code needs to be included. BRANCH=none BUG=none TEST=none - this patch helped compartmentnalize the code when debugging bringup on a new platform. Change-Id: I12ef77325591853d73e2e09f7c491954e272bde9 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/291854 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Cyan: Added Clamshell/Tablet mode supportli feng2015-08-102-19/+31
| | | | | | | | | | | | | | | | | | | | | Enabled lid angle calculation. Clamshell/Tablet mode is decided by lid angle. Accelerometers are set to be active in S3 also. Trackpad is enabled/disabled by GPIO TP_INT_DISABLE. Keyboard scan and trackpad are enabled in clamshell mode and disabled in tablet mode. Removed enable_keyboard() since keyboard is enabled in clamshell S0 and S3. BUG=chrome-os-partner:41353 TEST=Verify in clamshell mode, system can be waken up from S3 by keyboard/trackpad; And not tablet mode. BRANCH=None Change-Id: Ic5fb5a562e8426288eae2fb9815a213fe5033955 Signed-off-by: li feng <li1.feng@intel.com> Signed-off-by: Shamile Khan <shamile.khan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/287341 Reviewed-by: Shawn N <shawnn@chromium.org>
* Discovery: Configure USART2 as a loopback deviceAnton Staaf2015-08-103-4/+51
| | | | | | | | | | | | | | | | | | | | | | This gives a test case for the USART driver on an STM32L. Eventually this will be a good place to test that even in a downclocked configuration the STM32L USART driver can handle 115200 without dropping characters. This also gives a convenient build test for the STM32L version of the USART driver. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Cross connect a Discovery and a Discovery-stm32f072 Change-Id: Ifb8dfc1179e8a0be84390d36e0bc3ff15f4f4685 Reviewed-on: https://chromium-review.googlesource.com/288979 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Trybot-Ready: Anton Staaf <robotboy@chromium.org>
* glados: Implement LED functionality on ECMike Hsieh2015-08-082-3/+140
| | | | | | | | | | | | | | | | Implement LED control for glados for both red and green LED. BUG=chrome-os-partner:40848 BRANCH=none TEST=Manually tested on glados with following commands: ectool led battery red ectool led battery green ectool led battery off Change-Id: I1b4f8c8c8f26779a11185ea8bbc6536d1d7f97b1 Signed-off-by: Mike Hsieh <mike.m.hsieh@intel.com> Reviewed-on: https://chromium-review.googlesource.com/289439 Reviewed-by: Shawn N <shawnn@chromium.org>
* stm32: Deprecate SPI protocol version 2.Aseda Aboagye2015-08-082-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that v3 support is in the cros_ec kernel driver and depthcharge, deprecate support for the old v2 protocol. At some point in the future, support for the v2 protocol will dropped entirely. Boards that require support for the V2 protocol should enable the following config option. #define CONFIG_SPI_PROTOCOL_V2 BUG=chrome-os-partner:20533 BRANCH=None TEST=make -j buildall tests TEST=Flash jerry, AP & EC boot successful. TEST=`ectool protoinfo` shows only version 3 supported on jerry. TEST=Flashrom still works on jerry. Change-Id: I72d3aee00879314b936cc0b1002c9883550b1f1a Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/291411 Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* mediatek: Fix llama buildShawn Nematbakhsh2015-08-064-0/+31
| | | | | | | | | | | | | | The llama AP_RESET GPIO differs in polarity from oak. BUG=chromium:517250 TEST=`make buildall -j` BRANCH=None Change-Id: Id06bf39e758b528d154936a3e8561704fdf4cce9 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290950 Commit-Queue: Rong Chang <rongchang@chromium.org> Tested-by: Rong Chang <rongchang@chromium.org>
* Kunimitsu: Add board version supportVijay Hiremath2015-08-052-3/+5
| | | | | | | | | | | | | BUG=none TEST=Verified correct board version is returned via "version" console command. BRANCH=none Change-Id: I1449ea0883437f782c950f772b4539eedc64770d Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/290578 Reviewed-by: Shawn N <shawnn@chromium.org> Tested-by: Divya Jyothi <divya.jyothi@intel.com> Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
* usb_charger: move common usb charger code out of board directoryAlec Berg2015-08-055-285/+17
| | | | | | | | | | | | | | | | | | | | Move common USB charger code out of board directory including setting VBUS supplier when VBUS changes, and initializing BC1.2 supplier types on init. This also enables re-enabling of Pericom BC1.2 detection interrupts when VBUS is changed on all boards that use USB_CHG task. BUG=chrome-os-partner:42292 BRANCH=none TEST=make -j buildall. Tested on glados and samus by plugging in a few different chargers and making sure we charge. Change-Id: Ib102fbf7a6aace998e6fcb6d35f3c97e5f03f5c2 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290453 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* oak: Add LED control for rev3Ben Lok2015-08-051-59/+162
| | | | | | | | | | | | | | | | | | | | | Oak rev3 has 2 dual-color LEDs to indicate the AP power & battery status. The behavior has been redefined and distinguish from rev2 by board version API. BRANCH=none BUG=none TEST=manual 1. define CONFIG_BOARD_OAK_REV_2 in board.h make -j BOARD=oak 2. define CONFIG_BOARD_OAK_REV_3 in board.h make -j BOARD=oak both cases should be built successfully. And Check the PWR & BAT LED. Change-Id: Ic60d6f91002c3534e4c12a27e5c89bc2d0a1ecfd Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/290061 Reviewed-by: Rong Chang <rongchang@chromium.org>
* usb_charger: configure boards to disconnect USB when UFP.Alec Berg2015-08-044-0/+4
| | | | | | | | | | | | | | | | Configure boards whose chipset cannot be a USB UFP to disconnect USB lanes when the data role is UFP. BUG=none BRANCH=strago TEST=make -j buildall. tested on glados by adding ccprintf to usb_charger_set_switches(). verified when we are DFP, USB 2 switches are connected and when we are UFP, they are disconnected. Change-Id: Ic8c817a0cc21b56ee67239e8cc81d5cbbda8d4de Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290422 Reviewed-by: Shawn N <shawnn@chromium.org>
* usb_charger: cleanup: move setting usb 2 switches to usb_chargerAlec Berg2015-08-047-83/+0
| | | | | | | | | | | | | | Move function to set D+/D- switches from board directory to usb_charger module. BUG=none BRANCH=strago TEST=make -j buildall Change-Id: I5c5997c799cecea90448444863167af860a8f3e1 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/290421 Reviewed-by: Shawn N <shawnn@chromium.org>
* oak: updates GPIO setting for rev3Ben Lok2015-08-042-36/+56
| | | | | | | | | | | | | | | | | | Modify the GPIO seeting according to the Oak rev3 schematic. BRANCH=none BUG=none TEST=manual 1. define CONFIG_BOARD_OAK_REV_2 in board.h make -j BOARD=oak 2. define CONFIG_BOARD_OAK_REV_3 in board.h make -j BOARD=oak both cases should be built successfully. Change-Id: I0336624a5a2d356a4c2eb9ffb812ebffb4f5f7c3 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/289475 Reviewed-by: Rong Chang <rongchang@chromium.org>
* it8380dev: modify sspi moduleDino Li2015-08-043-4/+9
| | | | | | | | | | | | | | | | | We need to modify SSPI module to fix compile fail due to SPI flash common code changed. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console "spi_flashinfo" OK Change-Id: I83bb645eff1e5874d849056df518eea92340c39e Reviewed-on: https://chromium-review.googlesource.com/290089 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* glados: Add bd99992gw temperature sensorsShawn Nematbakhsh2015-08-032-1/+26
| | | | | | | | | | | | | BUG=chrome-os-partner:42156 TEST=Manual on Glados. Boot to S0, run "temps". Verify that temperatures start around 28C and begin to increase after system is powered-on for a long duration. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I3bebba4864c8e5b5b23e78947522e58311298bbd Reviewed-on: https://chromium-review.googlesource.com/289936 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* oak: Request different DP pin modes including multi-function.Ben Lok2015-08-031-5/+17
| | | | | | | | | | | | | | | | | Refer to commit 63786f24, apply same change to Oak. BRANCH=none BUG=none TEST=manual, 1. hoho + oak, pin mode = 'C' 2. dingdong + oak, pin mode = 'E'. 3. apple type-C HDMI multiport + oak, pin mode = 'D' and USB device enumerates as SuperSpeed. Change-Id: I14c6e7ffbe62a329be43f4157ca065db9142b44e Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/290014 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: don't enable try.src when battery is not present or too lowAlec Berg2015-08-021-2/+5
| | | | | | | | | | | | | | | | | | Don't enable try.src when battery is not present or <1% because try.src will temporarily cut off power to system. BUG=chrome-os-partner:43413 BRANCH=samus TEST=tested on samus using "battfake" ec command. when battery <1%, verified that try.src is disabled and when battery >=1% and the AP is on (dual-role toggling is on), then try.src is enabled. verified boot without battery succeeds on samus and glados. Change-Id: I64816bb7c9669bfeca61687bcd9a48da32e67945 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289854 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* tasks: Remove most task_start_called() calls.Aseda Aboagye2015-08-013-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | Now that HOOK_INIT hooks are called from a task switching context, most calls to task_start_called() should no longer be needed. This commit removes them. BRANCH=None BUG=chrome-os-partner:27226 TEST=make -j buildall tests TEST=Flash EC image onto samus and verify EC boot, AP boot, keyboard, lid, and tap-for-battery all functional. TEST=Flash EC image onto samus_pd and verify charging still works. TEST=Flash EC image onto ryu(P3) and verify that EC boot. TEST=Added ASSERT(task_start_called()) to the places where I removed task_start_called(). Booted samus, samus_pd, cyan, and ryu with AC inserted and verified that no ASSERT's were hit upon boot. Change-Id: Ic12c61862e85ca3a0a295beedbb4eeee6d5e515b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/285635 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
* skylake: Inhibit AP power-on until charge current limit is setShawn Nematbakhsh2015-08-011-0/+1
| | | | | | | | | | | | | | | | | | Inhibit AP power-on through the BATLOW pin, even if the system is unprotected, until our charger and current limit are initialized. Note that this feature is only functional on glados v2 since other skylake boards do not have BATLOW connected. BUG=chrome-os-partner:41258 TEST=Manual on glados v1 with rework. Remove battery and attach Zinger. Verify EC powers on and AP doesn't boot. Run `powerbtn`, verify that AP boots. Remove all power and attach battery, verify that EC powers on and AP boots. Also verify compilation on glados v2. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I55de857f7006777640f7853b7bde98ba97e8bd13 Reviewed-on: https://chromium-review.googlesource.com/287378
* glados: Free up program memory spaceShawn Nematbakhsh2015-08-011-0/+4
| | | | | | | | | | | | | | Remove the timerinfo console command and console help to free program memory space. BUG=None TEST=Build-only BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I6685bb7c83030c21bd975b64f217553d5a11c16b Reviewed-on: https://chromium-review.googlesource.com/289922 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* mec1322: Fix dedicated SPI port accessShawn Nematbakhsh2015-08-011-1/+1
| | | | | | | | | | | | | Correct spi_rx_option table, and use correct port for kunimitsu. BUG=chrome-os-partner:42304 TEST=Burn + boot glados BRANCH=None Change-Id: Ic52ecb48102a74d3c17ab06b6da24ee40659ef86 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289868 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* glados: Buffer AC status to the PCHDuncan Laurie2015-08-011-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | The AC presence input from the charger only goes to the EC and it needs to provide this signal to the PCH. At init time it is set to the current value and whenever the status changes it will be updated. This is used by PCH internal logic to determine whether to transition into Deep S3/S5 as those are not intended to be used when running on AC power. This is similar to how it worked on Samus except since the EC is off in G3 we don't need to force it low in that state and since there are not yet any additional hacks/workarounds here we can just do the work in a simple HOOK_AC_CHANGE handler. BUG=chrome-os-partner:41885 BRANCH=none TEST=boot on glados and verify PCH_ACOK is asserted when the device starts to charge and is deasserted when no cable is connected. Change-Id: Id7e6ca674e35c98594d09b86ab5bdf518f8b3984 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288922 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* ryu: remove SH UART debug and leftoversVincent Palatin2015-08-013-40/+4
| | | | | | | | | | | | | | | | | | | Remove the last pieces of external Sensor Hub support: - Sensor hub UART exported over case closed debugging - Sensor hub related GPIOs Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:38333 TEST=plug Suzy-Q to Smaug and test debug UARTs and SPI flashing Change-Id: I47b42f63647735bae37b9256e2704303c48b5854 Reviewed-on: https://chromium-review.googlesource.com/290115 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* ryu: dynamic switch between SPI and I2C sensors configurationGwendal Grignou2015-08-013-21/+52
| | | | | | | | | | | | | | | | | boards version 6 / 7 / 8 have an I2C bus to sensors. board version 0+ has a SPI bus to sensors On board v0, enable 3rd SPI port and use it to accel the accelerometer. BRANCH=smaug BUG=chrome-os-partner:42304 TEST=Check accel on SPI enabled Ryu board, on v7 and v0 boards, check closed case debugging and type-C features Change-Id: Ic8de2bb0f9d8a15f86a2c1ea98ef27613f090b22 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289960
* board: ryu: Enable SPI access to AccelGwendal Grignou2015-08-013-12/+33
| | | | | | | | | | | | Enable 3rd SPI port and use it to accel the accelerometer. BRANCH=smaug BUG=chrome-os-partner:42304 TEST=Check accel on SPI enabled Ryu board. Change-Id: If17eff36e2a3ea0fe59d6677aa41ba5f802e33b6 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288516
* ryu: Increase CHIPSET stack sizeGwendal Grignou2015-08-011-1/+1
| | | | | | | | | | | | | | We are very close from the current limit (456 bytes). Increase the limit to 640 bytes. BRANCH=smaug TEST=Hit the limit while debugging, check the new limit. BUG=none Change-Id: I6673000bcac48b88599082eb797f0782c4fee454 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/289837 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* oak: fix default input current limitRong Chang2015-07-311-3/+4
| | | | | | | | | | | | | | | | | | | Oak takes power from type-C charger. The default input current limit should set to 512mA default, not the maximum current for battery charging. BRANCH=none BUG=none TEST=manual load on oak and plug an empty battery. check EC uart console on PD state change when plug type-C charger. Signed-off-by: Rong Chang <rongchang@chromium.org> Change-Id: I113fea5ff1e8afc053f76c21820f202e4b3edfec Reviewed-on: https://chromium-review.googlesource.com/287610 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
* stm32: Enable 3rd SPI interfaceGwendal Grignou2015-07-304-13/+13
| | | | | | | | | | | | | | | | Remove assumption of only one SPI master going to the SPI flash. SPI3 can be used as second SPI master. Define a new module type, SPI_FLASH, that can be turned on/off when flash is not in used without impacting other SPI masters. BRANCH=smaug BUG=chrome-os-partner:42304 TEST=Test on Ryu board. Change-Id: Ie72471cea6f0a357ffee055a610d032580a794e7 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288514
* accel: mechanical changes from i2c_addr to addrGwendal Grignou2015-07-305-12/+12
| | | | | | | | | | | | | | | Encode both the I2C address and SPI GPIO CS in addr field. Mechanical change to rename i2c_addr into addr. BRANCH=smaug TEST=compile BUG=chrome-os-partner:42304 Change-Id: I1c7435398deacb27211445afa27a08716d224c06 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288513 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: David James <davidjames@chromium.org>
* common: change interface to SPI flashGwendal Grignou2015-07-3018-23/+81
| | | | | | | | | | | | | | | | Allow more than one SPI master. Add CONFIG variables to address the system SPI flash. To have SPI master ports, spi_ports array must be defined. BRANCH=smaug TEST=compile BUG=chrome-os-partner:42304 Change-Id: Id43869f648965c1582b7be1c7fb3a38f175fda95 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288512 Commit-Queue: David James <davidjames@chromium.org>
* glados: implement and enable fast charging profilesAlec Berg2015-07-292-0/+178
| | | | | | | | | | | | | | | | Implement and enable custom charging profiles on glados to allow us to charge faster. BUG=chrome-os-partner:42864 BRANCH=none TEST=load on glados and charge at room temp. verify using "charger" command that the battery current matches the expected fast charging current for the given temp range. Change-Id: I7b213fd1724e9df09ada89ca27b05e0540b4de2a Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288208 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cyan: Increase chipset stack size.Divagar Mohandass2015-07-281-1/+1
| | | | | | | | | | | | | | Chipset task is overflowing and causing runtime crash. Increasing the chipset task stack size by 128 bytes. BUG=chrome-os-partner:43329 BRANCH=none TEST=Build/flash EC and boot the platform to OS. Change-Id: I4e444cc48979c74810851ab2625b982fdabdeb73 Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com> Reviewed-on: https://chromium-review.googlesource.com/289112 Reviewed-by: Shawn N <shawnn@chromium.org>
* acpi: Ensure continuity of memmap data with a read cacheShawn Nematbakhsh2015-07-284-4/+4
| | | | | | | | | | | | | | | | | | | | | For multi-byte ACPI memmap reads, we previously had a mutex to ensure data continuity. A better approach is to use a read cache. Since the kernel will enable burst mode before reading a multi-byte memmap variable and disable it afterward, we can populate the cache on the first read after enabling burst. This solution removes deadlock bugs, is contained entirely in acpi.c, and saves a deferred function. BUG=chromium:514283 TEST=Manual on Glados. Add prints in acpi_read, verify that multi-byte reads come from cache and non-burst reads continue to function as before. BRANCH=Cyan Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I74e4927bf2b433e31a9ff65d72820fa087c51722 Reviewed-on: https://chromium-review.googlesource.com/288871 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: enable try.src for necessary boardsAlec Berg2015-07-274-0/+4
| | | | | | | | | | | | | | | | | Enable Try.Src for Glados, Kunimitsu, Strago, and Oak so that they default to sourcing power when connecting to other dual-role devices. BUG=none BRANCH=strago TEST=make -j buildall Tested on glados by plugging in charger, hoho, and another dual-role device and making sure we resolve roles appropriately. Change-Id: I9393e30b35620eeda3ef1ef56366a97e59ba8054 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288247 Reviewed-by: Shawn N <shawnn@chromium.org>
* kunimitsu: disable asserts to save flash spaceAlec Berg2015-07-271-1/+2
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make -j buildall Change-Id: I8909001a093ebfd4ea482984855931b0764e2552 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288770 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* oak: Fix issue with pc_send_ec_int() functionScott2015-07-271-2/+0
| | | | | | | | | | | | | | | | | | | | There was a bug in this function where the bit for host_command was being set in the ec_status variable. This caused the ALERT# GPIO line to be held low which in turn caused the EC MCU to loop and keep reading the ALERT register. BUG=none BRANCH=none TEST=manual Tested against Zinger in both ports and Zinger and Samus at connected into each port. Verified that it established a PD contract for both ports and that the alert line was no longer being held low Change-Id: I5540440a68581521eb002411f728a4eac2f22caf Signed-off-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288252 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
* Discovery: Add OpenOCD configuration fileAnton Staaf2015-07-271-0/+19
| | | | | | | | | | | | | | | | | | | This allows the "make flash" command to work for the Discovery board. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j cd board/discovery make flash Change-Id: Ifa3c1eca58b80093b47a8fe25b47d29dba923d6b Reviewed-on: https://chromium-review.googlesource.com/287439 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* Atomic: Mark the modified uint32_t volatileAnton Staaf2015-07-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | The atomic_* functions are often used in contexts where the data they will operate on are volatile (due to being shared between tasks or a task and an interrupt handler). Adding volatile here makes using the atomic_* functions a little easier in those cases and removes a cast from the call sites (which could be obscuring a bug, if for instance the variable was modified to be a uint16_t). Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I71356eb3cf2c0506df38532eee767c7d78f9240e Reviewed-on: https://chromium-review.googlesource.com/287516 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* Strago: add HPD handling to policy layerVijay Hiremath2015-07-253-12/+71
| | | | | | | | | | | | | | | Ported the HPD handling to policy from Glados Change-Id: I293224fa5189c8827f1837877ffb791fddc7fb77 Reviewed-on: https://chromium-review.googlesource.com/285743 BUG=none TEST=make buildall -j BRANCH=none Change-Id: I982c6bd162b5ba239d4c9d066995c3d2fcaa97fd Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/287812 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Strago: Add support for USB-C muxesVijay Hiremath2015-07-253-4/+19
| | | | | | | | | | | | | | | | | | Ported the USB-C muxes from Glados Change-Id: I9d42108688a9070b982ae77f77633654bc6505ed Reviewed-on: https://chromium-review.googlesource.com/282281 BUG=none TEST=Tested the USB & DP status from "typec" console command. Observed usb_mux_set() & usb_mux_get() function are getting called and also the polarity of the USB-C is getting detected properly. BRANCH=none Change-Id: I0b169032ff77af9895311680413aed6c7d0fd4e2 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/287464 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Jerry: add "cleanup: fix all the header guards"Myles Watson2015-07-251-3/+3
| | | | | | | | | | | | | 104f811e6730e129a98fac6fc3941bbe0d0e857f BUG=chromium:511324 TEST=make buildall -j BRANCH=none Change-Id: I994e11c94413d7b8683b64e86807ba45b61c7eea Signed-off-by: Myles Watson <mylesgw@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288239 Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
* Jerry: add "cleanup: remove board_discharge_on_ac"Myles Watson2015-07-252-11/+0
| | | | | | | | | | | | | | Apply ac1cba419ab507163dcb6dc9d6be1401f3f1f518 to Jerry. BUG=chromium:511324 TEST=make buildall -j BRANCH=none Change-Id: I04f168f8e1a8e6a1e7c21cc3ce8c06315d9e7495 Signed-off-by: Myles Watson <mylesgw@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288238 Reviewed-by: Wai-Hong Tam <waihong@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Pinky: Remove obsolete boardMyles Watson2015-07-258-453/+0
| | | | | | | | | | | | | | Jerry is being used for FAFT in the lab. Remove Pinky instead. BUG=chromium:511324 TEST=make buildall -j BRANCH=none0 CQ-DEPEND=CL:288258 Change-Id: I03ddc74a4e72353f3408da8e374ad925baf00a35 Signed-off-by: Myles Watson <mylesgw@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288237 Reviewed-by: Wai-Hong Tam <waihong@chromium.org>
* strago: add initial PD supportKevin K Wong2015-07-256-15/+588
| | | | | | | | | | | | | | | | | | | Ported the PD support from Kunimitsu. kunimitsu: add initial PD support Change-Id: I0cb1edcf1703f55882f81c65e6359a45be4c1629 Reviewed-on: https://chromium-review.googlesource.com/281833 BUG=none TEST=Verified the PD negotiation on BCRD2. Device boots after plugging in the USB charger. Battery is getting charged. BRANCH=none Change-Id: If4efb0463118414fb02ad8e53700eac578a4954a Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/287124 Reviewed-by: Shawn N <shawnn@chromium.org>
* Cr50: Enable TPM-protocol data over the SPI busVadim Bendebury2015-07-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a module which runs on top of the SPS driver and implements the TCG SPI TPM protocol. Basic register read and write functions are implemented as well as rudimentary TPM state machine (claiming/releasing locality). An enhancement is made to the SPS driver to ensure that when the CS is deasserted the transmit FIFO is reset too, on the off chance of the CS going away mid transaction for whatever reason. In this implementation the slave is guaranteed to stall the master for a few bytes in both receive and transmit transactions, which is further aggravated by the fact that RX FIFO threshold is set to 8 (this is the minimum number of bytes the master has to send to wake up the slave). This could be fine tuned later, for instance made a parameter of the receive callback registration function. BRANCH=none BUG=chrome-os-partner:43025 TEST=trunksd initialization (with minor changes to accommodate new VID/DID and some status bits, to be published) succeeds with the cr50 connected to the USB/SPI cable. Change-Id: I28d37c3b57dde9adf59e81426efe4f58880cf0b0 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/285252
* cr50: Use distinct configuration option for SPI Slave supportVadim Bendebury2015-07-251-2/+2
| | | | | | | | | | | | | | | | | | | | SPI slave and master interfaces require very different code to support, they should have separate configuration options. Host command code printouts should use their own console channel. Using SPS to designate SPI Slave interface is not universally acceptable, a bug has been opened to discuss the alternatives and clean up the code. BRANCH=none BUG=chromium:512613 TEST=make buildall -j Change-Id: I6683286a221c4689ecc247fdfe8ebca529f3f458 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/286469 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
View Lorry Controller Status