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* pd: samus: do not request voltage within boost bypass deadbandAlec Berg2015-01-1710-0/+68
| | | | | | | | | | | | | | | | | Do not request a voltage that is within the deadband where we aren't sure if the boost or the boost bypass is on. BUG=chrome-os-partner:34938 BRANCH=samus TEST=test on samus with zinger. change the deadband to [10V, 20V] and see that we only negotiate to 5V. change the deadband to [13V, 20V] and see that we negotiate to 12V. change the deadband to [10V, 13V] and see that we negotiate to 20V. Change-Id: Id761aef35eeadfa2ab7d2ca31a48d4324625ab32 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/241528 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus_pd: Restore usb data switches after pericom resetShawn Nematbakhsh2015-01-173-2/+27
| | | | | | | | | | | | | | | | Resetting the pericom charge detector resets all registers, so it's necessary to restore the state of the USB data switches, in case we want them to be open. BUG=chrome-os-partner:35394 TEST=Manual on Samus. Trigger data swap to UFP, verify that USB switches become open. BRANCH=Samus Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I32b1cf92a05abaab9ecd532537790e72f8f409bc Reviewed-on: https://chromium-review.googlesource.com/240538 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* samus_pd: Don't re-request FW update if RW is already the latestShawn Nematbakhsh2015-01-171-5/+14
| | | | | | | | | | | | | | | | | | The AP informs us of the latest update image for a given device through the EC_CMD_USB_PD_RW_HASH_ENTRY command. If the latest update image is equivalent to our RW, we don't need to request an update. BUG=chrome-os-partner:35510 TEST=Manual on Samus. Flash latest RW FW to Zinger. Verify that subsequent Zinger insertion doesn't trigger the FW update host event. Insert RO-stuck Zinger and verify that FW update host event is triggered. BRANCH=Samus Change-Id: I300b150b3469e3fe32307e61273880a1a052ac5a Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/241172 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* samus_pd: remove assertsVincent Palatin2015-01-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove assertions to save flash space : free up 1728 bytes. Removing the string in assertions saves 1.1kB. (aka CONFIG_DEBUG_ASSERT_BRIEF) Fully removing assertion checks saves an additional 576 bytes. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:34489 TEST=make buildall and check firmware size. BASELINE 93bb7195 === build/samus_pd/ === FLASH 59.5k / 60.0k [ text 48.7k rodat 10.7k data 0.1k ] RAM 11.8k / 16.0k [ data 0.1k bss 11.7k ] CONFIG_DEBUG_ASSERT_BRIEF === build/samus_pd/ === FLASH 58.4k / 60.0k [ text 48.5k rodat 9.8k data 0.1k ] RAM 11.8k / 16.0k [ data 0.1k bss 11.7k ] undef CONFIG_DEBUG_ASSERT === build/samus_pd/ === FLASH 57.8k / 60.0k [ text 48.0k rodat 9.7k data 0.1k ] RAM 11.8k / 16.0k [ data 0.1k bss 11.7k ] Change-Id: Iebcb54ffe2849d1ad911abe1a5e6e21f3120af86 Reviewed-on: https://chromium-review.googlesource.com/241451 Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* mec1322: Specify SPI flash size in KBVic Yang2015-01-161-1/+1
| | | | | | | | | | | | | | | | For boards without a shared SPI, it's reasonable to use a SPI flash smaller than 1MB. Change the script to allow this. BRANCH=None BUG=chrome-os-partner:35308 TEST=Build strago and check the size of ec.spi.bin. Change-Id: Iabf7065d158be5f82c55e182e430858a12b18b6e Signed-off-by: Vic Yang <victoryang@google.com> Reviewed-on: https://chromium-review.googlesource.com/241111 Tested-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org>
* samus_pd: Respond to EC_CMD_PD_HOST_EVENT_STATUS with correct data typeShawn Nematbakhsh2015-01-161-1/+1
| | | | | | | | | | | | | | | EC_CMD_PD_HOST_EVENT_STATUS should respond with ec_response_host_event_status, not ec_response_pd_status. TEST=Manual on Samus. Send EC_CMD_PD_HOST_EVENT_STATUS, verify that resonse is four bytes. BUG=chrome-os-partner:35510 BRANCH=Samus Change-Id: I1a38591c7825f7e71c1fde8f3c1cab4be7852971 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/241193 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: updates to new connection state machineAlec Berg2015-01-161-0/+1
| | | | | | | | | | | | | | | | More updates to connection state machine. Adds CONFIG option for backwards compatible DFP (used on zinger), and change UFP state machine to debounce CC while VBUS is not present. BUG=chrome-os-partner:33680 BRANCH=samus TEST=load on samus and zinger and connect a bunch of times. also test samus to samus connection. Change-Id: Ia967eb6a17b10aa0c05a30686235fbf8a24e9a7b Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/240587 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus: remove learn mode workaround for new boardsAlec Berg2015-01-161-6/+19
| | | | | | | | | | | | | | | Remove learn mode workaround for backboosting on all new board revisions, starting with board 1. BUG=chrome-os-partner:34938 BRANCH=samus TEST=load on board with board revision 1 and make sure local var use_bkboost_workaround is 0. Change-Id: Ieccd7f86baca72d231b5e1491db824e53472eff7 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/241121 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* samus: add backboost detect interrupt and console commandAlec Berg2015-01-164-15/+28
| | | | | | | | | | | | | | | | Add backboost detect interrupt to latch if we ever start backboosting. Provide console command "bkboost" to read if this has ever happened. BUG=none BRANCH=samus TEST=load on samus and test console command. Note: have not tested that gpio actually goes high when backboosting Change-Id: Id7520a0a7777925af1611b8cdc295203d5b36187 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/241031 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* pd: Shorten console error strings.Todd Broch2015-01-161-1/+1
| | | | | | | | | | | | | | Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:34498 TEST=compiles, saves ~100 bytes Change-Id: Ic6e1d86198b3ca2b6582414254ca80f910ff1644 Reviewed-on: https://chromium-review.googlesource.com/241091 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* samus: Move delay for booting without a batteryDuncan Laurie2015-01-161-11/+11
| | | | | | | | | | | | | | | | | | | | In the samus power sequence steps there is a delay of 500ms when booting without a battery attached. This delay is currently set to happen in the S5->S3 transition time, which seems to confuse sequencing on some boards as we have already set DPWROK and RSMRST and so this 500ms delay can mess up timing. Move this delay to happen after 5V is up but before any of the triggers to the chipset to start sequencing are set. BUG=chrome-os-partner:31583 BRANCH=samus TEST=boot on samus pre-DVT and DVT without a battery Change-Id: I9519c336b121c86183c8368282f6c94b32987c16 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/241180 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* samus: add 200mA offset for input current limitAlec Berg2015-01-162-2/+6
| | | | | | | | | | | | | | | | On samus, set the input current limit ~200mA lower than the value we want to accomodate hardware inaccuracy. BUG=chrome-os-partner:34938 BRANCH=samus TEST=load on to unit and verify using "charger" command on ec console that the input current limit is 192mA less than expected. Change-Id: Ia6f82a1a622975715bd36c8c2a23e9677a6f18f0 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/240751 Reviewed-by: Shawn N <shawnn@chromium.org>
* samus: Update thermal table for adjusted Tj_maxDuncan Laurie2015-01-151-2/+2
| | | | | | | | | | | | | | | | | | | Update the thermal table to account for Tj_max changing from 100C to 105C so the thermal shutdown temperature is 104C instead of 99C. The warn and high(prochot) values are left the same as we do want to try and throttle with some room before the critical threshold will pull power. This is mostly a concern in the factory where they may run without active cooling during MLB testing. BUG=chrome-os-partner:35483 BRANCH=samus TEST=build and boot on samus Change-Id: Iae55d7ca41f81e6b7250585be374fb8dd1b6533c Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/241011 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* samus: Increase critical battery shutdown timeoutShawn Nematbakhsh2015-01-151-0/+2
| | | | | | | | | | | | | | | | Increase this timeout to 60s to allow powerd to cleanly shutdown the system, if we boot with a low-power charger and low battery. BUG=chrome-os-partner:35188 TEST=Manual on Samus. Deplete battery to 2% and boot system with 5V / 500mA charger attached. Verify that OS powers down before critical battery shutdown occurs. BRANCH=Samus Change-Id: I9429d05efad506a855507bfb5b76de41df2aac1e Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/240816 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: log important events for accessoriesVincent Palatin2015-01-152-1/+9
| | | | | | | | | | | | | | | | | | | Record in the PD log when we fail to verify the RW signature and when the RW partition is erased. Also log the faults on the power supplies. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:32785 TEST=flash a bad rw on Zinger. Change-Id: Ib62dcb0d407867151af0aaecc405533e894d773e Reviewed-on: https://chromium-review.googlesource.com/239913 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Add PD events loggingVincent Palatin2015-01-158-4/+43
| | | | | | | | | | | | | | | | | | | | | | Add a FIFO to log important events on the PD MCU and coming from the PD accessories. The retrieval of the accessories log from the accessories by the PD MCU is not implemented yet. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:32785 TEST=execute "ectool --name=cros_pd pdlog" before and after plugging Zinger charger. Change-Id: If96d73e711ff6ad64cfb99bd3e4d2d8f2643f19a Reviewed-on: https://chromium-review.googlesource.com/238854 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
* zinger: shrink text stringsVincent Palatin2015-01-142-9/+8
| | | | | | | | | | | | | | | | | Save a hundred bytes by making the debug messages less verbose ... Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=none TEST=make buildall Change-Id: I796bc2badc8f5756c1e44fceb5143e9e123d26b5 Reviewed-on: https://chromium-review.googlesource.com/240581 Reviewed-by: Alec Berg <alecaberg@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* jerry: Switch led to CONFIG_LED_POLICY_STDAlexandru M Stan2015-01-144-156/+7
| | | | | | | | | | | BUG=chrome-os-partner:35355, TEST=The led behavior should match the cros spec BRANCH=None Change-Id: I360e30ff72d8c874651544ea41479189a0ac7e08 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/240706 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* pd: samus_pd: Remove console 'typec' command.Todd Broch2015-01-141-0/+1
| | | | | | | | | | | | | BRANCH=samus BUG=chrome-os-partner:34489 TEST=builds, get ~500 bytes of flash back. Change-Id: I237a8bfb1944982a0c609654c6f7cc6eb00e2684 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/240360 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* nuc: Add all IC specific drivers of NPCX5M5GIan Chao2015-01-145-0/+290
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add npcx_evb in board folder for testing Add shared-spi arch support in common layer. Modified drivers for 1. Fan.c: console command “pwmduty”. 2. Pwm.c: for the issue when set duty to 0. 3. System.c: for hw reset only during system reset. 4. Flash.c: Fixed access denied bug of the flash driver for host command. 5. Comments from Patch Set 1 6. Comments from Patch Set 3 (except sha256.c) 7. Add openocd and flash_ec support for npcx_evb 8. Add little FW and spi-flash upload FW in chip folder 9. Add optional make rules for PROJECT_EXTRA 10.Replace CONFIG_SHRSPI_ARCH with CONFIG_CODERAM_ARCH and remove changes in common layer sources for shared-spi arch. (except sysjump) 11.Find the root cause of JTAG issue and use workaround method with SUPPORT_JTAG in clock.c 12 Execute hibernate in low power RAM for better power consumption 13 Add workaround method for version console command 14 Modified coding style issues by checkpatch.pl tool BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I5e383420642de1643e2bead837a55c8c58481786 Signed-off-by: Ian Chao <mlchao@nuvoton.com> Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/233742
* samus: Use motherboard temp sensors for fan control, tooBill Richardson2015-01-141-9/+10
| | | | | | | | | | | | | | | | | | | | | This adds some temp limits from the motherboard die sensors to use in determining the desired fan speed. I'm also bumping the minimum PECI temp up a bit, since it varies rapidly. At room temp the motherboard sensors will generally request a little bit of cooling, but in cool environments it's likely that the PECI changes will become the major annoying factor. BUG=chrome-os-partner:34789 BRANCH=ToT,samus TEST=manual Watch/listen to fans. They shouldn't turn off and on as much. Change-Id: I309132a053a052b456808e42261844dbf6442675 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/240435 Reviewed-by: Sameer Nanda <snanda@chromium.org>
* zinger: increase discharge timeout and fix fault conditionAlec Berg2015-01-141-1/+2
| | | | | | | | | | | | | | | | Increase discharge timeout delay to 275ms, which is the new tSrcSettle time. Also, fix fault condition so that we reset immediately upon receiving a fault. BUG=chrome-os-partner:35330 BRANCH=samus TEST=load on zinger and test with firefly many 20->5V transitions without a discharge error Change-Id: I13bc5d77889a37390603c6922c84b264c77d79ac Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/240399 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* zinger: fix reading of output and discharge gpio statesAlec Berg2015-01-141-2/+2
| | | | | | | | | | | | | | | | Change the reads of output enable and discharge gpio's to use the output data register (ODR) instead of reading input data register (IDR) because we are really intending to read it's output state, what we have set it to. BUG=none BRANCH=zinger TEST=make -j buildall. load on zinger and use it normally. Change-Id: I308bbb659aa26a9d0bca8caef6d1257fc1146ae9 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/240398 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* zinger: do an intermediate step when discharging from 20V to 5Vstabilize-storm-6683.BVincent Palatin2015-01-101-19/+54
| | | | | | | | | | | | | | | | | | | | | | If we discharge directly the output voltage from 20V to 5V under load, an undershot happens and we dip below the 5V UVP threshold. So when doing a down voltage transition from 20V to 5V, split it into 2 steps : a 20V->12V transition then once we are reached 12V, a 12V->5V transition. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:33794 TEST=connect Zinger to a Firefly and an electronic load. Using Firefly, ask for 20V->5V, 12V->5V and 20V->12V transitions, check the VBUS waveforms on the scope. Change-Id: Ie1e091ae6f1fee1fb7d4e3bd72edbe7491acd5ea Reviewed-on: https://chromium-review.googlesource.com/229732 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
* zinger: pre-compute RW hashVincent Palatin2015-01-101-6/+12
| | | | | | | | | | | | | | | | | To ensure we respond fast enough to the Discover Identity VDM (which timeout after 30ms), we need to pre-cache the RW hash at startup. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:35327 TEST=plug Zinger to a PD sink and check the PD protocol trace on Twinkie Change-Id: I9decdff358dd1ab9ac373ce8bfdd0402f5e21f04 Reviewed-on: https://chromium-review.googlesource.com/240080 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
* pd: implement new type-C connect state machineAlec Berg2015-01-103-4/+6
| | | | | | | | | | | | | | | | | | | | | Implement the new type-C connect state machine which removes lock and hold times and adds a debounce time to make sure CC lines settle before going into the attached state. This also adds detection of accessories, but doesn't do anything when an accessory is detected. BUG=chrome-os-partner:33680 BRANCH=samus TEST=test samus connected zinger and samus connected to samus. make sure that the connection is always formed. also tested with a third party with old state machine implementation and formed a connection every time. Change-Id: I91a7a6031bc35082cc19d7697142e4aa92ef46f2 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/238210 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus_pd: remove PWM moduleAlec Berg2015-01-102-1/+5
| | | | | | | | | | | | | | Remove PWM module which is not being used in order to save flash space. BUG=chrome-os-partner:34489 BRANCH=samus TEST=make -j buildall. view .map file and see we save ~760 bytes. Change-Id: Id107fb402a60c5ac7510982f8ace6bad46fb14d0 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/239912 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus_pd: Remove CONFIG_CONSOLE_HISTORY to save flash spaceShawn Nematbakhsh2015-01-091-0/+1
| | | | | | | | | | | | | | | | History is written by the victors, except when they run out of flash space. BUG=chrome-os-partner:34489 TEST=Build samus_pd, check ec.RO.map and verify 756 bytes were saved. Verify that 'history' no longer works on console and up arrow has no function. BRANCH=Samus Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: If512fe31f01cc35b0ef6fa60714b9df125818d64 Reviewed-on: https://chromium-review.googlesource.com/239971 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ryu: Debounce BC1.2 charger detection due to asynchronous pin contactVic Yang2015-01-092-37/+78
| | | | | | | | | | | | | | | | This is basically ryu version of CL:237241. BRANCH=ryu BUG=None TEST=Repeatedly plug in a DCP charger, and verify that it's detected correctly. Change-Id: I036d1b2a52249234f38428e98a3e5fd5db2354b9 Signed-off-by: Vic Yang <victoryang@google.com> Reviewed-on: https://chromium-review.googlesource.com/239914 Tested-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org>
* ryu: add charge managerAlec Berg2015-01-097-9/+175
| | | | | | | | | | | | | | | | Add charge manager to ryu to set how much current to draw from the port. BUG=none BRANCH=samus TEST=make buildall Signed-off-by: Alec Berg <alecaberg@chromium.org> Change-Id: Ia545532e1bf6586566c0b964d966b5d69c0d4b61 Reviewed-on: https://chromium-review.googlesource.com/230760 Tested-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org>
* pd: Queue initial DFP HPD till after DP Config VDM.Todd Broch2015-01-091-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VESA DisplayPort Alt Mode on USB Type-C Standard specifies: When DisplayPort Configuration is not selected (and the converter is driving its HPD output low), the converter shall track the current state of HPD, ready for appropriate indication when DisplayPort Configuration is subsequently selected. Not only are we violating specification here but it also causes a race between enabling DPout muxes to AUX line which in turn causes GPU to timeout trying to read EDID/DPCD on occasion. Change adds post_config function for DFPs alternate mode and in the case of DP it sets the dp_on flag there. This allows attention function to correctly defer HPD_HI that may accompany 'DP status' VDM to be queued (deferred) until such time that AUX muxes are enabled properly. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:35219 TEST=manual, using hoho & dingdong With kernel bootarg drm.debug=0x6 following cases all show these drm debug lines: [drm:i915_hotplug_work_func], Connector DP-2 (pin 5) received hotplug event. [drm:intel_dp_get_dpcd], DPCD: 12 14 c4 01 01 00 01 00 02 02 06 00 00 00 00 [drm:intel_hpd_irq_event], [CONNECTOR:38:DP-2] status updated from disconnected to connected case1: boot connected to external display case2: attach dongle to external display then samus case3: attach dongle to samus then to external display case4: connect/disconnect rapidly on type-C side case5: connect/disconnect rapidly on external display side. Change-Id: I40eab797fdd5090c8ad13fae2cd053b740d9a307 Reviewed-on: https://chromium-review.googlesource.com/239420 Trybot-Ready: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org>
* twinkie: build a combined firmwareVincent Palatin2015-01-085-7/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Build a Twinkie firmware image with the regular Twinkie sniffer firmware in the RO partition and a firmware behaving as a USB PD sink in the RW partition. The user can call the "twinkie sink" command to switch the USB PD sink firmware in the RW partition (and call "reboot" if he changes his mind and wants the sniffer back). Restore the ability of building different tasklists which was broken where the tests build was simplified. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall ./board/twinkie/build_rw_variant Try "twinkie sink" command on a Twinkie with the combined firmware. Change-Id: Ie489ce97a774ae7a22ac639c49a3d6e412e62de8 Reviewed-on: https://chromium-review.googlesource.com/237221 Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* twinkie: fix sink firmwareVincent Palatin2015-01-081-0/+6
| | | | | | | | | | | | | | | | | add a dummy pd_custom_vdm() function to be able to build again a Twinkie firmware in "PD sink" mode. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=./board/twinkie/build_rw_variant Change-Id: Ib0f82ecd1197300cf7b36f0f43c6b1cd03203557 Reviewed-on: https://chromium-review.googlesource.com/239234 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* twinkie: turn on/off VCONN INAVincent Palatin2015-01-081-0/+12
| | | | | | | | | | | | | | | | | | | | the VCONN INA is off by default to avoid a leakage path on CC2. Turn it on when asking for a VCONN measurement ("twinkie vconn"), then off aftwerwards. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=On the Twinkie command-line, "tw vconn" with the Twinkie interposed between a Samus and a DingDong. Change-Id: I8cd78b285512644af0824a44c735585b684fee66 Reviewed-on: https://chromium-review.googlesource.com/239212 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* samus: Fix flaw in power up inhibitShawn Nematbakhsh2015-01-081-7/+9
| | | | | | | | | | | | | | | | | | | | | | | Power up inhibit is intended to stop the AP from booting when the battery is in certain states. It works most of the time, but sometimes IN_PCH_SLP_S5_DEASSERTED is already set by the time we get to S5 and we incorrectly boot the AP. Thinking about this more, it's better to check the battery state in G3, before we transition to S5, to prevent the needless transition back to G3 if power up is indeed inhibited. BUG=chrome-os-partner:35182 TEST=Manual on Samus. Drain battery to 1% and attach charger. Press power button multiple times and verify that AP doesn't boot. Charge better to 2% and press power button. Verify that AP boots. BRANCH=Samus Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ib03c3f707f9d90d0a9cb07ada3738d00e2728c32 Reviewed-on: https://chromium-review.googlesource.com/239352 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* samus: pd: reject power swap if not in dual-role modeAlec Berg2015-01-081-2/+6
| | | | | | | | | | | | | | | Samus should reject request for a power swap if it is not in a dual-role mode, for instance if in S3 or lower. BUG=chrome-os-partner:35141 BRANCH=samus TEST=load on two samus'. turn on samus off, then request a power swap from the samus that is on and see that it is rejected. Change-Id: Ifb23febac967c981251c3932856e1e942818694f Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/238963 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: dingdong/hoho: Enable flash write-protectionVincent Palatin2015-01-082-12/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These USB type-C accessories don't have a write-protect GPIO. Add a configure flag (CONFIG_WP_ALWAYS) to force the flash write-protection on the dongles. Also set the read protection (by elevating RDP to level 1), so trying to unprotect the flash will trigger a full erase. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:35088 TEST=boot Hoho, check the flash OBR and WRPR registers: "rw 0x4002201c" / "rw 0x40022020" and the option bytes write-protect bits: "rw 0x1FFFF808" dump the logical state with "flashinfo" command. > rw 0x4002201c read 0x40022020 = 0xffff0002 > rw 0x40022020 read 0x40022020 = 0xffff0000 > rw 0x1FFFF808 read 0x1ffff808 = 0xff00ff00 > flashinfo Physical: 128 KB Usable: 128 KB Write: 2 B (ideal 2 B) Erase: 2048 B (to 1-bits) Protect: 4096 B Flags: wp_gpio_asserted ro_at_boot ro_now Protected now: YYYYYYYY YYYYYYYY ........ ........ Change-Id: I45bbc0bce40ecc174b6b8a1ebacf4f53d2fd372d Reviewed-on: https://chromium-review.googlesource.com/238893 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* USB: Add memcpy_from_usbram and update existing memcpyAnton Staaf2015-01-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Previously there was just a memcpy_usbram that copied to USB packet memory, and no routine to copy out. This adds the "from" version and renames and improves to "to" version. The improvement is that the new "to" version correctly handles unaligned beginning and endings of the region to be copied. These need to be read/modify/write accesses since the USB packet ram has to be manipulated in 16-bit chunks. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Verify that discovery-stm32f072 still enumerates and communicates correctly over USB. Change-Id: I94353e66ad0248d4e674abb29f9a88e979767655 Reviewed-on: https://chromium-review.googlesource.com/238764 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Trybot-Ready: Anton Staaf <robotboy@chromium.org>
* ryu: Re-enable low power idleVic Yang2015-01-081-0/+1
| | | | | | | | | | | | | | | | | Now that the problem with sysjump while the AP is running is fixed, let's re-enable low power idle. BRANCH=Ryu BUG=chrome-os-partner:34230 TEST=None Change-Id: I9b01330720f5cdd70741285cb4ab19699fbeb494 Signed-off-by: Vic Yang <victoryang@google.com> Reviewed-on: https://chromium-review.googlesource.com/238919 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org>
* nyan: Disable console command helpVic Yang2015-01-081-0/+1
| | | | | | | | | | | | | | | | | We're close to running out of flash space for Nyan. Disable console command help to free up some space. BRANCH=None (unless flash space is also running out on branchs) BUG=None TEST=Build and doesn't see error when linking. Change-Id: I24c9869f94a7c4741c1c88df795a1333562cbe9d Signed-off-by: Vic Yang <victoryang@google.com> Reviewed-on: https://chromium-review.googlesource.com/239235 Tested-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org>
* USB: Delete mass storage driverAnton Staaf2015-01-082-3/+0
| | | | | | | | | | | | | | | | | | | | | | | This was an attempt at providing support for flashing a SPI flash device over USB, but it suffered from being rather complex and large. A simpler solution of bridging SPI over USB directly and writing a SPI over USB driver for flashrom is being used instead. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I0d1ef8f17f5d6a4de46003096a8bff4a33b41cb7 Reviewed-on: https://chromium-review.googlesource.com/238763 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Trybot-Ready: Anton Staaf <robotboy@chromium.org>
* pd: ryu_p1: Remove console 'typec' command.Todd Broch2015-01-071-0/+1
| | | | | | | | | | | | | | | BRANCH=none BUG=none TEST=builds, get ~500 bytes of flash back. Signed-off-by: Todd Broch <tbroch@chromium.org> Change-Id: I031a858e2c497927680e8b897c2582ac4d1bf21b Reviewed-on: https://chromium-review.googlesource.com/238772 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org>
* samus: change power supply transition delay to 80msAlec Berg2015-01-071-2/+6
| | | | | | | | | | | | | | | Change samus power supply transition delay for Raiden ports to 80ms since it may take that long to turn off the power supply when doing a power swap. BUG=chrome-os-partner:34525 BRANCH=samus TEST=load onto samus, connect samus to samus and do a power swap. Change-Id: I20c2cb78f17168a5b69780de4af5ff478f6d5f87 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/238961 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus: pd: on PD connection, if sink, ask for power swapAlec Berg2015-01-0711-22/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For samus, on PD connection or on resume to S0, if we are a sink, and the other side supports PR_SWAP, then attempt a power swap. This adds callback functions into board policy file to check and issue power or data swaps if required by the product. BUG=chrome-os-partner:31195 BRANCH=samus TEST=connect samus to zinger and make sure zinger always ends up as SRC-UFP. connect samus to samus with both in S0 and see that they swap power roles once and not data roles. connect one samus in S0 to one samus in S5 and see that the one in S5 is sink. then when you boot the one in S5 it switches to a source. connect samus to samus with both in S0. do chgoverride 1 on one side to start charging from the other samus. then on the same side, turn off the machine (S5) and resume (S0), and see that it is still charging from the other samus (ie has not switched roles to source). Change-Id: Ifab2465fccef77448ac4771a3c2de1c867cbbec4 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/238302 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add CONFIG_CMD_HASH to optionally remove 'hash' console command.Todd Broch2015-01-063-0/+3
| | | | | | | | | | | | | | | | | | | | | Create optional config to remove 'hash' console command and undef it for a few space-constrained boards (ryu*, samus_pd). Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:34489 TEST=manual, - compile for ryu, samus_pd and save ~400bytes - 'hash' command no longer appears as a console command Change-Id: I054fd4473911dd362c2c1d171ee7aaad859d893a Reviewed-on: https://chromium-review.googlesource.com/238433 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* Ryu: Add dynamic USB pullup supportAnton Staaf2015-01-051-6/+2
| | | | | | | | | | | | | | | | | | | Ryu Proto 3 has a FET to control the D+ USB pullup. This change enables control of that FET using the board specific USB connect and disconnect functions. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I60cd4d36c19f235800980edc53003490589627c7 Reviewed-on: https://chromium-review.googlesource.com/234395 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* zinger: enable RO partition write-protectionVincent Palatin2015-01-053-0/+85
| | | | | | | | | | | | | | | | | | | | | Check the flash protection at startup, if the RDP is still at level 0 (no read protection) or if the RO partition is not write protected : - set the write protection on the first 16KB of flash (4 LSB of WRP0) - push the RDP to level 1, so SWD/serial monitor needs to fully erase the part before re-writing the code or the write-protection. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:34935 TEST=dump the content of the option bytes. Change-Id: I11af64365a6fbc34327b2e463eb8e2d369ffacd2 Reviewed-on: https://chromium-review.googlesource.com/238262 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* samus: Change Tj_max to 105CDuncan Laurie2015-01-051-1/+1
| | | | | | | | | | | | | Broadwell Tj_max is 105C vs Haswell at 100C. BUG=chrome-os-partner:28234 BRANCH=samus TEST=build and boot on samus Change-Id: I3dbbf5ed6c48c996371a243e31445e7a1fadd491 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/238304 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* zinger: maintain a 64-bit time counterVincent Palatin2015-01-032-10/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | Keep track of the high 32-bit of the microsecond time counter to avoid rollback issues. Just activate the timer "update" interrupt (aka UIE) and increment the high word on every update interrupt. Also disable STOP mode when we are going to roll-over during sleep to avoid missing the event. Given that's only happening every hour, we should not waste too much power. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:34159 TEST=patch the code to set the initial TIM2 value to 0xFC000000, wait for 67s, see the counter rolling and the high word incrementing, then verify that Zinger is still functional. Change-Id: I3a2f8fc09104d8ac75c581b2abcbcef99344def7 Reviewed-on: https://chromium-review.googlesource.com/238220 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* samus: when battery is full, and not in S0, stop chargingAlec Berg2015-01-032-30/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When battery is full and system is not in S0, then stop charging and allow battery to power the system. Once battery is no longer full and requests current, allow charging again. This is to work around power consumption issues in our AC input path. The charge override port is stored upon entering S3 and restored going back to S0 so that the charge override port is not affected by this. This also fixes lightbar so lightbar checks if battery is full instead of checking raw percentage. The lightbar is also changed to use the last tap direction if no charger is plugged in. And the lightbar tap for battery threshold for turning green is lowered to 95%. This also moves some samus_pd board code out of interrupt handlers and in to deferred functions to minimize time in interrupts. BUG=chrome-os-partner:34640, chrome-os-partner:34847 BRANCH=samus TEST=load onto samus. use battfake command from pd console to set battery percentage. when system is in G3, see that batt = 100% stops charging, and when batt < 100% it starts charging again. tested that we receive host command from EC with battery information every time battery changes SOC. Change-Id: Ia8e0721508e34ee3630f5e5b0c2f431a00329caf Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/236411 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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