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* g: enforce order of enabling RO/RW sectionsVadim Bendebury2019-06-071-8/+14
* g: add rx_handled into USB_STREAM_CONFIGNamyoon Woo2019-06-062-10/+15
* g: keep track of frequent update attacks separately for RO and RWVadim Bendebury2019-06-041-9/+61
* g: improve trng error handlingVadim Bendebury2019-05-241-1/+69
* nvmem: do not run when crypto is disabledVadim Bendebury2019-05-241-0/+5
* cr50: Change G2F cert CN to "CrOS"Louis Collard2019-05-212-8/+19
* g: do not destroy manufacturing space by flasheraseVadim Bendebury2019-05-172-5/+11
* chip/g: prevent USB read queue overflowNamyoon Woo2019-04-263-2/+8
* tasks: convert TASK_EVENT_CUSTOM macro to bitJett Rink2019-04-243-9/+9
* cr50: sqa: don't modify flags if board id is erasedMary Ruthven2019-04-151-1/+6
* g: upgrade_fw: check board id if CR50_RELAXED isn't definedMary Ruthven2019-04-151-1/+1
* g: clean up UART channel namesVadim Bendebury2019-04-111-6/+5
* cr50: add INFO1 RW MAP erasing to CR50_SQA modeVadim Bendebury2019-04-104-57/+84
* cr50: convert functions into staticNamyoon Woo2019-04-051-2/+2
* cr50: make ccd_mode_l pseudo open drainMary Ruthven2019-04-041-3/+3
* cr50: move to use flash event logVadim Bendebury2019-03-281-3/+3
* g: add flash elog support functionVadim Bendebury2019-03-282-1/+29
* common: add flash event log facilityVadim Bendebury2019-03-261-0/+1
* g: check that the tx fifo is ready before writing itNamyoon Woo2019-03-261-0/+3
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-269-88/+88
* common: replace 1 << digits, with BIT(digits)Gwendal Grignou2019-03-2610-35/+35
* cr50: add support for building CR50_SQA imagesMary Ruthven2019-03-203-11/+49
* g: add board_id_is_blankMary Ruthven2019-03-202-3/+16
* cr50: use closed loop reset based on board propertyMary Ruthven2019-03-061-0/+12
* g: decorate _i2cs_write_complete_int() so that LTO does not loose itVadim Bendebury2019-02-101-1/+1
* cr50: use list of object files instead of the libraries for cryptocVadim Bendebury2019-02-101-6/+8
* chip/g: mark symbols used that are used from assembly codePatrick Georgi2019-02-072-2/+2
* cr50: Add NIST SP 800-90A HMAC DRBG.Louis Collard2019-01-296-176/+386
* g/i2cs: Sample SDA multiple times before considering the bus wedgedRaul E Rangel2019-01-281-45/+106
* link_defs.h: Renames __ro_end to __data_lma_start.Yilun Lin2019-01-281-1/+1
* cr50: Extend CR50 Bitbang Receive buffer.Namyoon Woo2019-01-161-7/+3
* cr50: Deferred RDD check in deasserting EC_RST_L.Namyoon Woo2019-01-091-4/+28
* cr50: VENDOR_CC_IMMEDIATE_RESET may have a delay argument.Namyoon Woo2018-12-131-6/+39
* cr50: Fix return value for VENDOR_CC_SN_SET_HASH.Louis Collard2018-12-061-2/+2
* cr50: provide DCRYPTO_ladder_is_enabled() for test and fuzz buildsVadim Bendebury2018-12-061-10/+14
* cr50: revoke key ladder on disabling TPMNamyoon Woo2018-12-052-0/+36
* cr50: Add extern "C" to headers used by future fuzzing target.Allen Webb2018-11-152-0/+15
* cr50: enable ITE CCD programmingVadim Bendebury2018-11-051-0/+2
* g: add ITE EC flash programming capabilityVadim Bendebury2018-11-053-0/+285
* g: provide API to disable clock jitterVadim Bendebury2018-11-052-32/+61
* g: allow i2cm transactions of arbitrary lengthVadim Bendebury2018-10-161-131/+99
* chip/g: Convert usb_endpoints to C so gcc's LTO knows about itPatrick Georgi2018-10-162-107/+158
* cr50: Only allow SN hash to be written if board ID is not set.Louis Collard2018-10-121-1/+14
* g: update test RO to allow self-signed RWs.Marius Schilder2018-10-043-55/+18
* g: fix i2cm NACK processingVadim Bendebury2018-09-201-2/+14
* host: Add dcrypto definitions that can be used by fuzzing targets.Allen Webb2018-09-072-0/+5
* cr50: Add commands to get/set serial number bits.Louis Collard2018-09-057-27/+377
* cr50: fix sps driver sync problemsVadim Bendebury2018-09-043-90/+21
* cr50: Release EC Reset on power button release when SuzyQ detected.Nick Sanders2018-08-291-5/+4
* rdd: use rdd_interrupt for rdd_connect/disconnectMary Ruthven2018-08-292-46/+26
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