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* Mark reset and panic functions as noreturnPatrick Georgi2017-11-072-0/+4
| | | | | | | | | | | | | | | | | | | gcc 6.3 (as provided by coreboot-sdk) needs that to know which code paths end early. Also add a loop after the command that is "supposed" to reset the machine so that the compiler believes it (and in case that assumption fails). BRANCH=none BUG=b:65441143 TEST=none Change-Id: Idb87253ec7880d66ffec30d75f4d007f02f63aab Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/742916 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
* chip/host/config_chip: Fix TASK_STACK_SIZE of the host board.Che-yu Wu2017-08-081-0/+3
| | | | | | | | | | | | | Define TASK_STACK_SIZE as standard value 512 for the host board. BUG=chromium:752923 BRANCH=none TEST=make runtests Change-Id: I3e5120847e9b14fbf96d00c428b2db9d59d38fe2 Signed-off-by: Che-yu Wu <cheyuw@google.com> Reviewed-on: https://chromium-review.googlesource.com/604850 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Revert "system: Shutdown AP before entering hibernate mode"Duncan Laurie2017-04-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 20c439be209a9cc0bb949ad21f289c453126395f. Reason for revert: This breaks hibernate on skylake boards and needs to be tested on more than just kevin before submitting. BUG=chromium:702451 BRANCH=none TEST=power down and successfully hibernate on Eve Original change's description: > system: Shutdown AP before entering hibernate mode > > BUG=chromium:702451 > BRANCH=none > TEST=manually test on gru: confirm > 'Alt+VolUp+h' puts gru in hibernate mode and > AC plug-in wakes it up. > > Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096 > Reviewed-on: https://chromium-review.googlesource.com/470787 > Commit-Ready: Philip Chen <philipchen@chromium.org> > Tested-by: Philip Chen <philipchen@chromium.org> > Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> > TBR=rspangler@chromium.org,aaboagye@chromium.org,philipchen@chromium.org # Not skipping CQ checks because original CL landed > 1 day ago. BUG=chromium:702451 Change-Id: Ie847a5e3efb28256b00ddc6534d8ae6bbbba7121 Reviewed-on: https://chromium-review.googlesource.com/482989 Commit-Ready: Duncan Laurie <dlaurie@chromium.org> Tested-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* system: Shutdown AP before entering hibernate modePhilip Chen2017-04-141-1/+1
| | | | | | | | | | | | | | BUG=chromium:702451 BRANCH=none TEST=manually test on gru: confirm 'Alt+VolUp+h' puts gru in hibernate mode and AC plug-in wakes it up. Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096 Reviewed-on: https://chromium-review.googlesource.com/470787 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* gpio: Add function to clear pending interruptDuncan Laurie2017-03-011-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently if an interrupt is pending before it is enabled the interrupt will fire immediately. In most cases this is fine, but if we want to use the interrupt to trigger something like waking the AP it should be sure that it won't immediately fire once enabled. For example: on the Eve board we have the trackpad interrupt run to the AP and the EC in order to support wake from Deep S3 (magic AP state that only the EC can wake it from). This interrupt is used in S0 by the AP while ignored by the EC, and then enabled on the transition to S3 in order to be able to wake. Since it has been active the interrupt may be pending in the EC (depending on the chip), which can result in the interrupt firing immediately and waking the AP. BUG=chrome-os-partner:62224 BRANCH=none TEST=This has been functionally tested on npcx only as that is what I have a use case and system for, the others compile and look right but have not been directly tested. Change-Id: I9e0877d99e7f09f4c30bf9861fbad81c12c059ad Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/446962 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* system: Add generic bbram read / write routinesShawn Nematbakhsh2017-02-241-2/+2
| | | | | | | | | | | | | | | | | | Add generic routines to read or write a byte to battery-backed RAM, and implement vbnvcontext get/set using these routines. BUG=chrome-os-partner:62952 BRANCH=reef TEST=On reef, with subsequent commit, run "cutoff" on the console, reattach AC, and verify device successfully wakes. Also verify Rp is dropped on console 'reboot' and F3 + power from RW. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I14691923f2e5198e901b6b5199e92c58c68cd18d Reviewed-on: https://chromium-review.googlesource.com/444444 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* fix memory size calculations in host/test modeVadim Bendebury2016-12-281-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The common/system.c:system_usable_ram_end() function is used to determine how much room there is available for shared memory. This assumes that the jdata container is located at the top of SRAM right below the panic data buffer. This correct for embedded mode, but when building for host, panic structure is allocated in a different memory block, not necessarily adjacent to the __shared_mem_buf array. This leads to incorrect calculations of the available shared memory amount. Let's make sure the two memory blocks are adjacent, this way the available memory calculations are accurate. BRANCH=none BUG=none TEST=verified that make runtests -j succeeds, including the new test for malloc/free from shared memory (coming up in the next patch). Change-Id: I1fdba0512ac5a85b113a8284216c8b00f1564a94 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/424176 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* usb pd: Resend request after receiving a WAIT in response to a requestSam Hurst2016-12-021-3/+30
| | | | | | | | | | | | | | | When a WAIT is received in response to a request, wait SinkRequestTime before resending the request. BUG=chrome-os-partner:34984 TEST=make -j buildall BRANCH=none Change-Id: I5c8429c4a7b9cf06609996f924b8d9d535ab6b5f Reviewed-on: https://chromium-review.googlesource.com/414533 Commit-Ready: Sam Hurst <shurst@google.com> Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* NvMem: Added NV Memory module to ec/common/Scott2016-05-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Full implementation of NvMem read, write, and commit functions. Includes partition definitions, shared memory allocation, and initialization function. Includes a set of unit tests located in ec/test/nvmem.c which verify functionality. This module is required by Cr50, however this CL does not include any Cr50 specific code. BUG=chrome-os-partner:44745 BRANCH=none TEST=manual make runtests TEST_LIST_HOST=nvmem and verify that all tests pass Change-Id: I515b094f2179dbcb75dd11ab5b14434caad37edd Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/345632 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* UART: Remove enable/disable interrupt functionsAnton Staaf2016-04-271-21/+3
| | | | | | | | | | | | | | | | These were not being used and complicate changes to the UART API. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I73e256f09f7ea72f0cc4831cc7ce391a7125e555 Reviewed-on: https://chromium-review.googlesource.com/340841 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Deferred: Remove hard coded number of deferredsAnton Staaf2016-04-191-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Previously the maximum number of deferred routines was specified by the the default maximum number of deferred routines you had to override this, and if you wanted fewer, you still payed the price of having the defer_until array statically allocated to be the maximum size. This change removes that define and instead creates the RAM state of the deferred routine (the time to wait until to call the deferred) when the deferred is declared. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j manually test on discovery-stm32f072 Change-Id: Id3db84ee1795226b7818c57f68c1f637567831dc Reviewed-on: https://chromium-review.googlesource.com/335597 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* system: Add hibernate board-level callbackShawn Nematbakhsh2016-01-281-0/+3
| | | | | | | | | | | | | | | | | Allow boards to take action (such as entering a custom low-power hibernate-like state) before putting the chip into hibernate state. BUG=chrome-os-partner:48835 BRANCH=glados TEST=Manual with subsequent commit on chell. Verify board-level hibernate callback is called when "hibernate" is run on EC console. Change-Id: Ie1da044037a74ff8bce5c822f28ce837c62ceec0 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/324086 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cleanup: Put chip-specific configs in config_chip.hBill Richardson2015-09-211-0/+8
| | | | | | | | | | | | | | | | | | | | include/config_std_internal_flash.h is an optional header that can be used to implement the most common EC flash layout. However, CONFIG_INTERNAL_STORAGE, CONFIG_MAPPED_STORAGE, and CONFIG_MAPPED_STORAGE_BASE are fixed by the SoC, so they belong in config_chip.h, not in the optional header. BRANCH=none BUG=chrome-os-partner:23796 TEST=make buildall Refactoring only, no behavioral differences. Change-Id: I114c3e194837041920e6f228a2bed6747be8231c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301330 Reviewed-by: Shawn N <shawnn@chromium.org>
* host: mock i2c_xferGwendal Grignou2015-09-162-107/+14
| | | | | | | | | | | | | | | Instead of mocking i2c_read8/16/32, mock i2c_xfer. We can now test code that call i2c_xfer directly and test common/i2c.c BRANCH=samus, ryu BUG=chrome-os-partner:45223 TEST=Unit tests pass. Change-Id: Iaa772515c40cf55d2050d0019e2062d63278adc0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/299768 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* cleanup: Remove redundant FLASH_SIZE CONFIGsShawn Nematbakhsh2015-09-162-3/+3
| | | | | | | | | | | | | | | | | | | | Since there is no more concept of a flash region belonging only to the EC, we only need one FLASH_SIZE config, which represents the actual physical size of flash. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I18a34a943e02c8a029f330f213a8634a2ca418b6 Reviewed-on: https://chromium-review.googlesource.com/297824 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Rename geometry constantsShawn Nematbakhsh2015-09-161-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename and add geometry constants to match spec doc - https://goo.gl/fnzTvr. CONFIG_FLASH_BASE becomes CONFIG_PROGRAM_MEMORY_BASE CONFIG_FLASH_MAPPED becomes CONFIG_MAPPED_STORAGE Add CONFIG_INTERNAL_STORAGE, CONFIG_EXTERNAL_STORAGE and CONFIG_MAPPED_STORAGE_BASE where appropriate. This CL leaves chip/npcx in a broken state -- it's fixed in a follow-up CL. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Change-Id: Idb3c4ed9f7f6edd0a6d49ad11753eba713e67a80 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297484 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* tasks: Remove most task_start_called() calls.Aseda Aboagye2015-08-011-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Now that HOOK_INIT hooks are called from a task switching context, most calls to task_start_called() should no longer be needed. This commit removes them. BRANCH=None BUG=chrome-os-partner:27226 TEST=make -j buildall tests TEST=Flash EC image onto samus and verify EC boot, AP boot, keyboard, lid, and tap-for-battery all functional. TEST=Flash EC image onto samus_pd and verify charging still works. TEST=Flash EC image onto ryu(P3) and verify that EC boot. TEST=Added ASSERT(task_start_called()) to the places where I removed task_start_called(). Booted samus, samus_pd, cyan, and ryu with AC inserted and verified that no ASSERT's were hit upon boot. Change-Id: Ic12c61862e85ca3a0a295beedbb4eeee6d5e515b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/285635 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
* cleanup: fix all the header guardsBill Richardson2015-06-182-5/+5
| | | | | | | | | | | | | | | This unifies all the EC header files to use __CROS_EC_FILENAME_H as the include guard. Well, except for test/ util/ and extra/ which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively. BUG=chromium:496895 BRANCH=none TEST=make buildall -j Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029 Reviewed-on: https://chromium-review.googlesource.com/278121 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common: Add i2c 32bit read/writeGwendal Grignou2015-06-171-0/+30
| | | | | | | | | | | | | Add functions and associated test to read/write a 32 bit register BRANCH=smaug TEST=Test on smaug with bm160 driver BUG=chromium:39900 Change-Id: Ieff24b65f1eb8610874fe13c4a8fadf583a218cb Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/277535 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* mec1322: Simplify GPIO listsSteven Jian2015-05-271-0/+3
| | | | | | | | | | | | | | | Our existing GPIO macros use port# / gpio#, but the concept of different GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros for chips which do not have distinct GPIO ports. BUG=None BRANCH=None TEST=make buildall -j Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b Signed-off-by: Steven Jian <steven.jian@intel.com> Reviewed-on: https://chromium-review.googlesource.com/262841 Reviewed-by: Anton Staaf <robotboy@chromium.org>
* pd: move non-phy layer config out of usb_pd_config.hAlec Berg2015-05-271-1/+1
| | | | | | | | | | | | | | | | | | | | | Move parts of usb_pd_config.h that are not part of the phy layer out of usb_pd_config.h and into board.h. This cleans up the division between the TCPC and TCPM as only the TCPC needs to use usb_pd_config.h. Also cleans up the use of the CC detection voltage thresholds by creating standard macros to use based on Rp strength for the board. BUG=none BRANCH=none TEST=make -j buildall Change-Id: I946cceb38bea8233095b8a4b287102bb8a3a296d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/270337 Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Queue: Add policies to queuesAnton Staaf2015-05-261-1/+1
| | | | | | | | | | | | | | | | | | | | Policies give a convenient place to hook into the queue operations and notify something that there is new space free in the queue or new units added. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I94b2aa94b8e8d07911191bc19a39fa827623b117 Reviewed-on: https://chromium-review.googlesource.com/271791 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Anton Staaf <robotboy@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
* cleanup: Use appropriate image geometry CONFIGsShawn Nematbakhsh2015-05-152-18/+2
| | | | | | | | | | | | | | | | - Use CONFIG_*_MEM when dealing with images in program memory. - Use CONFIG_*_STORAGE when dealing with images on storage. - Use CONFIG_WP when dealing with the entire WP RO region. BUG=chrome-os-partner:39741,chrome-os-partner:23796 TEST=Manual on Cyan with subsequent commit. Verify that FMAP matches actual layout of image. Verify flashrom succeeds flashing + verifying EC image using host command interface. BRANCH=None Change-Id: Iadc02daa89fe3bf07b083ed0f7be2e60702a1867 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/270269
* Fix type mismatch on extern declarationsVincent Palatin2015-05-151-1/+1
| | | | | | | | | | | | | | | | | | | Update a few extern declarations to match the original variable type. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall Compile with LTO enabled and no longer see errors for those declarations. Change-Id: I5b0f0f7f498ec414a861cb1ce50a486036c853bd Reviewed-on: https://chromium-review.googlesource.com/271279 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* cleanup: Rename image geometry CONFIGsShawn Nematbakhsh2015-05-122-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Rename image geometry configs with a uniform naming scheme to make their purposes more clear. CONFIG_RO_MEM_OFF (was CONFIG_FW_RO_OFF) - RO image offset in program memory CONFIG_RO_STORAGE_OFF (was CONFIG_RO_SPI_OFF) - RO image offset on storage CONFIG_RO_SIZE (was CONFIG_FW_RO_SIZE) - Size of RO image CONFIG_RW_MEM_OFF (was CONFIG_FW_RW_OFF) - RW image offset in program memory CONFIG_RW_STORAGE_OFF (was CONFIG_RW_SPI_OFF) - RW image offset on storage CONFIG_RW_SIZE (was CONFIG_FW_RW_SIZE) - Size of RW image CONFIG_WP_OFF (was CONFIG_FW_WP_RO_OFF) - Offset of WP region on storage CONFIG_WP_SIZE (was CONFIG_FW_WP_RO_SIZE) - Size of WP region on storage BUG=chrome-os-partner:39741,chrome-os-partner:23796 TEST=Set date / version strings to constants then `make buildall -j`. Verify that each ec.bin image is identical pre- and post-change. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I6ea0a4e456dae71c266fa917a309b9f6fa4b50cd Reviewed-on: https://chromium-review.googlesource.com/270189 Reviewed-by: Anton Staaf <robotboy@chromium.org>
* gpio: Refactor IRQ handler pointer out of gpio_listAseda Aboagye2015-04-101-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the gpio_info struct, we had a irq_handler pointer defined even though a majority of the GPIOs did not have irq handlers associated. By removing the irq_handler pointer out of the struct, we can save some space with some targets saving more than others. (For example, ~260 bytes for samus_pd). This change also brings about a new define: GPIO_INT(name, port, pin, flags, signal) And the existing GPIO macro has had the signal parameter removed since they were just NULL. GPIO(name, port, pin, flags) In each of the gpio.inc files, all the GPIOs with irq handlers must be defined at the top of the file. This is because their enum values from gpio_signal are used as the index to the gpio_irq_handlers table. BUG=chromium:471331 BRANCH=none TEST=Flashed ec to samus and samus_pd, verified lightbar tap, lid, power button, keyboard, charging, all still working. TEST=Moved a GPIO_INT declaration after a GPIO declaration and watched the build fail. TEST=make -j BOARD=peppy tests TEST=make -j BOARD=auron tests TEST=make -j BOARD=link tests Change-Id: Id6e261b0a3cd63223ca92f2e96a80c95e85cdefb Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/263973 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: Modify BIST mode according to ECR#PD2.0.1.0.004Scott2015-04-091-0/+5
| | | | | | | | | | | | | | | | | | | | | | - Changed TX BIST mode so that it transmits for 50 msec instead of transmitting forever. - Added console command to initiate TX BIST mode. - Fixed an issue with circular DMA mode which was causing watchdog. - Modified RX BIST to account for shorter TX BIST duration. BUG=chrome-os-partner:36335 TEST=Manual on Samus to Samus, manual on Zinger to Samus BRANCH=Samus Signed-off-by: Scott Collyer <scollyer@chromium.org> Change-Id: I666347de47c81b5b7a1e82c2b99345ff3ebbb7d4 Reviewed-on: https://chromium-review.googlesource.com/256194 Tested-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Trybot-Ready: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
* pd: Massage initialization at task start.Todd Broch2015-02-251-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Refactoring effort to unify the set of PD intialization tasks that need to occur. Those areas include: 1. host mode as it relates to power & pull-ups/downs 2. PD tx init 3. PD mux settings Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:36481 TEST=manual, 1. compiles and functions on samus_pd 2. If sysjump w/ dongle connected than alternate mode re-entered properly including muxing and HPD Change-Id: I47f32acaeccbd7745e1e01a8b085b1804c4c5000 Reviewed-on: https://chromium-review.googlesource.com/249273 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
* pd: check for collisions before transmittingAlec Berg2014-12-171-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added check for collision just before transmitting on CC line. To check for collision, RX monitoring is left on all the time (except when in the act of receiving or transmitting, or in between receiving and sending a goodCRC), and a simple check for RX transmission started is used to see if the CC line is idle or not. RX monitoring is also changed to only trigger on 3 edges within 20us, as per the PD spec. When a collision is detected by seeing that CC is not idle, the transmitting packet is dropped. BUG=chrome-os-partner:30135 BRANCH=samus TEST=load onto samus and zinger. make sure we negotiate and make sure custom VDMs succeed. enabled pings and made sure we stay alive with pings for a few min. Also added code to pd_rx_handler to toggle a test point on EVT board to verify the timing of when we get RX interrupts: Change-Id: I22d172163319437d3d901e019eda79d4d592f6b8 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/226118 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* math: use CONFIG_FPU when using float.Gwendal Grignou2014-11-091-0/+2
| | | | | | | | | | | | | ifdef code than needs CONFIG_FPU (acos and friends) BRANCH=ToT BUG=chrome-os-partner:32050 TEST=define CONFIG_FPU on host board and use it. Change-Id: I1c4ed16c23450bb4059d26044f4c1fe45b33674e Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/226414 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* Fix incorrect valid and writable flash flagsVic Yang2014-10-151-0/+26
| | | | | | | | | | | | | | | | The valid and writable flags the EC sends back to the AP are incorrect. They are a little bit different on differnt chips, so let's move it to flash physical layer. This is not any causing problem, but we should fix this. BUG=chrome-os-partner:32745 TEST=make buildall BRANCH=samus Change-Id: Ibcda5ae770f5ea02cde094490997a5bc447df88f Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222661 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add back unit test for usb_pd"Vic Yang2014-10-042-0/+290
| | | | | | | | | | | | | | | | | | This is mostly the same as previous commits, but with increased delay. Previously, we have short delays (e.g. 3ms) which is too short and may cause instability. Now that we have slowed down the time when running unit tests and increased the delay, this shouldn't cause problems anymore. BUG=chrome-os-partner:31200 TEST=Repeatedly run multiple unit tests in parallel. BRANCH=Samus Change-Id: Ib55e3adc5fd27a8e233996b4799dab3cefd62318 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/220734 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Queue: Add functionality needed by new USART stream driverAnton Staaf2014-09-181-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Previously there was no way to remove multiple units at a time from the queue, and the queue was wasting an entry to disambiguate full from empty. There was also no way to get the free entry count from the queue, only the ability to query if it was above a required amount. The queue was also storing its constant compile time configuration as well as its dynamic state in the same structure. This wasted RAM on configuration information that doesn't change. This refactor fixes these issues, making the queue suitable for use in the new USART stream driver. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I284cee52d8189928dbc4c499f87ab34e14019e5a Reviewed-on: https://chromium-review.googlesource.com/210533 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
* EC: Add smbus interface read & write APIsSheng-Liang Song2014-08-291-0/+21
| | | | | | | | | | | | | | | | | | Ref: http://smbus.org/specs/smbus20.pdf - Support software CRC8 generation and checking. - Support read/write word (2-bytes) - Support read/write blocks (up to 32 bytes) BUG=chrome-os-partner:24741 BRANCH=ToT,glimmer TEST=Verified with smart battery firmware update application on glimmer. Passed LGC & Simplo Battery. Change-Id: Ic2e7f759af80c06741ed49fee1826213429fbf8a Signed-off-by: Sheng-Liang Song <ssl@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209747 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Revert "Add back unit test for usb_pd"Vic Yang2014-08-152-290/+0
| | | | | | | | | | | | | | | | | This reverts commit cb7468744d8292590ddc4fb0a0b6ed7752b1490a. Apparently this test fails when running on a heavily loaded system. Revert this for now. BUG=chromium:402335,chrome-os-partner:31200 TEST=make buildall BRANCH=None Change-Id: I8b616d3915ee5c2f524530897758871cc0375d35 Reviewed-on: https://chromium-review.googlesource.com/212582 Tested-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Christopher Wiley <wiley@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org>
* Add back unit test for usb_pdVic Yang2014-08-132-0/+290
| | | | | | | | | | | | | | Add back the test but only enable USB PD tasks for usb_pd test. This should ensure that we do not break existing tests. BUG=chrome-os-partner:31200,chromium:402335 TEST=make buildall BRANCH=None Change-Id: I4daa41a96a1067362b2c40a2a09fce733843bdff Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211923 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Revert "Add unit test for usb_pd"Alec Berg2014-08-112-290/+0
| | | | | | | | | This reverts commit 0739074fbf735cffefdac7ff6d086084449f6493. Change-Id: I1889138e5a8d5bc22d3bac2e48afe6378a59542a Reviewed-on: https://chromium-review.googlesource.com/211773 Reviewed-by: Prathmesh Prabhu <pprabhu@chromium.org> Tested-by: Prathmesh Prabhu <pprabhu@chromium.org>
* Add unit test for usb_pdVic Yang2014-08-102-0/+290
| | | | | | | | | | | | | | Initial commit of usb_pd unit test. The test cases are very simple. We'll add more test cases in similar format. BUG=chrome-os-partner:31200 TEST=Pass usb_pd test BRANCH=None Change-Id: I9e3de5b2c032ee1d3670cde6d8227ce0378ae8a0 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211643 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* watchdog: Give more leeway to the independent watchdogDoug Anderson2014-06-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | It would be really nice to be guaranteed to see watchdog warnings before we actually hit a watchdog reset even if something strange is going on with the CPU. Let's increase the margin between the timer and the independent so that the hardware watchdog is really hit as a last resort. It seems like a 1.6 second hardware watchdog wouldn't be the end of the world so let's bump that way rather than increasing the number of warnings. BRANCH=ToT BUG=chrome-os-partner:29162 TEST="waitms 1000" on EC console no longer ever reboots and "waitms 2000" usually does. Change-Id: Ic5e5ddec22fb8484cc7c552b19d3f2043c105d0c Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/204895 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Remove old TODO comment in emulator UART moduleVic (Chun-Ju) Yang2014-01-091-4/+1
| | | | | | | | | | | | | | | | Now that we handle all UART input from interrupt context, we shouldn't need to guard input buffer with mutex lock. Removing the stale TODO comment and adding an assertion to ensure this argument is correct. BUG=chrome-os-partner:23804 TEST=make buildall BRANCH=None Change-Id: If61eed4329a782b80fe8b16667bddaae8464620d Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181722 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* emulator: Fix a bug that jump tag is overwrittenVic (Chun-Ju) Yang2014-01-081-5/+0
| | | | | | | | | | | | | | | | | The mock system_usable_ram_end() always returns the same address. However, this causes the second jump tag to overwrite the first one. Also, now that the jump data is properly placed, we can actually remove the mock implementation. BUG=chrome-os-partner:19235 TEST=Add two jump tag and check the first one is not overwritten. BRANCH=None Change-Id: If868895a7c028dd25399adb69e9708de45c84f10 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181745 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Process emulator UART events in interrupt contextVic (Chun-Ju) Yang2014-01-061-11/+16
| | | | | | | | | | | | | | | | | Currently emulator UART input/output are processed in various context, including UART thread, individual tasks, and tests. By moving the processing to interrupt context, the way it works resemble real chips more. Also, this provides a cleaner cut between emulated UART device and UART processing code. BUG=chrome-os-partner:23804 TEST=make buildall BRANCH=None Change-Id: I58127e66f4058a68d37be9029e9ddbbd798381c6 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181590 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add interrupt support for emulatorVic Yang2014-01-061-1/+1
| | | | | | | | | | | | | | | | | | This provides us a way to inject interrupts during a test. If a test has interrupt_generator() defined, it will run in a separate thread. The generator can then trigger interrupts when it decides to. The current running task is suspended while emulator is executing ISR. Also fixes a bug that tasks run without scheduler notifying them during emulator start-up. BUG=chrome-os-partner:19235 TEST=Repeatedly run all tests. BRANCH=None Change-Id: I0f921c47c0f848a9626da6272d9040e2b7c5ac86 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/55671
* extract common core codeVincent Palatin2013-12-051-0/+5
| | | | | | | | | | | | | | | | | | | | | | Move the non-core dependent code out of core/$(CORE) directory to common/ directory. Put all panic printing code in common/panic_output.c Put timer management code in common/timer.c Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:23574 TEST=./util/make_all.sh use "crash divzero" and "panicinfo" on Link. Change-Id: Ia4e1ebc74cd53da55fe24f69e96f39f512b9336d Reviewed-on: https://chromium-review.googlesource.com/178871 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Jeremy Thorpe <jeremyt@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* gpio: Make GPIO_INT_BOTH explicitly RISING|FALLINGRandall Spangler2013-11-231-4/+2
| | | | | | | | | | | | | | | | | | | | | | | For historical reasons on LM4, we defined GPIO_INT_F_BOTH separately from GPIO_INT_F_RISING and GPIO_INT_F_FALLING. This means that the code has weird checks like BOTH || (RISING && FALLING), which have propagated in error-prone ways across the other chips. Instead, explcitly define BOTH to be RISING|FALLING. Ideally, we would have called it GPIO_INT_EDGE to match GPIO_INT_LEVEL, but changing that now would be a big find-replace. Which might still be a good idea, but that is best done in its own CL. BUG=chrome-os-partner:24204 BRANCH=none TEST=build and boot pit, spring, and link; that covers STM32F, STM32L, and LM4. Change-Id: I23ba05a3f41bb14b09af61dc52a178f710f5c1bb Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/177643 Reviewed-by: Jeremy Thorpe <jeremyt@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
* cleanup: Still more TODO commentsRandall Spangler2013-11-021-5/+8
| | | | | | | | | | | | | More of same. Comment changes only; no code changes. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms; pass unit tests Change-Id: I8c42ed7d332cd9d461067e1aeac670855106cbcd Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175405 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cleanup: Rename and move header filesRandall Spangler2013-10-231-0/+17
| | | | | | | | | | | | | | Device-specific headers belong in driver/ or chip/. The include/ directory should be for common interfaces. Code should not normally need to include driver-specific headers. If it does, it should use the full relative path from the EC project root (for example, drivers/charger/bq24715.h). Change-Id: Id23db37a431e2d802a74ec601db6f69b613352ba Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/173746 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Enforce a minimum number of clocks between keyboard scansRandall Spangler2013-10-142-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | When the EC CPU is running at a decreased clock frequency, frequent keyboard scans can starve other EC tasks of CPU and lead to dropped data or watchdog timeouts. Enforce a minimum number of EC clocks between keyboard scans to prevent this from happening. The default chosen (16000 clocks) is equal to the shortest post-scan delay (1 ms) of any current board when the AP is in S0, so this should have no effect when the AP is in S0. When the AP is in S3 or S5, we don't need to scan the keyboard as frequently anyway. This can be overridden on a per-board basis for future boards if needed. BUG=chrome-os-partner:23247 BRANCH=pit TEST=apshutdown, then hold down a key for 10 seconds. Should not see a watchdog reset. Change-Id: I228f53a32ad4769f6a137a9ab06903111bea115d Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172895 Reviewed-by: Vic Yang <victoryang@chromium.org>
* Emulator support of fake GPIO inputVic Yang2013-10-011-1/+34
| | | | | | | | | | | | | | | | | | For all GPIOs, the current values are recorded. A test can then change the value of a GPIO input by gpio_set_level(). The changed value is recorded and also interrupt is fired if the change fits the interrupt flags defined in board/host/board.c. BUG=chrome-os-partner:19235 TEST=Pass all tests BRANCH=None Change-Id: If8e547e5adf4a20dcb118f5fe2187293005d4ca3 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/170907 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Test interface for detaching fake I2C devicesVic Yang2013-09-271-0/+76
| | | | | | | | | | | | | | This provides an interface to detach and re-attach fake I2C devices, which can be used to test I2C connection failure. BUG=chrome-os-partner:19235 TEST=Pass sbs_charging test along with the next CL BRANCH=None Change-Id: Ibfee79b13d45e62377d894aa28547e77bef2189e Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/170752 Reviewed-by: Randall Spangler <rspangler@chromium.org>
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