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* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | There is an option in the task_set_event function which force the calling task to wait for an event. However, the option is never used thus remove it. This also will help in the Zephyr migration process. BUG=b:172360521 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* Replace I2C_GET_ADDR with I2C_STRIP_FLAGSYuval Peress2020-11-021-1/+1
| | | | | | | | | | | | | | | | | The new I2C_STRIP_FLAGS macro was added to avoid conflict with Zephyr's macro. This CL performs the migration to that new API. BRANCH=none BUG=b:172067439 TEST=make runtests -j and built for various boards: eve, volteer, arcada_ish, atlas, hatch, kohaku, nocturne, samus, and scarlet Change-Id: I0583b647435db96ec268f186252b367bdc4118a6 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2511097 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* ish: enable IPAPG for ish 5.4 on tgl rvp platformLeifu Zhao2020-05-151-3/+9
| | | | | | | | | | | | | | | | | Enable ip accessible power gating for ish 5.4 on tgl rvp platform. BUG=b:154891699 BRANCH=none TEST=ISH can successfully enter into IPAPG on tgl rvp. Change-Id: Iee30124a0928389f4c75dffff065fab7a5a2d970 Signed-off-by: Leifu Zhao <leifu.zhao@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2164091 Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
* ish: chip enablement of ish5.4 on tgl rvp platformLeifu Zhao2019-11-091-0/+7
| | | | | | | | | | | | | | | | | Chip level enablement of ish5.4 on tgl rvp platform. BUG=b:141519691 BRANCH=none TEST=tested on tgl rvp Signed-off-by: Leifu Zhao <leifu.zhao@intel.com> Change-Id: I3f6249e1816d81deec0420a12b093918ee7fbddc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1846788 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Commit-Queue: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
* main: Initialize I2C pretty earlyAlexandru M Stan2019-10-241-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices (like the keyboard, CBI) need I2C access pretty early. Until now I2C would get initialized pretty late in a hook, which was far too late for some stuff. As a result from this change, CONFIG_I2C_MASTER now implies the i2c_init() function will be called at board boot. Some chips (cr50, host tests) needed a stub i2c_init in order to compile cleanly. BUG=b/138384267 TEST=EFS doesn't happen significantly later than it used to TEST=Recovery keys now work with I2C keyboard on jacuzzi TEST=make buildall TEST=Sanity check i2c behavior (booting, "i2scan", "battery") on a variety of ECs: * ampton (ite EC, x86 AP) * bobba (npcx EC, x86 AP) * jacuzzi (stm32f0 EC, ARM AP) * cheza (npcx EC, ARM AP) BRANCH=master Change-Id: Ifa830e8e509ff16b36b4dcc86617869b1cb86ac3 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1772490 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* i2c: don't scan i2c addresses less than 0x08Jett Rink2019-07-251-3/+2
| | | | | | | | | | | | | | | None of the existing i2c addresses in the EC code base are less than 0x08 and those addresses are reserved by the i2c and SMBus specification. BRANCH=none BUG=b:138156666 TEST=i2c bus scan with a smart battery doesn't "misbehave" any more and other devices can be detected properly. Change-Id: I561b082c4c7e3df7caaa33b6ef6ad467dabbd5a5 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715326 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-7/+7
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-10/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* arcada: ensure i2c transmit fifo is emptyLeifu Zhao2019-07-141-2/+3
| | | | | | | | | | | | | | | | | | | | Make sure transmit fifo is empty before disable i2c controller during transfer, otherwise the i2c write may fail for speed 100k, it also helps 400K and 1M. BUG=b:137218876 BRANCH=none TEST=tested on arcada Signed-off-by: Leifu Zhao <leifu.zhao@intel.com> Change-Id: I6f9fb9a71c28f2d3f9696340cc87fe3b72c25a02 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1697061 Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Commit-Queue: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
* ish: cleanup i2c constantsJett Rink2019-07-091-14/+18
| | | | | | | | | | | | | | Rename i2c constants to expose the speed they represent. BRANCH=none BUG=none TEST=builds. arcada i2c bus speed is correct Change-Id: If26f4868053f5df0a83bf1f06b62b6969dd5a44f Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1691310 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ec: Remove extraneous new line as the end of CPRINTS stringsNicolas Boichat2019-06-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | CPRINTS already prints a new line, no need to add another one. Spotted during boot on kukui, and then realized there are many more instances: "" [3.689239 Module 7 is not supported for clock disable ] "" BRANCH=none BUG=none TEST=make buildall -j TEST=`git grep CPRINTS | grep "\\\\n\""` shows nothing of interest. Change-Id: I4d2bbbc65a91fa56c6e6115aa5c353bfd2b384a1 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660519 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ish: remove conditional compilation where possibleDenis Brockus2019-06-171-6/+10
| | | | | | | | | | | | | | | Removed many of the #if conditions and replaced them with IS_ENABLED BUG=b:132178013 BRANCH=none TEST=make buildall -j TEST=verify basic ish ec functionality Change-Id: I39c1d2dfdb39baa06e53746789d0b6a648275ed9 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660021 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ish/ish5: fix high frequent wakeup issue in low power modeHu, Hebo2019-04-201-0/+1
| | | | | | | | | | | | | | | | | | | | on ish, need fw clean fabric agent error status, otherwise will cause ish wakeup immediately after entered low power mode. this operaion has no impact for other functions. BUG=b:130193448 BRANCH=none TEST=verified on arcada platform Change-Id: Iecd85d1ab037aafa988d6c32ad47b51003913198 Signed-off-by: Hu, Hebo <hebo.hu@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1563470 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Mathew King <mathewk@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Mathew King <mathewk@chromium.org> Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
* ish: I2C transaction to non-existent addresses fixDaniel Gonzalez2019-03-281-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | This patch does not allow for I2C transfers to reserved address ranges for the I2C module. Also does not allow transactions to non-existent ports. Returns an error if writing to a non-reserved, invalid address range Reference: DW_apb_i2c.pdf, pg. 74 BUG=b:123357842 BRANCH=none TEST=i2cxfer commands in ISH console for invalid/valid ports and addresses on atlas_ish board Change-Id: Ieeec14b1c9b82e88d8e7658c0c56b10e3735936f Signed-off-by: Daniel Gonzalez <daniel.d.gonzalez@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1541941 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-2/+2
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ish: use correct I2C eventJett Rink2019-01-281-4/+2
| | | | | | | | | | | | | | | | | There is a section of event bits that are reserved for all tasks. We need to use one of the upper bits instead of a bit 7 which may conflict with other tasks eventually. BRANCH=none BUG=none TEST=i2c transaction still works Change-Id: Ie8b98f7a159159714f12dc87ce26b009ceee3f92 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1435479 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* ISH-i2c: support 1MHz, clock stretch, restartKyoung Kim2018-12-031-83/+146
| | | | | | | | | | | | | | | | | | | | | | - Support for 2 or more bytes size of command register in slave device. - Adjust parameters for FAST and FAST+ modes. - added Restart and SCL stretch BUG=b:113238573 TEST=test with FAST/FAST+ mode Elan TrackPad slave device. Use i2c_xfer() API inside a test task which GPIO interrupt (Elan device's INT line) wakes. Change-Id: I1ebcef90d85d6ede90bb8687e20058bdf31bf4e8 Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Reviewed-on: https://chromium-review.googlesource.com/996799 Commit-Ready: Caveh Jalali <caveh@google.com> Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com> Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com> Reviewed-by: Caveh Jalali <caveh@google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
* ish i2c: use i2c_ports[] to set bus speedli feng2017-12-131-22/+29
| | | | | | | | | | | | | | BUG=None BRANCH=None TEST=Tested on Soraka ISH modified board, measured I2C speed for std, fast, fast plus mode. Change-Id: I0e07c3c73f5f0302fba41ad8e7f83e10e8f0af99 Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/817899 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* ish i2c: add I2C Fast Mode Plus 1Mbps speed optionli feng2017-12-041-4/+45
| | | | | | | | | | | | | | | | | | | | Also added CONFI_ISH_I2C_PORT0_SPEED, CONFI_ISH_I2C_PORT1_SPEED, and CONFI_ISH_I2C_PORT2_SPEED to define speed for each ISH I2C port. By default, those are set to fast mode, 400kbps, I2C_SPEED_FAST. The values can be modified in board.h. BUG=None BRANCH=None TEST=On Soraka modified board for ISH, set I2C stardard mode, fast mode and fast mode plus, measured I2C clock freq using scope respectively and confirmed the freq matched I2C mode. Change-Id: I426b50dc935c3760903360a50f6069e99bd0abff Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/784091 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* ish: correct i2c write operation buffer sizeli feng2016-12-121-16/+5
| | | | | | | | | | | | | | | | ISH i2c write operation failed due to wrong buffer size passed. BUG=None BRANCH=None TEST=On reef ISH enabled board, verified sensor i2c read/write are successful. Change-Id: Icda625ad16e1e60832bb22e3148e23fcb8e6a937 Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/418876 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* ish: Add support for ISH chipJaiber John2016-11-041-0/+422
This patch adds the initial support for ISH chip to enable the EC firmware to boot on Intel Integrated Sensor Hub (ISH). The following are enabled: 1. Inter-Processor Communication (IPC) driver that enables the ISH to communicate with the host Operating system via shared registers. 2. High Precision Event Timer (HPET) driver that provides configurable timers for the FW to use in task scheduling. 3. I2C bus driver for accessing sensors. 4. UART console driver with TX support only. BUG=chrome-os-partner:51851 BRANCH=None TEST=`make buildall -j` Change-Id: I15d4c201b799cfa79bed220ee573b75f5cd7b1f7 Signed-off-by: Jaiber John <jaiber.j.john@intel.com> Signed-off-by: Alex Brill <alexander.brill@intel.com> Signed-off-by: Gomathi Kumar <gomathi.kumar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/336710 Commit-Ready: Raj Mojumder <raj.mojumder@intel.com> Tested-by: Jaiber J John <jaiber.j.john@intel.com> Tested-by: Raj Mojumder <raj.mojumder@intel.com> Reviewed-by: Jaiber J John <jaiber.j.john@intel.com> Reviewed-by: Raj Mojumder <raj.mojumder@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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