summaryrefslogtreecommitdiff
path: root/chip/ish/ipc_heci.c
Commit message (Collapse)AuthorAgeFilesLines
* ish: chip enablement of ish5.4 on tgl rvp platformLeifu Zhao2019-11-091-1/+15
| | | | | | | | | | | | | | | | | Chip level enablement of ish5.4 on tgl rvp platform. BUG=b:141519691 BRANCH=none TEST=tested on tgl rvp Signed-off-by: Leifu Zhao <leifu.zhao@intel.com> Change-Id: I3f6249e1816d81deec0420a12b093918ee7fbddc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1846788 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Commit-Queue: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
* ish: power management temp code is really neededDenis Brockus2019-06-201-8/+2
| | | | | | | | | | | | | | | | | | | | | | Adjust the comments for the ISH VNN_REQ that indicate code can be removed once power management is put in place. The ipc_heci.c instances are needed to make sure write power is enabled for the heci interface so we can receive the message. The system_state_subsys.c instances disable and re-enable power based on message flow request to suspend/resume. I am going to leave the code as is and adjust the comments a little. BUG=b:135279314 BRANCH=none TEST=make buildall -j Change-Id: I3467e7005ce466bcb06c57a0590834f42aea9ddb Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1667929 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ec: Remove extraneous new line as the end of CPRINTS stringsNicolas Boichat2019-06-201-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | CPRINTS already prints a new line, no need to add another one. Spotted during boot on kukui, and then realized there are many more instances: "" [3.689239 Module 7 is not supported for clock disable ] "" BRANCH=none BUG=none TEST=make buildall -j TEST=`git grep CPRINTS | grep "\\\\n\""` shows nothing of interest. Change-Id: I4d2bbbc65a91fa56c6e6115aa5c353bfd2b384a1 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660519 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ish: remove conditional compilation where possibleDenis Brockus2019-06-171-13/+13
| | | | | | | | | | | | | | | Removed many of the #if conditions and replaced them with IS_ENABLED BUG=b:132178013 BRANCH=none TEST=make buildall -j TEST=verify basic ish ec functionality Change-Id: I39c1d2dfdb39baa06e53746789d0b6a648275ed9 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660021 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ish: update firmware statusHyungwoo Yang2019-05-141-0/+3
| | | | | | | | | | | | | | | Currently we missed some FW status updates that are used by host in taking critical action. BUG=b:132060059 BRANCH=none TEST=tested on Arcada platform Change-Id: I7ad607869f821eae99e37704ab3d6567d180aadd Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1601780 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ish/heci: print protocol for discarded msgsJett Rink2019-05-031-1/+1
| | | | | | | | | | | | Print the protocol id of discarded messages on console BRANCH=none BUG=none TEST=verified that protocol is being printed correctly Change-Id: I089ad0c55b89a321edcbf24f25ec13e13fda60b3 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1594109
* ish: refactor IPC usage of REG macros into registers.hJack Rosenthal2019-05-021-42/+24
| | | | | | | | | | | | | This is the final CL needed to resolve b:130573158. BUG=b:130573158 BRANCH=none TEST=arcada_ish functions as normal after changes Change-Id: Ia4cc9bfa95938b9f57fc1cd241cd6821b42a3ce6 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1578435 Reviewed-by: Jett Rink <jettrink@chromium.org>
* tasks: convert TASK_EVENT_CUSTOM macro to bitJett Rink2019-04-241-1/+1
| | | | | | | | | | | | | | | | | | | | | We should ensure that all custom task definition are non-zero and fit with the globally defined events. Add compile time check and change semantics to specify bit number (instead of making all callers use the BIT macro). This also fixes an error with TASK_EVENT_PHY_TX_DONE for ITE being 0. The bug that made that happen hasn't landed on any firmware branches that use it though. BRANCH=none BUG=none TEST=builds Cq-Depend:chrome-internal:1178968,chrome-internal:1178952 Change-Id: I5e1d1312382d200280c548e9128e53f4eddd3e61 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1570607 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* mkbp: take timestamp closer to hardware interruptJett Rink2019-04-241-5/+24
| | | | | | | | | | | | | | | | | We want to ensure that the timestamp we take for last mkbp is as close to the actual hardware interrupt from EC->AP. BRANCH=none BUG=b:129159505 TEST=passing CTS sensor run (except test 133 nullptr) with this change Change-Id: I94b214f021f0b63ff2883e5fe8e32acc83ce208f Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1560390 Tested-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Mathew King <mathewk@chromium.org> Commit-Queue: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* ish: move register definitions to register.hJett Rink2019-04-181-21/+0
| | | | | | | | | | | | | | | Move bit field definitions to register.h close to their register location definition. BRANCH=none BUG=none TEST=arcada communication still works Change-Id: I6dfacc24f43a9b8ff490a98c3e231f06f55a1dc6 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1564376 Commit-Ready: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ish: reduce hostcmd size to fit within HECIJett Rink2019-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | We only want to send single HECI packets as a response to the AP. 120 bytes should be enough for all commands. The EC_CMD_CONSOLE_READ Host command was consistently using 2 HECI packets and this seems to cause issues in the kernel driver. Also setting a guard variable in a more protected way BRANCH=none BUG=b:129937881 TEST=Lock up is much less frequent but not completely gone. Change-Id: Ifd9dbfdb053fee9894a876fa689f9adf7766fdd5 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1553306 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ish: remove sync fw clock printJett Rink2019-04-081-4/+1
| | | | | | | | | | | | | | The kernel tries to sync the fw clock every 20 seconds and it adds noise to the ISH console log since the ISH does not support fw clock sync. BRANCH=none BUG=none TEST=console message no longer appears every 20 seconds. Change-Id: I3650d81407c43b85d6c49f53f0633b945cc748cc Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1557886 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* ish: ipc: fix no credit errorHyungwoo Yang2019-04-081-2/+7
| | | | | | | | | | | | | | | | | | | | | | Currently, in doorbell clearing IRQ handler, IRQ status bit clearing happens after the handler sends an item in tx queue. This prevents the next doorbell clearing interrupt if host clears the doorbell for the item just sent by the handler but before the handler clears the status bit. so clearing IRQ status bit should happen before sending an item. BRANCH=none BUG=b:129937881 TEST=tested on Arcada platform Change-Id: I84a487c0cd9edf2af41acad1163c6f6ed91588ba Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1557853 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com> Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ish: print heci error messages when occurJett Rink2019-04-051-7/+2
| | | | | | | | | | | | | | | | | | | | The error message for the HECI bus should print to the console if errors occur. Only the spammy debug message should be guarded by the debug compiler option. BRANCH=none BUG=none TEST=see prints on console This exposes that we are failing to send HECI (ISHTP) messages due to a flow control issue (no cred) Change-Id: I7ca8d47531df8a206165d4b3f14cb367d9d5d745 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1553299 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Mathew King <mathewk@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-1/+1
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: replace 1 << digits, with BIT(digits)Gwendal Grignou2019-03-261-14/+14
| | | | | | | | | | | | | | | | Requested for linux integration, use BIT instead of 1 << First step replace bit operation with operand containing only digits. Fix an error in motion_lid try to set bit 31 of a signed integer. BUG=None BRANCH=None TEST=compile Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ish: update power rail request (vnn)li feng2019-02-201-0/+25
| | | | | | | | | | | | | | | | | | | | | | When the AP is trying to go down to S0ix from S0 (suspend), we need to ensure that the ISH is not holding on to any power requests which would prevent the AP from transitioning to S0ix. Re-assert power request when AP enters resume back to S0. Ultimately, the VNN will be controlled at a much finer grain once more power management features are introduces here for the ISH. BRANCH=none BUG=b:123890178 TEST=run "suspend_stress_test -c [loop#]", and pass; this is workaround to fix this issue so not blocking S0ix test. Change-Id: I881f3505300cadf1e0b8dd1750bae4cf2876e514 Signed-off-by: li feng <li1.feng@intel.com> Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1461665 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Edward Hill <ecgh@chromium.org>
* cleanup: do not try to copy to/from NULLJett Rink2019-02-141-1/+2
| | | | | | | | | | | | | | If we receive an unsupported protocol in the ISH, we should not try to dereference a NULL ptr. BRANCH=none BUG=none TEST=builds Change-Id: I4861385c30a94496026c1918d41a18ca82f3c740 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1470897 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ISH: IPC: implement generic IPC layerHyungwoo Yang2018-12-271-0/+729
Introduce new IPC API supporting MNG and HECI protocols. Currently it supports communication with host(x64) BUG=b:79676054 BRANCH=none TEST=Tested on Atlas board. Change-Id: Iea6d1f96c89228b425861d045618d58f9d146f08 Reviewed-on: https://chromium-review.googlesource.com/1279363 Commit-Ready: Hyungwoo Yang <hyungwoo.yang@intel.com> Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
View Lorry Controller Status