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This reverts commit af25602b15b22b9ef5821dcba9934311f2157c48.
Reason for revert: broken build due to ec-utils.
Original change's description:
> Merge remote-tracking branch cros/main into factory-brya-14517.B-main
>
> Generated by: util/update_release_branch.py --baseboard brya --relevant_paths_file
> baseboard/brya/relevant-paths.txt factory-brya-14517.B-main
>
> Relevant changes:
>
> git log --oneline 54462f034b..aa40b859b3 -- baseboard/brya board/agah
> board/anahera board/banshee board/brya board/crota board/felwinter
> board/gimble board/kano board/mithrax board/osiris board/primus
> board/redrix board/taeko board/taniks board/vell board/volmar
> driver/bc12/pi3usb9201_public.* driver/charger/bq25710.*
> driver/ppc/nx20p348x.* driver/ppc/syv682x_public.*
> driver/retimer/bb_retimer_public.* driver/tcpm/nct38xx.*
> driver/tcpm/ps8xxx_public.* driver/tcpm/tcpci.* include/power/alderlake*
> include/intel_x86.h power/alderlake* power/intel_x86.c
> util/getversion.sh
>
> e6da633c38 driver: Sort header files
> 234a87ae2d tcpci: Add FRS enable to driver structure
> a56be59ccd tcpm_header: add test for tcpm_dump_registers
> 57b3256963 Rename CONFIG_CHARGER_INPUT_CURRENT to _CHARGER_DEFAULT_CURRENT_LIMIT
> e420c8ff9a marasov: Modify TypeC and TypeA configuration.
> 43b53e0045 Add default implementation of board_set_charge_limit
> b75dc90677 Add CONFIG_CHARGER_MIN_INPUT_CURRENT_LIMIT
> f1b563c350 baseboard: Sort header files
> 7d01b1e58d driver/retimer/ps8818.h: Add I2C ADDR FLAGS 0x30, 0x58, 0x70
> ec31407993 Add CONFIG_CHARGER_INPUT_CURRENT_DERATE_PCT
> 8f89f69a5b crota: disable lid angle sensor for clamshell
>
> BRANCH=None
> BUG=b:259002141 b:255184961 b:247100970 b:259354679 b:260630630
> BUG=b:163093572 b:254328661
> TEST=`emerge-brya chromeos-ec`
>
> Force-Relevant-Builds: all
> Change-Id: Ia85a701fbf6b8e67ec214b9e25e0e55e980a6f47
> Signed-off-by: YH Lin <yueherngl@google.com>
Bug: b:259002141 b:255184961 b:247100970 b:259354679 b:260630630
Bug: b:163093572 b:254328661
Change-Id: I48d5aa4cc67a69ee1f6ac9255ac3087d34da4c72
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4077248
Tested-by: YH Lin <yueherngl@chromium.org>
Commit-Queue: YH Lin <yueherngl@chromium.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Auto-Submit: YH Lin <yueherngl@chromium.org>
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ISH should set PMC LTR(Latency Tolerance Reporting) for DMA operation.
Without doing this, we observed system shutdown during D0i3.
This CL set LTR to 2ms before DMA operation and set LTR to a large
number after DMA operation is completed to enable SOC to go into the
lowest possible power state.
BUG=b:234136500
BRANCH=none
TEST=on Nirwen platform, ISH enter D0i3 host loading case, and also
stitching to coreboot case; S0i3 is hit and no shutdown.
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Signed-off-by: Li Feng <li1.feng@intel.com>
Change-Id: Ib0fe907470774998dda29a40197d6c18ad6372f1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4003320
Code-Coverage: Haribalaraman Ramasubramanian <haribalaraman.r@intel.corp-partner.google.com>
Reviewed-by: Kyoung Kim <kyoung.il.kim@gmail.com>
Reviewed-by: Haribalaraman Ramasubramanian <haribalaraman.r@intel.corp-partner.google.com>
Commit-Queue: Kangheui Won <khwon@chromium.org>
Tested-by: Haribalaraman Ramasubramanian <haribalaraman.r@intel.corp-partner.google.com>
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
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Normally we don't do this, but enough changes have accumulated that
we're doing a tree-wide one-off update of the name & style.
BRANCH=none
BUG=chromium:1098010
TEST=`repo upload` works
Change-Id: Icd3a1723c20595356af83d190b2c6a9078b3013b
Signed-off-by: Mike Frysinger <vapier@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3891203
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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ish_dma_page was intended to be used in the aontaskfw implementation,
but we never used it. Remove the unused code.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I33983a4e6c6de082078b8b6b59519fbc095d8022
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1631588
Reviewed-by: Jett Rink <jettrink@chromium.org>
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We should be using the BIT(n) macro rather than (1 << n), as it
prevents errors, and makes the intended purpose a little bit easier to
read.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: Ia727ac2f8e5abfb852ba78d5cba19d7c8af72839
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1567688
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Arcada/ISH5 power management needs the support for dma between
UMA and SRAM to do SRAM swap in and swap out. Add the dma driver
and API which utilizes dma engine to perform dma transfer between
UMA and SRAM.
BUG=b:127723182
BRANCH=none
TEST=tested on arcada
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Change-Id: I22172b176eed92d7f487641f9b5c79dfd04f602a
Reviewed-on: https://chromium-review.googlesource.com/1507326
Commit-Ready: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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