| Commit message (Collapse) | Author | Age | Files | Lines |
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The current API for system_get_scratchpad mixes the status and the value
being read. Update the signature to allow both.
BRANCH=none
BUG=b:195481980
TEST=make testall && zmake testall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I3a5f5ad523d507c53a5d474806f58afafb82e70c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3074828
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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_Noreturn was added in C11 and the convenience macro "noreturn" is
specified by stdnoreturn.h:
https://en.cppreference.com/w/c/language/_Noreturn.
BRANCH=none
BUG=none
TEST=make buildall -j
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I30361bb5290cea1c776a7356f7e3a68edf1f8e39
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2324816
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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"enum ec_current_image" is exposed in ec_commands.h (and used by non-EC
code, such as biod).
We also have an "enum system_image_copy_t" that is the exact same thing
(though has a few more definitions).
A followup CL (I714b6bd8c0d7192386404c25a831e38438fa5238) adds the
"sysinfo" host command, so we want to be able to expose all the
potential image variants. Rather than maintain two enums that can
potentially get out of sync, unify the code to use a single enum. We
choose to keep the "enum ec_current_image", since external code depends
on it.
To verify that this change results in no changes to the generated
binaries:
./util/compare_build.sh --board all
BRANCH=none
BUG=b:146447208
TEST=./util/compare_build.sh --board=all
Change-Id: I13776bc3fd6e6ad635980476a35571c52b1767ac
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2036599
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Infrastructure related changes to support enabling power management
for ish5.4 on tgl rvp platform.
BUG=b:149238813
BRANCH=none
TEST=ISH can successfully enter into D0i1/D0i2/D0i3 on tgl rvp.
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Change-Id: I50b6f1a4fe9c14f9479af2a2a438ec7395ec27a1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056149
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
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Chip level enablement of ish5.4 on tgl rvp platform.
BUG=b:141519691
BRANCH=none
TEST=tested on tgl rvp
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Change-Id: I3f6249e1816d81deec0420a12b093918ee7fbddc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1846788
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
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RESET_FLAGS_* are used when setting/reading the field ec_reset_flags of
struct ec_response_uptime_info, which is defined in ec_commands.h. So it
might be better to put those macros there.
To be consistent with the other macros in the file, add "EC_" prefixes
to them.
BUG=b:109900671,b:118654976
BRANCH=none
TEST=make buildall -j
Cq-Depend: chrome-internal:1054910, chrome-internal:1054911, chrome-internal:1045539
Change-Id: If72ec25f1b34d8d46b74479fb4cd09252102aafa
Signed-off-by: You-Cheng Syu <youcheng@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1520574
Tested-by: Yu-Ping Wu <yupingso@chromium.org>
Commit-Ready: Yu-Ping Wu <yupingso@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Refactor D3 entry to use ish_pm_reset, as it performs the same
operations modulo the pm_state, save persistent data when entering D3.
BUG=b:134089952
BRANCH=none
TEST=rmmod ish modules, insmod again on arcada
Change-Id: Ifed49d49d42b55cd220ff5d8e8d98843d28dfa22
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1674470
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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This adds a relevant config option, as well as implementation for a
max-retries mechanism on the watchdog timer. Included is an
implementation for ISH which counts persistent data storage and halts
when the max-retries is exceeded.
BUG=b:132059981
BRANCH=none
TEST=observed system halt after 4 resets, then re-enable once we had a
successful reset
Change-Id: I7b443d9a20a474b294d494c5b6046a38eaf6ff12
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1609605
Reviewed-by: Jett Rink <jettrink@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
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Move persistent data definitions to a structure and have linker script
define the address of the symbol into the AON ROM (persistent data
storage). Use the magic number "ISHd" to verify persistent data
storage and copy to static memory when valid. Commit changes from the
local copy during reset.
BUG=b:133779707,b:133647823,b:132059981
BRANCH=none
TEST=power-on is only reset flag under cold reset, panic data
persists, watchdog reset produces correct reset flags, UART always
printing system info on boot
Change-Id: I65a458cc2656f8fe26361ef2117ceb5439edff6c
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636293
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
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The getters and setters for the reset flags should take and return the
same type. `uint32_t' seems the more appropraiate type than `int', so
change the setter to take `uint32_t'.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I50928a114858dd51034a048520efa849f5182bd0
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1615648
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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In order to implement watchdog reset counter, we need to be saving and
restoring reset flags. b:132457636 explains the details of the memory
layout chosen for the soft-register.
BUG=b:132366384,b:132457636
BRANCH=none
TEST=reset arcada_ish using: `reboot' command, watchdog expiration,
and cold-reset, observed the correct value for "reset cause" printed
during boot
Change-Id: I84b965803d37703fac6494fb55a97c674ce64b89
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1606074
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This adds a firmware status update to FWSTS_FW_IS_RUNNING during boot.
BUG=b:132060059
BRANCH=none
TEST=Observed firmware status is 7 (IS_RUNNING) during boot before
HECI ready.
Change-Id: If41c86838a956023754be960472b8c641416b7c9
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1597674
Reviewed-by: Jett Rink <jettrink@chromium.org>
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ish_pm_reset is a rather complex procedure, and encountering a panic
while it is happening could lead to an infinte loop of handling
panics. This will preform a reset of the Minute-IA core if a panic
occurs and the system is already resetting from panic.
BUG=b:130752748,b:130587334
BRANCH=none
TEST=copied some invalid opcodes into switch_to_aontask procedure,
observed the hard reset after forcing a panic
Change-Id: I43459d78da9b67297f84e3a736d3f92da42a814c
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1576835
Reviewed-by: Jett Rink <jettrink@chromium.org>
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on ish, need fw clean fabric agent error status, otherwise will
cause ish wakeup immediately after entered low power mode.
this operaion has no impact for other functions.
BUG=b:130193448
BRANCH=none
TEST=verified on arcada platform
Change-Id: Iecd85d1ab037aafa988d6c32ad47b51003913198
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1563470
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
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1: reset and reset_prep implemented
2: D3 flow implemented
BUG=b:122364080
BRANCH=none
TEST=tested on arcada
Change-Id: Ie6bacd89e2363578d85157dfb1dd8b56e2828d05
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1536486
Commit-Ready: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
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AON PM framework including:
1: AON task skeleton
2: task switching between main FW and AON task
3: 'idlestats' console command for D0ix statistic information
4: D0ix entrance in idle task
BUG=b:122364080
BRANCH=none
TEST=tested on arcada
Change-Id: Iefa9e067892d5c42d9f0c795275fe88e5a36115b
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1510518
Commit-Ready: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Commit-Ready: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
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Make the `reboot` EC commands (console and host) operational
BRANCH=none
BUG=none
TEST=`reboot` on ISH console will power cycle ISH
Change-Id: I2dfb4437bf110493cea91087c65b62df5d08be05
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1483278
Reviewed-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
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After firmware update, cr50 toggles the EC's reset line, expecting
the system will boot. This isn't the case for Chromebox because it
sets AP_OFF flag on a clean shutdown (to restore the previous power
state after power loss & restore).
This patch adds EC_REBOOT_HIBERNATE_CLEAR_AP_OFF to EC reboot
command. It makes EC first clear AP_OFF then hibernate.
BUG=b:69721737
BRANCH=none
TEST=Verify Fizz reboot after cr50 update.
Change-Id: If3207d7284f244ca1adf0d516ef744dbc739a9c1
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/802632
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Added while loop in system_reset as a respond to CL
https://chromium-review.googlesource.com/742916. Otherwise, ISH build is
broken.
BRANCH=none
BUG=none
TEST=make BOARD=soraka_ish
Change-Id: I1e2736219c6039e7398da02cd6d492e9474ad27c
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/795030
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
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This reverts commit 20c439be209a9cc0bb949ad21f289c453126395f.
Reason for revert: This breaks hibernate on skylake boards and
needs to be tested on more than just kevin before submitting.
BUG=chromium:702451
BRANCH=none
TEST=power down and successfully hibernate on Eve
Original change's description:
> system: Shutdown AP before entering hibernate mode
>
> BUG=chromium:702451
> BRANCH=none
> TEST=manually test on gru: confirm
> 'Alt+VolUp+h' puts gru in hibernate mode and
> AC plug-in wakes it up.
>
> Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096
> Reviewed-on: https://chromium-review.googlesource.com/470787
> Commit-Ready: Philip Chen <philipchen@chromium.org>
> Tested-by: Philip Chen <philipchen@chromium.org>
> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
>
TBR=rspangler@chromium.org,aaboagye@chromium.org,philipchen@chromium.org
# Not skipping CQ checks because original CL landed > 1 day ago.
BUG=chromium:702451
Change-Id: Ie847a5e3efb28256b00ddc6534d8ae6bbbba7121
Reviewed-on: https://chromium-review.googlesource.com/482989
Commit-Ready: Duncan Laurie <dlaurie@chromium.org>
Tested-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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BUG=chromium:702451
BRANCH=none
TEST=manually test on gru: confirm
'Alt+VolUp+h' puts gru in hibernate mode and
AC plug-in wakes it up.
Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096
Reviewed-on: https://chromium-review.googlesource.com/470787
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add generic routines to read or write a byte to battery-backed RAM, and
implement vbnvcontext get/set using these routines.
BUG=chrome-os-partner:62952
BRANCH=reef
TEST=On reef, with subsequent commit, run "cutoff" on the console,
reattach AC, and verify device successfully wakes. Also verify Rp is
dropped on console 'reboot' and F3 + power from RW.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I14691923f2e5198e901b6b5199e92c58c68cd18d
Reviewed-on: https://chromium-review.googlesource.com/444444
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This patch adds the initial support for ISH chip to enable the EC
firmware to boot on Intel Integrated Sensor Hub (ISH). The following are
enabled:
1. Inter-Processor Communication (IPC) driver that enables the ISH to
communicate with the host Operating system via shared registers.
2. High Precision Event Timer (HPET) driver that provides configurable
timers for the FW to use in task scheduling.
3. I2C bus driver for accessing sensors.
4. UART console driver with TX support only.
BUG=chrome-os-partner:51851
BRANCH=None
TEST=`make buildall -j`
Change-Id: I15d4c201b799cfa79bed220ee573b75f5cd7b1f7
Signed-off-by: Jaiber John <jaiber.j.john@intel.com>
Signed-off-by: Alex Brill <alexander.brill@intel.com>
Signed-off-by: Gomathi Kumar <gomathi.kumar@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/336710
Commit-Ready: Raj Mojumder <raj.mojumder@intel.com>
Tested-by: Jaiber J John <jaiber.j.john@intel.com>
Tested-by: Raj Mojumder <raj.mojumder@intel.com>
Reviewed-by: Jaiber J John <jaiber.j.john@intel.com>
Reviewed-by: Raj Mojumder <raj.mojumder@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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