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* COIL: Rename CONFIG_SPI_MASTER to CONFIG_SPI_CONTROLLERCaveh Jalali2021-06-031-1/+1
| | | | | | | | | | | | | | | | This replaces the CONFIG_SPI_MASTERR config option with CONFIG_SPI_CONTROLLER. BRANCH=none BUG=b:181607131 TEST=make buildall passes; "compare_build.sh -b all" shows no difference Change-Id: I3c921085179294765baadf7074652978fe04a4ed Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2932465 Reviewed-by: Craig Hesling <hesling@chromium.org> Commit-Queue: Craig Hesling <hesling@chromium.org>
* COIL: Rename i2c_peripheral filesDossym Nurmukhanov2020-12-121-1/+1
| | | | | | | | | | | | BUG=none TEST=build and run on volteer BRANCH=none Signed-off-by: dossym@chromium.org Change-Id: I11a75e4954e918b2d4ff575dee14dec621a619b3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2587226 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename CONFIG_I2C_PERIPHERALDiana Z2020-11-051-1/+1
| | | | | | | | | | | | | Rename CONFIG_I2C_PERIPHERAL and related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I3f148e976f3a4d6a1dc6c58686368c056290d5d4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: Rename CONFIG_I2C_CONTROLLERDiana Z2020-11-051-1/+1
| | | | | | | | | | | | | Rename CONFIG_I2C_CONTROLLER and related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* it83xx/dac: add DAC moduletim2020-02-211-0/+1
| | | | | | | | | | | | | | | | | | The DAC module has four channels. We can set output voltage when DAC channel is enabled by this driver. BUG=b:149094279 BRANCH=none TEST=The console command #dac set as follows: read: dac [ch] write: dac [ch] [voltage] [ch]:2-5, [voltage]:0(disable)-3300 Change-Id: I8e815cb5bc749467581d5f771fd6f9e0995fca3b Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2046685 Reviewed-by: Diana Z <dzigterman@chromium.org>
* it83xx/spi: add spi slave functiontim2019-12-111-0/+1
| | | | | | | | | | | | | | | | Add the spi slave function which is required to communicate with the EC when the CPU is the ARM processor. BUG=none BRANCH=none TEST=Replaced board elm's EC with it83202 and boot kernel and keyboard work. Change-Id: I7ce3bb56450276997b58e84b1c6de3f8e45bb4b7 Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918991 Reviewed-by: Jett Rink <jettrink@chromium.org>
* keyscan: decouple keyboard_raw functionality from the presence of TASK_KEYSCANAlexandru M Stan2019-11-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | With the addition of external i2c keyboard controllers, chips that don't necessarly have gpios going to a keyboard can now still have a TASK_KEYSCAN. Therefore it's wrong to assume we want the chip/*/keyboard_raw code included. There was no easy way to make an ways on option (eg: CONFIG_KEYBOARD_RAW) that could get #undefd in strategic places. The place that would always define it would be in include/config.h but I don't believe that executes before the build.mk rules. BUG=b:135895590 TEST=Other boards with keyboards still happy. TEST=No compile errors (regarding missing keyboard GPIOS) when declaring TASK_KEYSCAN on a fresh stm32 board. BRANCH=master Change-Id: I061812a6941a11784950280648912edd5844bd79 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1693862 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* core:RISC-V / chip:IT83202Dino Li2019-06-111-1/+9
| | | | | | | | | | | | | | | | The IT83202 is an embedded controller with RISC-V core. It supports maximum ram size to 256KB and internal flash to 1MB. BUG=none BRANCH=none TEST=EC boots and test console commands (eg: taskinfo, version, sysjump...) on it83202 EVB. Change-Id: I424c0d2878beb941c816363b5c7a3f57fda9fd13 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1588300 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* it83xx/i2cs: add i2c slave functiontim2019-03-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | The I2C function of IT8320 is used as the slave. The slave channel A can support 16-byte FIFO for read and write data. The enhanced I2C channel D, E and F can support read and write 256-byte data by DMA mode. When master transmits data to slave, the interrupt signal will generate, and the data will be saved to buffer. BUG=none BRANCH=none TEST=none Change-Id: I167215352119ec11dfd96eb1f33abc1e2111dead Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1488273 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Tim2 Lin <tim2.lin@ite.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* it83xx/spi: rename spi.c to spi_master.ctim2018-12-131-1/+1
| | | | | | | | | | | | | | | | | In it83xx chip, the file of spi.c is renamed to spi_master.c, and the related config is renamed too. BUG=none BRANCH=none TEST=none Change-Id: Ia696e62afa2ff06da68a3e4af685615b1dbcc8e9 Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1372870 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Tim2 Lin <tim2.lin@ite.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* lpc/espi: convert ec chip code to use granular optionJett Rink2018-05-221-2/+2
| | | | | | | | | | | | | | Break the ec chip code up with the more granular CONFIG_HOSTCMD_(X86|LPC|ESPI) options. BRANCH=none BUG=chromium:818804 TEST=Full stack builds and works on yorp (espi) and grunt (lpc) Change-Id: Ie272787b2425175fe36b06fcdeeee90ec5ccbe95 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067502 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: it83xx: remove config option of CONFIG_EC2IDino Li2018-04-031-2/+1
| | | | | | | | | | | | | | | | This is a specific option for it83xx chip and is used to include EC2I module. And we won't need it without LPC module enabled, so just depend on CONFIG_LPC. BUG=none BRANCH=none TEST=make buildall -j, boot to kernel on reef_it8320. Change-Id: I1aa4a182e94d802dbf9ca19cc4a47ef9542d74a7 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/987674 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* it83xx: add espi moduleDino Li2017-11-141-0/+1
| | | | | | | | | | | | | | | | | | Add espi control module for it83xx. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. it8390+Intel SKL-Y RVP3 and boot to shell. 2. console command "kbpress 1 4" to test keyboard data. (board code for espi module test on CL:392587) Change-Id: I1b32bd16f7e01abf07b9c9a68ebef2399cc9828d Reviewed-on: https://chromium-review.googlesource.com/394471 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* it83xx: Make it build with coreboot-sdkPatrick Georgi2017-11-081-2/+0
| | | | | | | | | | | | | | | | | | | | | | | With these changes $ CROSS_COMPILE_nds32=/opt/coreboot-sdk/bin/nds32le-elf- \ make BOARD=it83xx_evb works for me. The -mno-gp-direct option is replaced with -mcmodel=large in new compilers, as indicated in private email with Andes Tech. It was also used as a work-around and leaving out the option altogether reduces the code size significantly, so it's now dropped. BRANCH=none BUG=b:35572628 TEST=the above command creates an image Change-Id: Ib580d65e6e52f291fdb920b7b65fb22cfda9f736 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/753623 Commit-Ready: Stefan Reinauer <reinauer@google.com> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
* cleanup: Remove jtag_pre_init()Shawn Nematbakhsh2017-09-071-1/+1
| | | | | | | | | | | | | | | Use our newly-created chip_pre_init() for doing JTAG initialization. BUG=chromium:747629 BRANCH=None TEST=`make buildall -j` Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ic5771895a214a9f1aa9bd289eef576f52adf973f Reviewed-on: https://chromium-review.googlesource.com/629676 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* chip: it83xx: add support for floating point unitDino Li2017-05-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because N8 CPU doesn't have floating point unit, so we implement an extra floating point engine (single-precision addition, subtraction, multiplication, and division) into it8320 to improve performance of floating point operation. To make CPU's instruction compatible, we use register (DLMB) to switch ALU (Arithmetic Logic Unit). eg: Instruction 'ADD45' adds the contents of two registers then writes the result to the source register. But if we switch ALU to floating point operation mode, this instruction will do a floating-point addition instead. For the other FPU that we don't support as far, we have to use soft float library routines of nds32. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=add the following console command and test different scenarios by changing variable a and b. #define PRINTF_FLOAT(x) ((int)((x) * 1000.0f)) static int it83xx_fpu_test(int argc, char **argv) { volatile float a = 1.23f; volatile float b = 4.56f; volatile float c; c = a + b; ccprintf("__addsf3: (%d)\n", PRINTF_FLOAT(c)); c = a - b; ccprintf("__subsf3: (%d)\n", PRINTF_FLOAT(c)); c = a * b; ccprintf("__mulsf3: (%d)\n", PRINTF_FLOAT(c)); c = a / b; ccprintf("__divsf3: (%d)\n", PRINTF_FLOAT(c)); return EC_SUCCESS; } DECLARE_CONSOLE_COMMAND(fpu, it83xx_fpu_test, "", ""); Change-Id: I4fc1c08d8c2376156bec9f098491187675c4a88f Reviewed-on: https://chromium-review.googlesource.com/427640 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* g: CONFIG_FLASH should be optionalBill Richardson2016-10-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The application may need to read/write/erase the flash memory, but we not want console users to do so. This CL adds CONFIG_FLASH_PHYSICAL, which allows the higher-level CONFIG_FLASH to be undefined while still providing the chip-specific flash_physical_* accessor functions. There aren't many board.h files that needed changes, since CONFIG_FLASH_PHYSICAL is enabled by default, just like CONFIG_FLASH. BUG=chrome-os-partner:57408 BRANCH=none TEST=make buildall; try on Gru with and without CR50_DEV=1 See that it still boots, updates, wipes, restores, etc. without linking common/flash.o in the production image; and that the flash commands are still there in the dev build. Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: I7eb1bbcb414b1c70ee427c4fcb5cea899dbb9e93 Reviewed-on: https://chromium-review.googlesource.com/391188 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* it8380dev: add flash module and fix system jumpDino Li2015-07-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add flash control module for emulation board. 2. Fix system jump for Andes core. 3. Change the physical size of the flash on the chip to 256KB. note: 1. Only IT839x series supports flash write protect by registers. 2. Static DMA method of flash code only for IT839x series and IT838x Dx. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command flashwp and flashinfo 1-a. flashwp enable 1-b. WP asserted and reboot 1-c. flashinfo RO protected now 1-d. WP deasserted and reboot 1-e. No protected 1-f. flashwp disable 1-g. WP asserted and reboot 1-h. No protected 2. console sysjump and sysinfo 2-a. sysjump rw 2-b. jumping to image RW 2-c. sysinfo, Copy : RW, Jumped : yes 2-d. sysjump ro 2-e. jumping to image RO 2-f. sysinfo, Copy : RO, Jumped : yes 3. RO/RW firmware image test 3-a. sysjump rw 3-b. use console command "eflash" to erase RO region, erase OK and system still work. 3-c. reflash firmware 3-d. sysjump rw, sysjump ro 3-e. use console command "eflash" to erase RW region, erase OK and system still work. Change-Id: I7666a095e73026a02fb812e5143bc5172ab713e8 Reviewed-on: https://chromium-review.googlesource.com/271390 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add i2c control moduleDino Li2015-06-301-0/+1
| | | | | | | | | | | | | | | | | | | | Add i2c control module for emulation board. To rename CONFIG_ to CONFIG_IT83XX_ for IT83XX series configuration. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command "i2cscan" found devices correctly. 2. console command "i2cxfer". 2-a. port2 + battery, i2cxfer r, r16, and rlen OK. 2-b. port1 + slave evb, i2cxfer r, r16, rlen, w, and w16 OK. Change-Id: I67165f7dcdef538ba6dd03b47f1621a73cc68379 Reviewed-on: https://chromium-review.googlesource.com/263678 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add fan control moduleDino Li2015-06-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. pwm, add frequency select function for pwm channels. 2. timer, add external timer 3~8 apis. 3. add fan control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console command "faninfo, fanset, fanduty, and fanauto" fanset 3333 Setting fan 0 rpm target to 3333 faninfo Actual: 3390 rpm Target: 3333 rpm Duty: 35% Status: 1 (changing) Mode: rpm Auto: no Enable: yes faninfo Actual: 3301 rpm Target: 3333 rpm Duty: 34% Status: 2 (locked) Mode: rpm Auto: no Enable: yes fanduty 80 Setting fan 0 duty cycle to 80% faninfo Actual: 5952 rpm Target: 3333 rpm Duty: 80% Status: 2 (locked) Mode: duty Auto: no Enable: yes faninfo Actual: 5971 rpm Target: 3333 rpm Duty: 80% Status: 2 (locked) Mode: duty Auto: no Enable: yes fanauto faninfo Actual: 3330 rpm Target: 3333 rpm Duty: 36% Status: 2 (locked) Mode: rpm Auto: yes Enable: yes fanset 8000 Setting fan 0 rpm target to 8000 faninfo Actual: 6793 rpm Target: 8000 rpm Duty: 100% Status: 3 (frustrated) Mode: rpm Auto: no Enable: yes fanset 3456 Setting fan 0 rpm target to 3456 faninfo Actual: 5053 rpm Target: 3456 rpm Duty: 56% Status: 1 (changing) Mode: rpm Auto: no Enable: yes faninfo Actual: 3440 rpm Target: 3456 rpm Duty: 34% Status: 2 (locked) Mode: rpm Auto: no Enable: yes /* force stop the fan */ [87.035136 Fan 0 stalled!] [87.035520 event set 0x00000400] [88.035712 Fan 0 stalled!] [89.036288 Fan 0 stalled!] [90.036864 Fan 0 stalled!] [91.037440 Fan 0 stalled!] [92.038016 Fan 0 stalled!] [93.038592 Fan 0 stalled!] [94.039168 Fan 0 stalled!] /* release */ faninfo Actual: 3427 rpm Target: 3456 rpm Duty: 35% Status: 2 (locked) Mode: rpm Auto: no Enable: yes Change-Id: Icbe1917902d033a8be42b8d834ffc6045d08b985 Reviewed-on: https://chromium-review.googlesource.com/266625 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add peci control modulestabilize-7204.BDino Li2015-06-241-0/+1
| | | | | | | | | | | | | | | | | | | Add peci control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command "pecitemp" get CPU temperature normally. 2. console command "peci" manual test peci commands. (GetDIB, GetTemp, RdPkgConfig, and WrPkgConfig) Change-Id: I48b63a391adf04f159adca401acb369a6acc3799 Reviewed-on: https://chromium-review.googlesource.com/265171 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add sspi control moduleDino Li2015-06-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add sspi control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=EVB + Winbond W25Q80 SPI ROM To define CONFIG_SPI_FLASH, CONFIG_SPI_FLASH_SIZE, and CONFIG_SPI_FLASH_W25X40 console "spi_flashinfo" can get SPI information > spi_flashinfo Manufacturer ID: ef Device ID: 40 14 Unique ID: c8 60 84 a1 1f 6a 7f 2f Capacity: 1024 MB Change-Id: I6c4d4d977536484d47a2207ed80dd0ea08a7c8fd Reviewed-on: https://chromium-review.googlesource.com/267403 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add pmc control moduleDino Li2015-06-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pmc(LPC ACPI) control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. 62h/66h port. 1-a. out 66h 80h, out 62h 00h, in 62h 02h 1-b. out 66h 81h, out 62h 01h, out 62h 55h 1-c. out 66h 80h, out 62h 01h, in 62h 55h 1-d. out 66h 80h, out 62h 02h, in 62h aah 2. H2RAM LPC I/O cycle 900h ~ 9FFh = DLM 0x8D900 ~ 0x8D9FF and host read only. 3. 80h port, console command port80. 4. host command. 4-a. host request (LPC I/O 800h ~ 807h) 03 FD 00 00, 00 00 00 00 out 204h DAh, in 200h 00h host response (LPC I/O 800h ~ 80Bh) 03 F7 00 00, 04 00 00 00, 02 00 00 00 4-b. host request 03 EE 01 00, 00 00 04 00, 01 02 03 04 out 204h DAh, in 200h 00h host response 03 E5 00 00, 04 00 00 00, 05 05 05 05 Change-Id: I5c3bac66306dfba380548a74a64536ea606ddd3e Reviewed-on: https://chromium-review.googlesource.com/269271 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Dino Li <dino.li@ite.com.tw> Commit-Queue: Dino Li <dino.li@ite.com.tw>
* it8380dev: add KBC/KMSC moduleDino Li2015-03-221-1/+3
| | | | | | | | | | | | | | | | | 1. DLM 16KB. 2. Add KBC/KMSC module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=EVB + x86 MB can boot into DOS and keyboard works. Change-Id: Ia5cc2d4f1733ce07879d410b0447b2d48e50cd95 Reviewed-on: https://chromium-review.googlesource.com/259923 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Dino Li <dino.li@ite.com.tw> Commit-Queue: Dino Li <dino.li@ite.com.tw>
* it8380dev: add ec2i control moduleDino Li2014-12-231-0/+1
| | | | | | | | | | | | | | | | | | | Add EC2I control module for emulation board. The EC2I bridge enables the EC to access the host controlled module registers (e.g., host configuration module(PNPCFG) and SWUC) Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=EC2I read: Read a logical device page, the results are correctly. EC2I write: Initialize PNPCFG success. Change-Id: I900450d4a8c49182c438b69b5e738c12dc437fe4 Reviewed-on: https://chromium-review.googlesource.com/230410 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add adc control moduleDino Li2014-12-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add adc control module for emulation board. The ADC converts the input voltage signal ranging from 0v to 3v into a 10-bit unsigned integer. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=manual test. 1 - adc channel 1, 3, 5, and 7 to ground. 2 - adc channel 0 and 2 to 1.26v. 3 - adc channel 4 and 6 to 1.72v. 4 - condition, factor_mul = 3000, factor_div = 1024, and shift = 0. 5 - console "adc", result as following. adc_ch0 = 1256 adc_ch1 = 0 adc_ch2 = 1256 adc_ch3 = 0 adc_ch4 = 1722 adc_ch5 = 0 adc_ch6 = 1725 adc_ch7 = 0 Change-Id: I72efd09c9f7dbff25c4f6fd4846c9b1c1e5637ca Reviewed-on: https://chromium-review.googlesource.com/228092 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add pwm control moduleDino Li2014-10-291-0/+1
| | | | | | | | | | | | | | | | Add pwm control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console manual test, pwm channels output correctly. Change-Id: I6eb1a9e4fdcb9279e9d0cbd67f7a92afed21c889 Reviewed-on: https://chromium-review.googlesource.com/223921 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* ite: Add initial support for ITE IT8380 chipVincent Palatin2014-01-081-0/+16
Initial support for the ITE IT8380 chip with the following peripherals : - 8250-like UART module. - HW timer (with a 128-us tick period). - GPIO with pins initialization and edge interrupt support. other functions are stubbed. - Clock : basic fixed frequency setup only. It also add the dev board configuration as a test vehicle. Signed-off-by: Alec Berg <alecaberg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:23575 TEST=make BOARD=it8380dev on IT8380 dev board, use the EC serial console, use gettime from console. Change-Id: Id4bf37d1beb21d1a4bee404c9a0bc500025fe787 Reviewed-on: https://chromium-review.googlesource.com/175481 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
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