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* chip/it83xx: Clean-up ec2i pnpcfg settingsFurquan Shaikh2018-05-261-47/+0
| | | | | | | | | | | | | | | | | | This change gets rid of enum ec2i_setting and reorganizes pnpcfg_settings into multiple tables each for a logical device that needs to be configured. BUG=b:79897267 BRANCH=None TEST=Verified that bip still boots up. Change-Id: If7a756640c5e72b8494294495693589aaaa8fe74 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1070486 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Dino Li <dino.li@ite.corp-partner.google.com>
* chip/it83xx: Configure IRQTP for KBC when using eSPIFurquan Shaikh2018-05-231-0/+3
| | | | | | | | | | | | | | | | | | | | | | | SERIIRQ# is by default deasserted level high. However, when using eSPI, SERIRQ# is routed over virtual wire as interrupt event. As per eSPI base spec (doc#327432), all virtual wire interrupt events are deasserted level low. Thus, it is necessary to configure this interrupt as inverted. ITE hardware takes care of routing the SERIRQ# signal appropriately over eSPI/LPC depending upon the selected mode. BUG=b:79897267 BRANCH=None TEST=Verified using evtest that keypresses are properly identified on the OS side. Change-Id: Ie3b92f20fa915ba8f17dcbcb600ebfe5cbfb4d57 Signed-off-by: Dino Li <dino.li@ite.corp-partner.google.com> Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1069570 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cleanup: it83xx: pull pnpcfg_settings[] to the chip-levelDino Li2018-04-121-2/+0
| | | | | | | | | | | | | | | | | With this change, we don't need to declare pnpcfg_settings[] for each it83xx based board. BUG=b:76022972 BRANCH=none TEST=make buildall -j, boot to kernel on reef_it8320. Change-Id: I39eb465ba7d6191dce4ab1a39787a2c925ec3b91 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/1009544 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* it83xx: ec2i: move 'ec2i_setting' to header file of chipDino Li2017-05-181-0/+44
| | | | | | | | | | | | | | | This enum can be included in common. BUG=none BRANCH=none TEST=build boards: it83xx_evb and reef_it8320 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Id7014b7de170cb3324c45d43fbf04ebe48a69f5e Reviewed-on: https://chromium-review.googlesource.com/505864 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* it8380dev: Modify port 80 service routineEli Hsu2015-11-111-1/+1
| | | | | | | | | | | | | | | | | Change the parameter name. Change the output length of console command - port80. Signed-off-by: Eli Hsu <eli.hsu@ite.com.tw> BRANCH=none BUG=none TEST=console command port80 Change-Id: I8da3f7ec30f16ceea17a8f4fec55162f73a4b28b Reviewed-on: https://chromium-review.googlesource.com/311960 Commit-Ready: Eli Hsu <eli.hsu@ite.com.tw> Tested-by: Eli Hsu <eli.hsu@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: fix lpc moduleDino Li2015-09-161-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | 1. add lpc_keyboard_clear_buffer() function. 2. Enable P80L function, that LPC I/O port 80h data can be mapped to BRAM bank1 (offset 0x80 ~ 0xBF). Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. The lpc_keyboard_clear_buffer() function can clear OBF. 2. 80h port, console command port80. 3. 62h/66h port. 3-a. out 66h 80h, out 62h 00h, in 62h 02h 3-b. out 66h 81h, out 62h 01h, out 62h 55h 3-c. out 66h 80h, out 62h 01h, in 62h 55h 3-d. out 66h 80h, out 62h 02h, in 62h aah 4. Host command "version". Change-Id: Id2b5a5813cbe8edfc4ecc7b153874b819d460f43 Reviewed-on: https://chromium-review.googlesource.com/298421 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: fix all the header guardsBill Richardson2015-06-181-3/+3
| | | | | | | | | | | | | | | This unifies all the EC header files to use __CROS_EC_FILENAME_H as the include guard. Well, except for test/ util/ and extra/ which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively. BUG=chromium:496895 BRANCH=none TEST=make buildall -j Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029 Reviewed-on: https://chromium-review.googlesource.com/278121 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: add ec2i control moduleDino Li2014-12-231-0/+126
Add EC2I control module for emulation board. The EC2I bridge enables the EC to access the host controlled module registers (e.g., host configuration module(PNPCFG) and SWUC) Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=EC2I read: Read a logical device page, the results are correctly. EC2I write: Initialize PNPCFG success. Change-Id: I900450d4a8c49182c438b69b5e738c12dc437fe4 Reviewed-on: https://chromium-review.googlesource.com/230410 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
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