| Commit message (Collapse) | Author | Age | Files | Lines |
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In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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This CL change watchdog warning timer to timer 8 (32bit)
and change low power mode timer to timer 7 (24bit)
The next step will be changing watchdog warning timer to timer 1 (16bit),
so we will get a 32bit timer for future use.
BUG=b:186028167
BRANCH=none
TEST=console command "waitms"
"waitms 1200", EC warning but no reset.
"waitms 1600", EC warning and reset.
No reset after EC waked-up from low power mode.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Ibf1387ffe334a6e3e82d5b6a72cdb6e099d3a279
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847671
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Sam Hurst <shurst@google.com>
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In IT8320 BX version, there is a chance of failure in reading
external timer observation register. We are using the time delay
of CPU in order to read register twice that can avoid the bug of
reading time failure when CPU and EC are counting at the same time.
There will be once successful read. The bug has been fixed in
the later version of chip.
BUG=none
BRANCH=none
TEST=Ensure the observation register of external timer will
be read successful in IT8320 DX chip.
Change-Id: I0ec2d0bb83afd1549118de9383dc16cf5adb6b5a
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1215523
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Tim2 Lin <tim2.lin@ite.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Adding fix of event timer for CL:358730.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=chrome-os-partner:55044
TEST=We simulate the delay time between first and second read,
and prove this method can avoid latch fail.
Change-Id: I82cd4ce470ffc9a8262d9303e3fd390812c89cac
Reviewed-on: https://chromium-review.googlesource.com/380349
Commit-Ready: Dino Li <Dino.Li@ite.com.tw>
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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1. In combinational mode and clock source is 8MHz,
if timer 3 counter register always equals to 7, then timer 4 will be a
32-bit MHz free-running counter.
2. Fix TIMER_32P768K_CNT_TO_US(), each count should be 30.5175 us,
not 32.768us.
3. Fix TIMER_CNT_8M_32P768K().
4. Make sure LPC wake up interrupt is enabled before entering doze /
deep doze mode.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. Console commands: 'gettime', 'timerinfo', 'waitms', and 'forcetime'.
2. Enabled Hook debug, no warning message received (48hrs).
3. Tested ectool command 'version' x 2000.
Change-Id: I796d985361d3c18bc5813c58705b41923e28c5b1
Reviewed-on: https://chromium-review.googlesource.com/310039
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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1. Implement deep doze mode for CONFIG_LOW_POWER_IDLE.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=test the following items in deep doze mode.
1. WUI interrupts wake-up OK. (For example, power button, lid,
uart rx, keyboard ksi, and so on)
2. LPC access interrupt wake-up OK.
3. Enabled Hook debug, no warning message received (48hrs).
Change-Id: I8702a112632cb6c1c0fa75d682badf272130a7d4
Reviewed-on: https://chromium-review.googlesource.com/307060
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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[chip config]
1. No hardware specific udelay().
2. Enable watchdog.
[watchdog]
3. Watchdog period is "CONFIG_WATCHDOG_PERIOD_MS" of config.h.
4. Watchdog auxiliary timer period is "CONFIG_AUX_TIMER_PERIOD_MS".
[task and irq]
5. Write 1 to clear interrupt pending status, no |.
6. A global variable for store interrupt number of software interrupt.
[uart]
7. Always reset UART module before config it.
[hwtimer]
8. Use more external timers for HW timer module.
[task]
9. Fix task profiling.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=[watchdog]
1. console "waitms 1100", only pre-watchdog warning message.
2. console "waitms 1600", warning message and watchdog reset.
[hwtimer]
3. console commands "gettime", "timerinfo", and "forcetime".
4. enable hook debug and there is no delayed by more than 10%
warning message over 48 hours.
5. There is no watchdog reset too.
[task]
6. console 'taskinfo'
Task Ready Name Events Time (s) StkUsed
0 R << idle >> 00000000 32.927724 308/512
1 HOOKS 00000000 0.034267 372/768
2 R CONSOLE 00000000 0.116763 468/768
3 HOSTCMD 00000000 0.000641 372/512
4 KEYPROTO 00000000 0.000042 212/512
5 KEYSCAN 00000000 0.000908 356/512
IRQ counts by type:
38 2932
155 1
158 261
160 67
Service calls: 87
Total exceptions: 3348
Task switches: 167
Task switching started: 0.001999 s
Time in tasks: 33.282819 s
Time in exceptions: 0.164717 s
Change-Id: I234085cec231cd855d2a5e639ea1b0966c61d796
Reviewed-on: https://chromium-review.googlesource.com/296939
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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1. pwm, add frequency select function for pwm channels.
2. timer, add external timer 3~8 apis.
3. add fan control module for emulation board.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=console command "faninfo, fanset, fanduty, and fanauto"
fanset 3333
Setting fan 0 rpm target to 3333
faninfo
Actual: 3390 rpm
Target: 3333 rpm
Duty: 35%
Status: 1 (changing)
Mode: rpm
Auto: no
Enable: yes
faninfo
Actual: 3301 rpm
Target: 3333 rpm
Duty: 34%
Status: 2 (locked)
Mode: rpm
Auto: no
Enable: yes
fanduty 80
Setting fan 0 duty cycle to 80%
faninfo
Actual: 5952 rpm
Target: 3333 rpm
Duty: 80%
Status: 2 (locked)
Mode: duty
Auto: no
Enable: yes
faninfo
Actual: 5971 rpm
Target: 3333 rpm
Duty: 80%
Status: 2 (locked)
Mode: duty
Auto: no
Enable: yes
fanauto
faninfo
Actual: 3330 rpm
Target: 3333 rpm
Duty: 36%
Status: 2 (locked)
Mode: rpm
Auto: yes
Enable: yes
fanset 8000
Setting fan 0 rpm target to 8000
faninfo
Actual: 6793 rpm
Target: 8000 rpm
Duty: 100%
Status: 3 (frustrated)
Mode: rpm
Auto: no
Enable: yes
fanset 3456
Setting fan 0 rpm target to 3456
faninfo
Actual: 5053 rpm
Target: 3456 rpm
Duty: 56%
Status: 1 (changing)
Mode: rpm
Auto: no
Enable: yes
faninfo
Actual: 3440 rpm
Target: 3456 rpm
Duty: 34%
Status: 2 (locked)
Mode: rpm
Auto: no
Enable: yes
/* force stop the fan */
[87.035136 Fan 0 stalled!]
[87.035520 event set 0x00000400]
[88.035712 Fan 0 stalled!]
[89.036288 Fan 0 stalled!]
[90.036864 Fan 0 stalled!]
[91.037440 Fan 0 stalled!]
[92.038016 Fan 0 stalled!]
[93.038592 Fan 0 stalled!]
[94.039168 Fan 0 stalled!]
/* release */
faninfo
Actual: 3427 rpm
Target: 3456 rpm
Duty: 35%
Status: 2 (locked)
Mode: rpm
Auto: no
Enable: yes
Change-Id: Icbe1917902d033a8be42b8d834ffc6045d08b985
Reviewed-on: https://chromium-review.googlesource.com/266625
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
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