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* clock: Fix clock_wait_cycles() asmShawn Nematbakhsh2016-11-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The 'cycles' register will be clobbered by our macro, so it must be specified as an output operand that may also be used as input. BUG=chrome-os-partner:60000 BRANCH=gru,strago,glados TEST=Build + burn wheatley, verify alignment exception is not encountered on boot. Also verify produced assembly is still correct: 100a89a6: 2303 movs r3, #3 100a89a8: 3b01 subs r3, #1 100a89aa: d1fd bne.n 100a89a8 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I1be03a006967aed6970dbac5d98a19a31e0b7d49 Reviewed-on: https://chromium-review.googlesource.com/412441 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Mulin Chao <mlchao@nuvoton.com> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cleanup: DECLARE_CONSOLE_COMMAND only needs 4 argsBill Richardson2016-08-241-10/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since pretty much always, we've declared console commands to take a "longhelp" argument with detailed explanations of what the command does. But since almost as long, we've never actually used that argument for anything - we just silently throw it away in the macro. There's only one command (usbchargemode) that even thinks it defines that argument. We're never going to use this, let's just get rid of it. BUG=none BRANCH=none CQ-DEPEND=CL:*279060 CQ-DEPEND=CL:*279158 CQ-DEPEND=CL:*279037 TEST=make buildall; tested on Cr50 hardware Everything builds. Since we never used this arg anyway, there had better not be any difference in the result. Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/374163 Reviewed-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* lm4: Increase time to wake up from deep sleepShawn Nematbakhsh2015-01-081-2/+2
| | | | | | | | | | | | | | | | | | The recent change to decrease the time to wake up from deep sleep when not using LFIOSC was too agressive. Increase the time to wake up based upon the worst observed case. BUG=chrome-os-partner:35184 TEST=Manual on Samus. Go to deep sleep, verify that no "overslept by Xus" prints are seen. BRANCH=Samus Change-Id: Ib9fe2eba5e29a112e03fffaedbc5ae53d6d650ff Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/239242 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
* lm4: decrease time to wake up from deep sleep to save powerAlec Berg2015-01-061-0/+8
| | | | | | | | | | | | | | | | | | Decrease the time to wake up from deep sleep when not using LFIOSC (when using PIOSC in deep sleep). This helps keep us in deep sleep longer and therefore save power. BUG=none BRANCH=samus TEST=Load onto samus and run for a couple of hours, varying from S0 to S5, with and without EC. Use idlestats to check that closest we get to missing deadline is 86us away. Change-Id: I3eee908e9f42a1c5b549e93d63588a3cb6e29a5d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/238412 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add cprints() and ccprints()Vic Yang2014-05-211-5/+5
| | | | | | | | | | | | | | | | | | | | | Our code base contains a lot of debug messages in this pattern: CPRINTF("[%T xxx]\n") or ccprintf("[%T xxx]\n") The strings are taking up spaces in the EC binaries, so let's refactor this by adding cprints() and ccprints(). cprints() is just like cprintf(), except that it adds the brackets and the timestamp. ccprints() is equivalent to cprints(CC_CONSOLE, ...) This saves us hundreds of bytes in EC binaries. BUG=chromium:374575 TEST=Build and check flash size BRANCH=None Change-Id: Ifafe8dc1b80e698b28ed42b70518c7917b49ee51 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/200490 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* lm4: Remove 500k clock delay in clock_init()Randall Spangler2014-02-071-10/+0
| | | | | | | | | | | | | | | | | We copied that delay because it seemed to be necessary on early LM4 chips to avoid glitching the UART. But on current boards (e.g. rambi) this does not seem to be necessary, and delays boot by 31ms. So, remove the delay. BUG=chrome-os-partner:23794 BRANCH=rambi TEST=boot system; see little to no glitching on EC uart, and system boots ok hibernate 1; see little to no glitching on EC uart, and system boots ok Change-Id: I9d4b5927da4282e47e1b09be838104c64f25268c Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/185232 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Rename mixed-case config constantsRandall Spangler2013-12-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This renames constants used in compiler conditionals to uppercase. BOARD_foo CHIP_foo CHIP_FAMILY_foo CHIP_VARIANT_foo CORE_foo Mixed-case constants are still defined by the makefile, but are now no longer used. I will make one more pass in a week or so to catch any that are part of someone else's CL, since otherwise this change might silently merge correctly but result in incorrect compilation. Then I will remove defining the mixed-case constants. BUG=chromium:322144 BRANCH=none TEST=Build all boards. Also, "git grep 'BOARD_[a-z]'" should return no results (similarly for CHIP, CORE, etc.) Change-Id: I6418412e9f7ec604a35c2d426d12475dd83e7076 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179206 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* lm4: Fixed low power idle doesn't always wake up.stabilize-4920.6.Brelease-R32-4920.BAlec Berg2013-11-051-12/+26
| | | | | | | | | | | | | | | | | | | | | Temporary fix to the bug in which we miss wake events when in deep sleep with the LFIOSC (32kHz) clock and the EC is cold. This fix involves simply using a faster clock, 250kHz, when in low speed deep sleep. This fix consumes more power but solves the bug. Renamed EC console command dsleepmask to dsleep. BRANCH=none BUG=chrome-os-partner:23678 TEST=Go in to low speed deep sleep by going into either S3 or G3 and letting the EC console timeout. Then freeze-spray the EC chip. Wake up the EC via the console and make sure that the idlestats show that we have not missed a deadline. Change-Id: I4f9844f1937bc8c95cf1540502f7d8fb4cbc097e Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175614 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Even more TODO commentsRandall Spangler2013-11-011-7/+9
| | | | | | | | | | | | | | | Update comments with more info, or remove if no longer applicable. No code changes. BUG=chrome-os-partner:18343 BRANCH=none TEST=build all platforms; pass unit tests Change-Id: I5b56eeb500bc0f00e84e91ef99684f4b1b310972 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175418 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* lm4: Use low speed clock in deep sleep.Alec Berg2013-10-211-3/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | Changed the low power idle task to use the low speed clock in deep sleep. The low power idle task is currently only enabled for Peppy, Slippy, and Falco. This change decreases power consumption when the AP is not running. Note that the low speed clock is slow enough that the JTAG cannot be used and the EC console UART cannot be used. To work around that, this commit detects when the JTAG is in use and when the EC console is in use, and will not use the low speed clock if either is in use. The JTAG in use never clears after being set and the console in use clears after a fixed timeout period. BUG=None BRANCH=None TEST=Passes all unit tests. Tested that the EC console works when in deep sleep. Tested that it is possible to run flash_ec when in deep sleep and using the low speed clock. Change-Id: Ia65997eb8e607a5df9b2c7d68e4826bfb1e0194c Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/173326 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* lm4: Add a low power idle task.stabilize-4825.BAlec Berg2013-10-151-17/+225
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First implementation of a low power idle task for the LM4 chip. The low power mode is selected by defining CONFIG_LOW_POWER_IDLE in a board.h file. This commit turns it on for Peppy, Slippy, and Falco only because those are the only boards tested. When using the low power idle task, the chip goes in to deep sleep when it can. Deep sleep disables clocks to most peripherals and puts the onboard flash and RAM into a low power mode. The chip is woken out of deep sleep using the RTC in the hibernate module. Increased the idle task stack size to handle more involved idle task. In board.c, the array of GPIO info can be used to select which GPIO points can wake up the EC from deep sleep. Currenlty selected are the power button, lid open, AC present, PCH_SLP_S3, and PCH_SLP_S5. Additionally the port with the KB scan row GPIO point is also enabled to wake up the EC from deep sleep. Signed-off-by: Alec Berg <alecaberg@chromium.org> BUG=None BRANCH=none TEST=Passes all unit tests. Runs on slippy, peppy, and falco with no noticeable side affects. Verified that the power consumed by the EC is lower when in S3, S5 and G3 by scoping the sense resistor powering the chip. Change-Id: I83fa9a159a4b79201b99f2c32678dc4fc8921726 Reviewed-on: https://chromium-review.googlesource.com/172183 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
* lm4: Modified clock gating to allow easy expansion to low power.Alec Berg2013-10-101-6/+126
| | | | | | | | | | | | | | | | | | | | | Created a new function to enable or disable clocks to various peripherals. This new function makes it easy to specify if you want the clock enabled in run mode, sleep mode, and/or deep sleep mode. Added infrastructure to specify which GPIOs should interrupt the EC from deep sleep. BUG=none BRANCH=none TEST=Passes all unit tests. Ran on a peppy and verified that the clock gate control registers in run mode (LM4_RCGC regs) were the same before and after this change. Change-Id: Ia5009ac8c837f61dca52fe86ebdeede2e1a7fe4d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172454 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Enable ADC charger current monitor for SlippyBill Richardson2013-06-071-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IOUT pin of the smart battery charger can be used to monitor the AC adapter current (default) or the battery charging current. BUG=none BRANCH=none TEST=manual Discharge the battery a bit, and connect to the EC console. With the AC power plugged in, the "battery" command should show charging status, including current. The "adc" command will display the A-D converters, including the current measurement. For example: > battery Temp: 0x0b88 = 295.2 K (22.1 C) Manuf: SMP-COS20 Device: OC2 Chem: LION Serial: 0x0005 V: 0x4130 = 16688 mV V-desired: 0x41a0 = 16800 mV V-design: 0x39d0 = 14800 mV I: 0x008e = 142 mA(CHG) I-desired: 0x0080 = 128 mA Mode: 0x6001 Charge: 98 % Abs: 94 % Remaining: 1871 mAh Cap-full: 1923 mAh Design: 2000 mAh Time-full: 0h:23 Empty: 0h:0 > > adc ADC channel "ECTemp" = 317 ADC channel "ChargerCurrent" = 455 > That current is significantly higher than the "I:" reported by the "battery" command. But look at the charger options: > sbc 0x12 0x7904 (30980) > Bit 5 controls the IOUT Selection. When clear, it monitors the current from the AC adapter. Set bit 5 to monitor the current provided to the battery: > sbc 0x12 0x7924 > adc ADC channel "ECTemp" = 318 ADC channel "ChargerCurrent" = 128 > That matches what the smart battery sees. Change-Id: I2fe351304421dfb22d83ef13d416aa44c9f56e8a Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/57940 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Create board configuration for falco bringupBill Richardson2013-05-201-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | This change just copies slippy and tweaks a few things that were slippy-specific instead of not-link-specific (there are still bugs open for those things). BUG=chrome-os-partner:18788 BRANCH=none TEST=manual Since there are no Falco-specific changes yet (just slippy with another name), I can try it on Slippy: cros_workon --board falco start chromeos-ec emerge-falco chromeos-ec ~/trunk/src/platform/ec/util/flash_ec --board falco I also built and tested Link EC, to make sure nothing broke there either. Change-Id: I9b3682032bd51adab4450520dfe52e3036750ef9 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/55820 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Slippy: Changes needed to boot EC without bricking.Bill Richardson2013-05-101-1/+6
| | | | | | | | | | | | | | | | This commits the hacks made during board bringup. Bugs can be filed and fixed based on this starting point. BUG=chrome-os-partner:18825 BRANCH=slippy TEST=manual Try it and see. Change-Id: Ia663eaf9a357633873b1b5d5cc6dbdda63513082 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50875 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* Add parse_bool() to centralize parsing boolean optionsRandall Spangler2013-03-291-9/+7
| | | | | | | | | | | | | | | | | | | | | | This way debug commands which previously took only yes/no or on/off or enable/disable can take any of those options. BUG=chrome-os-partner:18467 BRANCH=none TEST=Try "on", "off", "yes", "no", "true", "false", "ena", "disable", for each of the following commands: - ilim (spring) - pll (link) - power (spring/snow) - hcdebug (all) - kblog (link) - ksscan (all) - lp5562 (spring) Change-Id: Ie8e0fae3775b1da711864bcba6682ba5e68a06f1 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/46900 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Clean up clock moduleRandall Spangler2012-10-301-52/+60
| | | | | | | | | | | | | | No functional changes; just code cleanup. On LM4 this also #ifdef's out the 'sleep' and 'pll' commands since they're big and we don't use them. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system Change-Id: I1b72d07d6cca2c783d7ac4c880119df3e88e356e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36799
* Hook functions no longer return valuesRandall Spangler2012-10-231-4/+5
| | | | | | | | | | | | | | | Previously, all hook functions returned EC_SUCCESS, which was meaningless because nothing ever looked at the return value. Changing the return value to void saves ~100 bytes of code size and an equal amount of source code size. BUG=none BRANCH=none TEST=code still builds; link still boots Change-Id: I2a636339894e5a804831244967a9c9d134df7d13 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36372
* Enable PLL only briefly during ADC initRandall Spangler2012-08-091-6/+6
| | | | | | | | | | | | | | | | | | It was previously only enabled for 1500us during boot, but in a way that triggered a needless round of notifications to other modules. This is cleaner. This also fixes adc_init() not initializing the task IDs to wake when interrupts come in, and removes some unneeded code from other init functions. BUG=chrome-os-partner:12472 TEST=boot system and run adc command. Should still provide reasonable data. Change-Id: I9ae5857d988c727caf5d53f551a2f12b30974c0f Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29806 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Move System Control Block registers to core headerVincent Palatin2012-06-151-1/+2
| | | | | | | | | | | | | | | | | | | The SCB registers are defined in the ARMv7-M architecture, so they are common to all chips. We will need System Control Register (SCR aka SYSCTRL) to implement power management on stm32. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=make BOARD=link && make BOARD=snow Change-Id: I35c283731306541b3d21398c96fdca89954fe20a Reviewed-on: https://gerrit.chromium.org/gerrit/25392 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
* Better help for console commandsRandall Spangler2012-05-251-3/+9
| | | | | | | | | | | | | | | | | | | | Additional help messages and usage are gated by CONFIG_CONSOLE_CMDHELP, so we can turn it on if there's space (adds about 3KB to image size) and turn it off when there isn't. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=manual 1) help 2) help list 3) help gpioset 4) gpioset -> wrong number of params 5) gpioset fred 0 -> param1 bad 6) gpioset cpu_prochot fred -> param2 bad Change-Id: Ibe99f37212020f763ebe65a068e6aa83a809a370
* Clean up debug commands to use less spaceRandall Spangler2012-05-211-1/+1
| | | | | | | | BUG=none TEST=(run the commands) Change-Id: I6ed4aee169311825190bcc386b86cdc32ba0866a Signed-off-by: Randall Spangler <rspangler@chromium.org>
* Add option to pll command to divide down system clockRandall Spangler2012-05-151-5/+33
| | | | | | | | | | | | | | | | | | | | | | Also fix sleep command triggering watchdog timer in spin-idle Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7454 TEST=manual 1) check PLL operation - system keeps operating pll on pll off pll 4 pll 16 2) check sleep operation - no watchdog sleep 0 (reboot) sleep 1 Change-Id: Ib3079634a883d7c96b221f9e06a148221628cc3c
* Add more info to pll debug commandRandall Spangler2012-04-251-2/+14
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=pll, then pll on, then pll off Change-Id: I9e220a20e234f5eb30009d0a2a4fc080a167c971
* Use console output instead of uart output for console commandsRandall Spangler2012-04-241-6/+5
| | | | | | | | | | | | This completes console output cleanup. The remaining calls to uart_puts() and uart_printf() actually need to be that way. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7464 TEST=manual Change-Id: Ib1d6d370d30429017b3d11994894fece75fab6ea
* Disable PLL at end of initRandall Spangler2012-04-241-9/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | This saves power. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8798 TEST=manual Get a proto1 system modified with INA current sensor 1) From chroot: dut-control i2c_mux_en:on i2c_mux:rem dut-control pp3300_alw_mv pp3300_alw_ma 2) From EC console: pll (this should turn the PLL back on; it'll report clock frequency ~66MHz) 3) From chroot: dut-control i2c_mux_en:on i2c_mux:rem dut-control pp3300_alw_mv pp3300_alw_ma Current (ma) should be bigger than in step 1 Change-Id: I806953684c57fd60bf481acb01dddffe2f2ad0ed
* Remove clock calibration for PIOSCRandall Spangler2012-04-201-9/+9
| | | | | | | | | | | Proto1 has A3 silicon which is factory-trimmed. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7693 TEST=boot and look for glitchy EC console. If it's not glitchy, it worked. Change-Id: I56cb2458e600e76e458bce0f24832ef4f456ac14
* Add hooks module so modules can be notified of system-level events.Randall Spangler2012-04-191-25/+2
| | | | | | | | | | | | This will be used for sleep/wake/sysjump/etc. For now it's just wired up to clock frequency changing. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=manual: use nopll command, should still work Change-Id: Iedcea5830bc18eacfd955c29b8f793aba8905dd8
* Support dynamically changing the system clockRandall Spangler2012-04-091-57/+107
| | | | | | | | | | | | | | | | | | | | | | | Add nopll command to turn off the PLL, reducing the system clock to 16Mhz. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:8798 TEST=manual boot system press power button to boot x86 temps // should print all temperatures timerinfo timerinfo timerinfo // convince yourself this is counting up at about 1MHz nopll // this drops the system clock to 16MHz temps // should still print all temperatures timerinfo timerinfo timerinfo // should still be counting up at about 1MHz Change-Id: Ie29ceb17af348148bffadf63d60c1b731f4c3f6d
* register console commands at compile-timeVincent Palatin2012-01-241-12/+1
| | | | | | | | | | | | | | | Instead of using a runtime callback to register the console commands, put them in a special linker section. So we can do a macro to "register" them during the build. It saves 684 bytes and a few microseconds at startup. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=run a few commands from the BDS command line. Change-Id: Id33ea210b9035bf76ed720373c74c5dd24ccd1b1
* Calibrate internal oscillator using hibernate clockRandall Spangler2012-01-231-0/+8
| | | | | | | | | | | | This works around a chip errata where the internal oscillator on early EC parts (as used on proto0) is untrimmed. Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7693 TEST=if it runs, it works Change-Id: Ie82a524543f4cf25efd0de7998dbdae103bd126b
* Use internal oscillatorRandall Spangler2012-01-231-10/+9
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7677 TEST=if it runs, it works Change-Id: Ib4f28505f6b9a21375f9c3ba97c6e8d56722c051
* Configure all GPIOsRandall Spangler2012-01-121-0/+3
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: I0a9be4c689fb72507edcf202073b23c58902d7de
* Add constants for all GPIOs.Randall Spangler2012-01-111-1/+1
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=chrome-os-partner:7528 TEST=none Change-Id: I3b77cbbb7f0cc12a4daae7ababd603b5d7af32d1
* Clean up labels and TODOsRandall Spangler2012-01-101-1/+1
| | | | | | | | | Signed-off-by: Randall Spangler <rspangler@chromium.org> BUG=none TEST=none Change-Id: I8d6e99b3e2b60d32ea3719468590b055e692a67e
* Initial sources import 3/3Vincent Palatin2011-12-071-0/+199
source files mainly done by Vincent. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Change-Id: Ic2d1becd400c9b4b4a14d4a243af1bdf77d9c1e2
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