| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | chip/mt_scp: mt8195 uses 32k clock when AP suspend | Tinghan Shen | 2021-09-06 | 1 | -1/+1 |
| * | chip/mt_scp: restore fmeter value | Tinghan Shen | 2021-08-19 | 1 | -0/+9 |
| * | chip/mt_scp: move video capability to chip specific | Tzung-Bi Shih | 2021-08-09 | 2 | -0/+21 |
| * | chip/mt_scp: fix 8195 IRQ default polarity | Tinghan Shen | 2021-07-23 | 1 | -0/+3 |
| * | chip/mt_scp: add mt8195 irq support | Tinghan Shen | 2021-07-13 | 1 | -0/+163 |
| * | chip/mt_scp: change uart clock to ULPOSC | Tinghan Shen | 2021-07-13 | 1 | -1/+1 |
| * | chip/mt_scp: support mt8195 clock | Tinghan Shen | 2021-07-13 | 3 | -0/+525 |
| * | chip/mt_scp: support MT8195 UART | Tzung-Bi Shih | 2021-06-29 | 1 | -0/+8 |
| * | chip/mt_scp: move UART pinmux settings to chip specific | Tzung-Bi Shih | 2021-06-29 | 2 | -0/+26 |
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index : delta/coreboot/chrome-ec.git | |
| review.coreboot.org: chrome-ec.git |
| summaryrefslogtreecommitdiff |