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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-0519-3013/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* Replace I2C_GET_ADDR with I2C_STRIP_FLAGSYuval Peress2020-11-021-2/+2
| | | | | | | | | | | | | | | | | The new I2C_STRIP_FLAGS macro was added to avoid conflict with Zephyr's macro. This CL performs the migration to that new API. BRANCH=none BUG=b:172067439 TEST=make runtests -j and built for various boards: eve, volteer, arcada_ish, atlas, hatch, kohaku, nocturne, samus, and scarlet Change-Id: I0583b647435db96ec268f186252b367bdc4118a6 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2511097 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* ec: change usage of dummySam Hurst2020-08-051-1/+1
| | | | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the term "dummy" with inclusive alternatives. BUG=b:162781382 BRANCH=None TEST=make -j buildall `grep -ir dummy *` The only results are in "private/nordic_keyboard/sdk8.0.0" which is not our code. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* ec: change usage of whitelist/blacklistPaul Fagerburg2020-07-282-12/+12
| | | | | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the terms "whitelist", "blacklist", and similar with inclusive alternatives. BUG=b:162262297 BRANCH=None TEST=`grep -Eirl "(white|black)[ _\-]*list" .` The only results are in "private/nordic_keyboard/sdk8.0.0" which is not our code. Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: Ie5210b98e1096c22d0e9284c101a42820bd3d79d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321549 Tested-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* ec: Enlarged Task Stack size on platformsBrian J. Nemec2020-04-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The task stack size of is small enough that the process was triggering stack overflows when responding to commands. These actions had a small chance of causing EC hardfaults. This was apparent with the gpioget command which had the attributes of performing many calls to a printf function which also has many parameters. Since the structure of a printf with 10 or more parameters is common when constructing console responses, this enlarges the stack for that task. This is more important since the probability of it creating a hardfault is low. To reduce the chance of this issue on other platforms, the platforms with 488 byte tasks were also enlarged to 512 bytes. BUG=chromium:1056780 BRANCH=none TEST=Connected servod to servo_v4 looped the command 'dut-control servo_v4_uart_cmd:gpioget' 1000 times TEST=make buildall -j Verified free ram space remains over 60 bytes on impacted platforms Change-Id: I6b50b204c83a10068153f3e01bc134446047f235 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2133130 Tested-by: Brian Nemec <bnemec@chromium.org> Commit-Queue: Brian Nemec <bnemec@chromium.org> Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* keyscan: decouple keyboard_raw functionality from the presence of TASK_KEYSCANAlexandru M Stan2019-11-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | With the addition of external i2c keyboard controllers, chips that don't necessarly have gpios going to a keyboard can now still have a TASK_KEYSCAN. Therefore it's wrong to assume we want the chip/*/keyboard_raw code included. There was no easy way to make an ways on option (eg: CONFIG_KEYBOARD_RAW) that could get #undefd in strategic places. The place that would always define it would be in include/config.h but I don't believe that executes before the build.mk rules. BUG=b:135895590 TEST=Other boards with keyboards still happy. TEST=No compile errors (regarding missing keyboard GPIOS) when declaring TASK_KEYSCAN on a fresh stm32 board. BRANCH=master Change-Id: I061812a6941a11784950280648912edd5844bd79 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1693862 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Cleanup: Correct GPIO alternate function parameterVijay Hiremath2019-11-011-4/+7
| | | | | | | | | | | | | | | Added code to correct the GPIO alternate function parameter at Chipset level. Optionally board level functions can cleanup the code in additional change lists. BUG=b:139427854 BRANCH=none TEST=make buildall -j Change-Id: I1171ca36a703291070fc89f972f84414adcf04fc Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880974 Reviewed-by: Keith Short <keithshort@chromium.org>
* main: Initialize I2C pretty earlyAlexandru M Stan2019-10-241-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices (like the keyboard, CBI) need I2C access pretty early. Until now I2C would get initialized pretty late in a hook, which was far too late for some stuff. As a result from this change, CONFIG_I2C_MASTER now implies the i2c_init() function will be called at board boot. Some chips (cr50, host tests) needed a stub i2c_init in order to compile cleanly. BUG=b/138384267 TEST=EFS doesn't happen significantly later than it used to TEST=Recovery keys now work with I2C keyboard on jacuzzi TEST=make buildall TEST=Sanity check i2c behavior (booting, "i2scan", "battery") on a variety of ECs: * ampton (ite EC, x86 AP) * bobba (npcx EC, x86 AP) * jacuzzi (stm32f0 EC, ARM AP) * cheza (npcx EC, ARM AP) BRANCH=master Change-Id: Ifa830e8e509ff16b36b4dcc86617869b1cb86ac3 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1772490 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* printf: Fix up %p to %pPEvan Green2019-10-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | In order to avoid landmines later with future extensions to %p, disallow %p by itself. The danger is that we'll have something like: printf("%pFOO", myptr), and then later will add a %pF extension, but miss this printf (maybe the string is split, maybe it's just missed). Missing a conversion during extension is worse than just seeing a print like <ptr_val>OO, since %pF likely reaches through the pointer and interprets its contents according to whatever F means. Convert existing uses of %p to %pP, so they're explicitly printing a pointer value, giving us flexibility to extend in the future. BUG=chromium:984041 TEST=make -j buildall BRANCH=None Cq-Depend:chrome-internal:1560879 Change-Id: I36a4bee8d41cb9a6139171f8de0d8f2f19468132 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1730604 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* chip/nrf51/gpio.c: Actually check the flag (instead of == 0)Patrick Georgi2019-09-121-1/+1
| | | | | | | | | | | | | | | Found by Coverity Scan #146623 BUG=none BRANCH=none TEST=none Change-Id: I04ca143f794596c7be00f69ee297b33759125ae2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1801204 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
* include: Move RESET_FLAG_* into ec_commands.h as EC_RESET_FLAG_*You-Cheng Syu2019-08-261-5/+6
| | | | | | | | | | | | | | | | | | | | | | | RESET_FLAGS_* are used when setting/reading the field ec_reset_flags of struct ec_response_uptime_info, which is defined in ec_commands.h. So it might be better to put those macros there. To be consistent with the other macros in the file, add "EC_" prefixes to them. BUG=b:109900671,b:118654976 BRANCH=none TEST=make buildall -j Cq-Depend: chrome-internal:1054910, chrome-internal:1054911, chrome-internal:1045539 Change-Id: If72ec25f1b34d8d46b74479fb4cd09252102aafa Signed-off-by: You-Cheng Syu <youcheng@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1520574 Tested-by: Yu-Ping Wu <yupingso@chromium.org> Commit-Ready: Yu-Ping Wu <yupingso@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-7/+7
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ec: Remove extraneous new line as the end of CPRINTS stringsNicolas Boichat2019-06-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | CPRINTS already prints a new line, no need to add another one. Spotted during boot on kukui, and then realized there are many more instances: "" [3.689239 Module 7 is not supported for clock disable ] "" BRANCH=none BUG=none TEST=make buildall -j TEST=`git grep CPRINTS | grep "\\\\n\""` shows nothing of interest. Change-Id: I4d2bbbc65a91fa56c6e6115aa5c353bfd2b384a1 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660519 Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-1911-11/+11
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-266-22/+22
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: replace 1 << digits, with BIT(digits)Gwendal Grignou2019-03-262-13/+13
| | | | | | | | | | | | | | | | Requested for linux integration, use BIT instead of 1 << First step replace bit operation with operand containing only digits. Fix an error in motion_lid try to set bit 31 of a signed integer. BUG=None BRANCH=None TEST=compile Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: Include compile_time_macros.h when neededGwendal Grignou2019-03-261-0/+1
| | | | | | | | | | | | | Include compile_time_macros.h to files that will use BIT macro. BUG=None BRANCH=None TEST=unit tests. Change-Id: I9d44f4b588620f6770f8d522d422f5dd0d237903 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1525156 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Keyboard: Allow keyboard size to be set at run timeDaisuke Nojiri2018-10-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | Currently, the keyboard size (i.e. number of columns) is static. This patch allows it to be configured at run time. It's required to support a keyboard with/without keypad in a single image. KEYBOARD_COLS_MAX has the build time col size. It's used to allocate exact spaces for arrays. Actual keyboard scanning is done using keyboard_cols, which holds a runtime col size. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:117126568 BRANCH=none TEST=Verify keyboard functionality on Sona and Veyron. Change-Id: I4b3552be0b4b315c3fe5a6884cf25e10aba8be7c Reviewed-on: https://chromium-review.googlesource.com/1285292 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* gpio: extend flags size to accommodate GPIO_ flagsJett Rink2018-06-111-1/+1
| | | | | | | | | | | | | | | | | | | Widen the flags field from 16-bit to 32-bit to fit all of the current GPIO_flags. Also reorder fields within struct to allow arm compiler to use 16-bit instructions instead of 32-bit instructions when accessing fields (which is important for kevin board, otherwise it runs out of space) Lastly, re-tool macros to all reordering of gpio_alt_func struct fields. BRANCH=none BUG=b:109884927 TEST=builds on all boards Change-Id: I20b136c94a607c19031a88bddd255cc34cc57bbd Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1096018 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* Use gcc's name for ARMv6-with-svc on cortex-m chipsPatrick Georgi2018-05-171-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | There were various longer discussions[0] over in gcc land and the consensus pretty much is that gcc's "armv6-m" shouldn't really exist, or rather map to its armv6s-m. Cortex-M0 is documented as having the svc instruction[1], and we make use of it, so let's go for armv6s-m as the safe option. We need that on some compilers (gcc 7, gcc 8.1.0) since they actually make that distinction. Newer ones won't, older ones apparently didn't. [0] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85606 https://sourceware.org/bugzilla/show_bug.cgi?id=23126 [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0497a/BABBHFJE.html BUG=b:65441143 BRANCH=none TEST=builds with gcc 8.1 Change-Id: Ib0d5c484c2fbd72f033d8523cd1e0c6c8ce0c7e6 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1061073 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
* cleanup: Remove jtag_pre_init()Shawn Nematbakhsh2017-09-072-10/+1
| | | | | | | | | | | | | | | Use our newly-created chip_pre_init() for doing JTAG initialization. BUG=chromium:747629 BRANCH=None TEST=`make buildall -j` Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ic5771895a214a9f1aa9bd289eef576f52adf973f Reviewed-on: https://chromium-review.googlesource.com/629676 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Revert "system: Shutdown AP before entering hibernate mode"Duncan Laurie2017-04-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 20c439be209a9cc0bb949ad21f289c453126395f. Reason for revert: This breaks hibernate on skylake boards and needs to be tested on more than just kevin before submitting. BUG=chromium:702451 BRANCH=none TEST=power down and successfully hibernate on Eve Original change's description: > system: Shutdown AP before entering hibernate mode > > BUG=chromium:702451 > BRANCH=none > TEST=manually test on gru: confirm > 'Alt+VolUp+h' puts gru in hibernate mode and > AC plug-in wakes it up. > > Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096 > Reviewed-on: https://chromium-review.googlesource.com/470787 > Commit-Ready: Philip Chen <philipchen@chromium.org> > Tested-by: Philip Chen <philipchen@chromium.org> > Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> > TBR=rspangler@chromium.org,aaboagye@chromium.org,philipchen@chromium.org # Not skipping CQ checks because original CL landed > 1 day ago. BUG=chromium:702451 Change-Id: Ie847a5e3efb28256b00ddc6534d8ae6bbbba7121 Reviewed-on: https://chromium-review.googlesource.com/482989 Commit-Ready: Duncan Laurie <dlaurie@chromium.org> Tested-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* system: Shutdown AP before entering hibernate modePhilip Chen2017-04-141-1/+1
| | | | | | | | | | | | | | BUG=chromium:702451 BRANCH=none TEST=manually test on gru: confirm 'Alt+VolUp+h' puts gru in hibernate mode and AC plug-in wakes it up. Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096 Reviewed-on: https://chromium-review.googlesource.com/470787 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* system: Add generic bbram read / write routinesShawn Nematbakhsh2017-02-241-2/+2
| | | | | | | | | | | | | | | | | | Add generic routines to read or write a byte to battery-backed RAM, and implement vbnvcontext get/set using these routines. BUG=chrome-os-partner:62952 BRANCH=reef TEST=On reef, with subsequent commit, run "cutoff" on the console, reattach AC, and verify device successfully wakes. Also verify Rp is dropped on console 'reboot' and F3 + power from RW. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I14691923f2e5198e901b6b5199e92c58c68cd18d Reviewed-on: https://chromium-review.googlesource.com/444444 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: DECLARE_CONSOLE_COMMAND only needs 4 argsBill Richardson2016-08-241-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since pretty much always, we've declared console commands to take a "longhelp" argument with detailed explanations of what the command does. But since almost as long, we've never actually used that argument for anything - we just silently throw it away in the macro. There's only one command (usbchargemode) that even thinks it defines that argument. We're never going to use this, let's just get rid of it. BUG=none BRANCH=none CQ-DEPEND=CL:*279060 CQ-DEPEND=CL:*279158 CQ-DEPEND=CL:*279037 TEST=make buildall; tested on Cr50 hardware Everything builds. Since we never used this arg anyway, there had better not be any difference in the result. Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/374163 Reviewed-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* btle: Accepts and maintains connectionsLevi Oliver2016-08-231-1/+19
| | | | | | | | | | | | | | | | | | Can now accept and maintain a single connection indefinitely by sending empty packets at every connection interval to keep the connection alive. TEST=BTLE dongle sending connect requests and connecting to NRF51 running this code. Connection was established and ran for at least 48 hours until manual termination. BUG=None BRANCH=None Change-Id: Iad4bd434ecd1edd6c5c8dfe8b72ca41fd82d0bb4 Signed-off-by: Levi Oliver <levio@google.com> Reviewed-on: https://chromium-review.googlesource.com/370839 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* btle: Improved stability of ble_tx functionLevi Oliver2016-08-171-0/+21
| | | | | | | | | | | | | | | | | | | | | ble_tx now resets values that could prevent its functioning. Since there is no NRF51 shortcut from TX->RX, it also blocks until packet is transmitted. This prevents calling RX before TX is completed, specifically in advertising state. Also added timeouts to prevent possibility of freezing in case of unexpected state. TEST=Used function before and after CL in a more fully implemented stack. This improved reliability. BUG=None BRANCH=None Change-Id: I6a5b0b6f36e37ac0102d254bbdc9dfcd29694bb8 Signed-off-by: Levi Oliver <levio@google.com> Reviewed-on: https://chromium-review.googlesource.com/370597 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* btle: Improved stability of ble_rx functionLevi Oliver2016-08-162-2/+32
| | | | | | | | | | | | TEST=Used function before and after CL in a more fully implemented stack. This improved reliability and lengthened connection times. BUG=None BRANCH=None Change-Id: I60680c8855d6166e4e4a6a71639ee57464fa21ce Signed-off-by: Levi Oliver <levio@google.com> Reviewed-on: https://chromium-review.googlesource.com/370420 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* btle: Timeout of ble_rx now based on chip timeLevi Oliver2016-08-121-2/+7
| | | | | | | | | | | | | | | Previously, timeout meant the number of attempts taken to receive. Now, it means the number of microseconds before timing out. TEST=printouts displaying time before and after rx attempt. Not included in CL. BUG=None BRANCH=None Change-Id: I00ccfc4bbf15f77c2777f35c911dceacaff98e4f Signed-off-by: Levi Oliver <levio@google.com> Reviewed-on: https://chromium-review.googlesource.com/368471 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* btle: Add framework for parsing data packetsLevi Oliver2016-08-113-23/+22
| | | | | | | | | | | | | | | | | | | Re-wrote ble_radio_init to work with both data and advertising packets. Updated all calls to refactored function. RADIO_PCNF0_ADV renamed because it applies to advertisement and data packet formats. Updated all references to this value. TEST=make BOARD=hadoken BUG=None BRANCH=None Change-Id: I0fdbe0eb146ce5cbc40e3ac67bf4d0e5465dcc2f Signed-off-by: Levi Oliver <levio@google.com> Reviewed-on: https://chromium-review.googlesource.com/367732 Commit-Ready: Myles Watson <mylesgw@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Myles Watson <mylesgw@chromium.org>
* nrf51: Add Bluetooth LE test code for the radioMyles Watson2016-08-033-0/+226
| | | | | | | | | | | | | | | Implement support for Direct Test Modet packets. BUG=None BRANCH=None CQ-DEPEND=CL:361960 TEST=use hci commands to send and receive test packets. Change-Id: Idc12812fb88319ba6f8aad4396a175e3299211b8 Signed-off-by: Myles Watson <mylesgw@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/362143 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Levi Oliver <levio@google.com>
* nrf51: Add Bluetooth LE supportMyles Watson2016-08-034-4/+585
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RADIO_STATE is broken: remove it. Build on the geneneric radio support to send and receive Bluetooth LE packets. Add macros in registers.h to configure PCNF0 and PCNF1. BUG=None BRANCH=None TEST=Send advertisements with console commands ble_adv type length [interval_us] for example: ble_adv 2 8 Advertisements should be received by other devices The Bluetooth Address has the form C5:A4:A3:A2:A1:A* The device name is a substring of ABCDEFGH... ABCDEFGH @ C5:A4:A3:A2:A1:A2 (name length is 8, type is 2) ABCDEFGH @ C5:A4:A3:A2:A1:A2 (name length is 8, type is 2) ABCDEF @ C5:A4:A3:A2:A1:A6 (name length is 6, type is 6) TEST=Listen for advertisements with console commands ble_adv_scan chan [num] [addr0] for example: ble_scan 37 Example output: BLE packet @ 20000448: type 2, len 33, 5c.f3.70.6b.65.d2 AdvA 20000454: 02 01 08 17 09 43 68 72 2000045c: 6f 6d 65 62 6f 78 20 66 20000464: 6f 72 20 4d 65 65 74 69 2000046c: 6e 46 16 02 01 08 = 2 bytes, Flags, LE and BR capable 17 09 43... = 23 bytes, Name, "Chromebox for Meetings" Change-Id: I2bd3f1d87acb069da0b56c1d7878e7d4fd6a06f3 Signed-off-by: Myles Watson <mylesgw@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/361960 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Levi Oliver <levio@google.com>
* nrf51: Add generic radio supportMyles Watson2016-08-024-4/+99
| | | | | | | | | | | | | | | | Add functions to initialize and disable the radio. Add packet definitions. Update the spelling of the FICR_OVERRIDEEN register. BUG=None BRANCH=None TEST=make buildall -j Change-Id: I3a9e500d0f177b6ce77a3b6ed6a42acd4f49eb7e Signed-off-by: Myles Watson <mylesgw@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/362175 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Levi Oliver <levio@google.com>
* nrf51: Make timer handling names more obviousMyles Watson2016-07-222-73/+73
| | | | | | | | | | | | | | | | | | | There are three timers, each with four capture/compare (CC) registers. The timer code uses 3 CC registers from one timer. Use macros for the defines, so that it is more obvious which timer and which register are being used. TEST=make BOARD=hadoken BRANCH=NONE BUG=None Change-Id: Icb058d9717800a87b394270eef38a3a744a13b7d Signed-off-by: Myles Watson <mylesgw@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/361793 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Levi Oliver <levio@google.com>
* nrf51: update I2C to use PPI code.Myles Watson2016-07-201-11/+21
| | | | | | | | | | | | | BUG=None BRANCH=None TEST=Test I2C communication Change-Id: Ia2f81fb323700a227b2ea92e8fb23fa0441cd333 Signed-off-by: Myles Watson <mylesgw@google.com> Reviewed-on: https://chromium-review.googlesource.com/361406 Commit-Ready: Myles Watson <mylesgw@chromium.org> Tested-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* nrf51: Add PPI wrappersMyles Watson2016-07-204-1/+132
| | | | | | | | | | | | | | | | | | | Programmable Peripheral Interconnect is a shared resource. This CL adds code for allocating PPIs to devices. BUG=None BRANCH=None TEST=Modify the I2C code to use this PPI allocation code and test I2C communication (using experimental MXT touch controller code) Change-Id: I8ec27867d041982ef18e8515d6434c5de2c189c5 Signed-off-by: Myles Watson <mylesgw@google.com> Reviewed-on: https://chromium-review.googlesource.com/361405 Commit-Ready: Myles Watson <mylesgw@chromium.org> Tested-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Levi Oliver <levio@google.com>
* UART: Remove enable/disable interrupt functionsAnton Staaf2016-04-271-12/+2
| | | | | | | | | | | | | | | | These were not being used and complicate changes to the UART API. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I73e256f09f7ea72f0cc4831cc7ce391a7125e555 Reviewed-on: https://chromium-review.googlesource.com/340841 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Deferred: Remove hard coded number of deferredsAnton Staaf2016-04-191-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Previously the maximum number of deferred routines was specified by the the default maximum number of deferred routines you had to override this, and if you wanted fewer, you still payed the price of having the defer_until array statically allocated to be the maximum size. This change removes that define and instead creates the RAM state of the deferred routine (the time to wait until to call the deferred) when the deferred is declared. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j manually test on discovery-stm32f072 Change-Id: Id3db84ee1795226b7818c57f68c1f637567831dc Reviewed-on: https://chromium-review.googlesource.com/335597 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hibernate: Inform PD MCU before calling board hibernate callbackShawn Nematbakhsh2016-02-171-3/+3
| | | | | | | | | | | | | | | | | | board_hibernate() may take alternate actions to place the chip into hibernate, so inform the PD MCU that we're going to hibernate before calling the function. BUG=None TEST=Run 'hibernate' on chell, verify that PD MCU goes to hibernate and wakes when AC is attached. BRANCH=glados Change-Id: I71c12dcb416d54c79ac7d40e9bf430e268071fb2 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/327613 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* system: Add hibernate board-level callbackShawn Nematbakhsh2016-01-281-0/+3
| | | | | | | | | | | | | | | | | Allow boards to take action (such as entering a custom low-power hibernate-like state) before putting the chip into hibernate state. BUG=chrome-os-partner:48835 BRANCH=glados TEST=Manual with subsequent commit on chell. Verify board-level hibernate callback is called when "hibernate" is run on EC console. Change-Id: Ie1da044037a74ff8bce5c822f28ce837c62ceec0 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/324086 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cleanup: Put chip-specific configs in config_chip.hBill Richardson2015-09-211-0/+8
| | | | | | | | | | | | | | | | | | | | include/config_std_internal_flash.h is an optional header that can be used to implement the most common EC flash layout. However, CONFIG_INTERNAL_STORAGE, CONFIG_MAPPED_STORAGE, and CONFIG_MAPPED_STORAGE_BASE are fixed by the SoC, so they belong in config_chip.h, not in the optional header. BRANCH=none BUG=chrome-os-partner:23796 TEST=make buildall Refactoring only, no behavioral differences. Change-Id: I114c3e194837041920e6f228a2bed6747be8231c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301330 Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: Remove redundant FLASH_SIZE CONFIGsShawn Nematbakhsh2015-09-161-1/+1
| | | | | | | | | | | | | | | | | | | | Since there is no more concept of a flash region belonging only to the EC, we only need one FLASH_SIZE config, which represents the actual physical size of flash. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I18a34a943e02c8a029f330f213a8634a2ca418b6 Reviewed-on: https://chromium-review.googlesource.com/297824 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Rename geometry constantsShawn Nematbakhsh2015-09-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename and add geometry constants to match spec doc - https://goo.gl/fnzTvr. CONFIG_FLASH_BASE becomes CONFIG_PROGRAM_MEMORY_BASE CONFIG_FLASH_MAPPED becomes CONFIG_MAPPED_STORAGE Add CONFIG_INTERNAL_STORAGE, CONFIG_EXTERNAL_STORAGE and CONFIG_MAPPED_STORAGE_BASE where appropriate. This CL leaves chip/npcx in a broken state -- it's fixed in a follow-up CL. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Change-Id: Idb3c4ed9f7f6edd0a6d49ad11753eba713e67a80 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297484 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* I2C: Remove unused arbitration supportAnton Staaf2015-09-081-1/+0
| | | | | | | | | | | | | | | | | The i2c_claim and i2c_release routines are no longer in use, removing this code removes one odd usecase of the panic printing routines. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I76c1d90738e1e39b4b3226c31085513a20bbd769 Reviewed-on: https://chromium-review.googlesource.com/296732 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: GPIO: Use common macro for converting mask to GPIOShawn Nematbakhsh2015-07-191-3/+3
| | | | | | | | | | | | | | The same calculation is used across the code, so move it to a common macro. BUG=chrome-os-partner:42104 TEST=Verify Glados still boots AP. BRANCH=None Change-Id: I90da348f37fc670971737cfc5ddcfb9c34096c4b Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/286169 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* i2c: Make i2c_xfer a wrapper function to chip_i2c_xferShawn Nematbakhsh2015-05-271-2/+2
| | | | | | | | | | | | | | | | i2c_xfer was previously implemented at the chip-level, but now we want to add some global retry logic. Rename the chip-level i2c_xfer functions to chip_i2c_xfer and add a new global wrapper function i2c_xfer. BUG=chrome-os-partner:39613 TEST=Run "battery" from EC console on Cyan, verify that values + strings are correctly printed. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: If37c85cc3cf94fd53feb6931553e10c30ad6cad6 Reviewed-on: https://chromium-review.googlesource.com/272939 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* mec1322: Simplify GPIO listsSteven Jian2015-05-271-0/+3
| | | | | | | | | | | | | | | Our existing GPIO macros use port# / gpio#, but the concept of different GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros for chips which do not have distinct GPIO ports. BUG=None BRANCH=None TEST=make buildall -j Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b Signed-off-by: Steven Jian <steven.jian@intel.com> Reviewed-on: https://chromium-review.googlesource.com/262841 Reviewed-by: Anton Staaf <robotboy@chromium.org>
* cleanup: Use appropriate image geometry CONFIGsShawn Nematbakhsh2015-05-151-19/+2
| | | | | | | | | | | | | | | | - Use CONFIG_*_MEM when dealing with images in program memory. - Use CONFIG_*_STORAGE when dealing with images on storage. - Use CONFIG_WP when dealing with the entire WP RO region. BUG=chrome-os-partner:39741,chrome-os-partner:23796 TEST=Manual on Cyan with subsequent commit. Verify that FMAP matches actual layout of image. Verify flashrom succeeds flashing + verifying EC image using host command interface. BRANCH=None Change-Id: Iadc02daa89fe3bf07b083ed0f7be2e60702a1867 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/270269
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