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In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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The register for enabling USB register clock appears to have been
identical across F0, F3, and G4 families, but for L5 it is
different. Rather than having #ifdef in usb.c (as I recently
committed), this CL will move the clock logic into
clock_enable_module() where it arguably belonged all the time.
Additionally: Some of the chip families make use of a clock_mask in
their implementation of clock_enable_module(), but since the module_id
enum has more than 32 value, until now, some values (among those
MODULE_USB) would result in overflow, causing new_mask to be identical
to clock_mask, and the USB case could have never been reached.
BUG=b:192262089
TEST=Compile servo_v4 without linker errors
BRANCH=none
Signed-off-by: Jes Bodi Klinke <jbk@chromium.org>
Change-Id: I7c29339f45eb513e3e78f662797a70543912c8c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3130733
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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This CL enables USB-EP for the STM32G4 family. It also fixes backup
domain register access issues which are required for fw updates via
USB.
BUG=b:148493929
BRANCH=None
TEST=Verified on quiche that STM32G4 enumerates as an USB endpoint and
can be used successfully with fwupd.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I75e6b6e70e9ca2589ace76f0aa0facadd9e94142
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2268139
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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Google is working to change its source code to use more inclusive
language. To that end, replace the term "sanity" with inclusive
alternatives.
BUG=b:163885307
BRANCH=None
TEST=make -j buildall
TEST=grep -ir sanity
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I487a50999d506a0337f1d3fbe173f193e5e4098a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2353516
Reviewed-by: Sam Hurst <shurst@google.com>
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The clock frequency macro added in previous CL was missing the
'0'. This CL fixes that error and makes a minor change to how the
flash wait state value is configured. Previously, setting of the wait
state field was disabling instruction/data cache until it was restored
in the next instruction. This results in swd debugger not remaining
attached.
BUG=b:148493929
BRANCH=None
TEST=verified console is working and debugger remains attached after
setting wait state to the correct value.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I65e3a22e36de0bbf14926e5687a995b7e5717e7f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2340695
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Google is working to change its source code to use more inclusive
language. To that end, replace the term "dummy" with inclusive
alternatives.
BUG=b:162781382
BRANCH=None
TEST=make -j buildall
`grep -ir dummy *`
The only results are in "private/nordic_keyboard/sdk8.0.0"
which is not our code.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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This CL adds support to configure rcc module for stm32g4. The driver
from the F4 family was used as a reference. Support for RTC was not
ported as it's not being used for honeybuns.
The function wait_for_ready() was moved to the common clock file for
the F-family so it would not need to be replicated for G4 as well.
BUG=148493929
BRANCH=None
TEST=verfied that the GPIO, clocks, and EC console over LPUART
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I980c8889965a2e5da401ccd6291079a0bdfa8e4f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195545
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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