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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-051-410/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* chip/stm32: Add initial support for STM32L5xx seriesJes B. Klinke2021-08-251-1/+1
| | | | | | | | | | | | | | | | Introduce L5xx mostly as copy of L4xx, though registers-stm32l5.c is extensively modified. BUG=b:192262089 TEST=Compile and upload board/hyperdebug to Nucleo board BRANCH=none Signed-off-by: Jes B. Klinke <jbk@opentitan.org> Change-Id: Iccc7b05e4f2dfa732559b8099cf856882401e31c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3086362 Tested-by: Jes Klinke <jbk@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Jes Klinke <jbk@chromium.org>
* stm32: add stm32l431 ec in chip/stm32 : dmaBossen WU2021-07-011-6/+29
| | | | | | | | | | | | | | stm32l431 related driver: dma The stm32l476g-eval is the only board which would be impacted. BRANCH=main BUG=b:188117811 TEST=make buildall Signed-off-by: Bossen WU <bossen.wu@stmicro.corp-partner.google.com> Change-Id: Ia513875963c2c65f6b63605fc113f139656a4028 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2975520 Reviewed-by: Eric Yilun Lin <yllin@google.com>
* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | There is an option in the task_set_event function which force the calling task to wait for an event. However, the option is never used thus remove it. This also will help in the Zephyr migration process. BUG=b:172360521 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* stm32g4: Modify channel select to use DMAMUX for stm32g4Scott Collyer2020-07-311-2/+15
| | | | | | | | | | | | | | | | | | The STM32G4 family chips have similar DMA engine as some other STM32 families and therefore most of DMA code can simply be used as is. However, the STM32G4 does have a DMAMUX and so the correct peripheral request must be set. BUG=b:148493929 BRANCH=None TEST=verfied that the GPIO, clocks, and EC console over LPUART Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I2694881f97558ea7b904a9b83ee20d9ec813c273 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195549 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* chip/stm32/dma.c: don't overrun array sizePatrick Georgi2019-09-101-1/+2
| | | | | | | | | | | | | | | | | On smaller models there may not be 7 channels. Found by Coverity Scan #157523 BUG=none BRANCH=none TEST=none Change-Id: I8b494c6714dfd355875c5b6069b65519e91efcc9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1793584 Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* dma: separate out DMA enable status from wait_for_bytesTom Hughes2019-08-131-2/+5
| | | | | | | | | | | | | | | | | | | | | | | When wait_for_bytes returns 0 when DMA is disabled, we can't differentiate between DMA being disabled and a transfer having completed when it has reached the end of the requested transfer. Separating out into separate functions lets us distinguish the two cases. The reason we didn't hit this in the past is that the requested receive size is generally larger than the actual amount we're sending. Since we know the amount that we're waiting for from the header, we would stop the transfer in software. BRANCH=none BUG=b:132444384 TEST=On DUTs with bloonchipper and dartmonkey: ectool --name=cros_fp testmaxtransfer TEST=make buildall -j Change-Id: I885161a3e04b7a12d597d8dc8691f599990bda8b Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1734010 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* cleanup: Fix common spelling typos in commentsTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | Used 'git grep' to fix the following misspelled words across the codebase: * recieved * recieving * delaraction * finctionality * lastest * permanenlty * Callabck BRANCH=none BUG=none TEST=make buildall -j Change-Id: I68ec9c8b967941041e46ff3ed3549ab2a06604ac Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636848 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-1/+1
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* stm32: make half-duplex SPI works on STM32F0Wei-Han Chen2018-01-251-8/+6
| | | | | | | | | | | | | | | | | | | | According to RM0091, steps for using DMA for SPI peripheral should be: 1. enable DMA RX / TX 2. enable SPI 3. wait for DMA to complete 4. disable DMA RX / TX 5. disable SPI BUG=b:70482333 TEST=tested on reworked staff (half-duplex) TEST=tested elm (full-duplex) Change-Id: I095409195cd1e0379995f0bfa6605c2e1a0dfd3c Reviewed-on: https://chromium-review.googlesource.com/853715 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* stm32: remove stm32f4 dead code in DMAVincent Palatin2017-08-181-33/+1
| | | | | | | | | | | | | | | | | | The STM32F4 family is building a special variant of the dma code (dma-stm32f4.c), all the conditionals for F4 in stm32/dma.c are just dead code. remove them. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall Change-Id: Icbf8d08c7e50fe5153a1b3830011bb12afcabaa5 Reviewed-on: https://chromium-review.googlesource.com/621391 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* stm32f446e-eval: add support for stm32f446Nick Sanders2016-08-171-1/+33
| | | | | | | | | | | | | | | | | | This adds basic support for the stm32f446. This consists of: * New DMA model for stm32f4 * New clock domain support. * MCO oscillator gpio export support. * Flash support for irregular blocks. BUG=chromium:608039 TEST=boots w/ correct clock, stm32f0 also boots. BRANCH=None Change-Id: I1c5cf6ddca09009c9dac60da8a3d0c5ceedfcf4d Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/363992 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* STM32: Support LPUART consoleDaisuke Nojiri2016-04-251-1/+1
| | | | | | | | | | | | | | | This patch adds support for console on LPUART (low power UART). It is wired to the USB type B port on the board, which is also one of the power sources. So, using LPUART simplifies the set up. BUG=none BRANCH=tot TEST=Verified console works on stm32l476g-eval. make buildall Change-Id: Iccf697cfabdcb7e1362d8453708eb79610d2e0cb Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/340101 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Bring up STM32L476G-EvalDaisuke Nojiri2016-04-251-0/+4
| | | | | | | | | | | | | This patch adds initial set of files to bring up STM32L476G-Eval board. BUG=none BRANCH=tot TEST=Tested console. make buildall && make tests Change-Id: I0c0f73f31e84099746fced4214c5ed7f45468cef Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/340100 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* STM32: Add dma_select_channelDaisuke Nojiri2016-04-251-0/+16
| | | | | | | | | | | | | | | dma_select_channel selects which stream (peripheral) to be used on a specific channel. Some STM32 chips simply logically OR requests, thus do not require this selection. BUG=none BRANCH=tot TEST=make buildall && make tests. Verified on stm32l476g-eval. Change-Id: I7b64b78bdec80658992f58cb4c94ade972a1081c Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/340107 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* stm32: Define second DMA controller present on STM32F3Gwendal Grignou2015-07-271-9/+20
| | | | | | | | | | | | | Define second DMA controller, to be used by SPI3 on STM32F373. BRANCH=smaug TEST=Check with dmahelp the DMA engine is activated. BUG=chrome-os-partner:42304 Change-Id: Id2490ab91092b1ed738f5318bdeebfbe93f09171 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288511 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* common: Change interface to dma_testGwendal Grignou2015-07-271-2/+1
| | | | | | | | | | | | | | Allow to test any DMA channel. BRANCH=smaug TEST=Use dmahelp on Ryu BUG=chrome-os-partner:42304 Change-Id: I68606cdd34aa03bbeed9b5a4ababcad780384cc0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/288510 Reviewed-by: Sheng-liang Song <ssl@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32: Add delay after enabling peripheral clockVic Yang2015-02-101-0/+3
| | | | | | | | | | | | | | | | | We need a dummy read after enabling AHB peripheral clock before we can access the peripheral. For APB, we also need a dummy read for STM32F3. BRANCH=All affected BUG=chrome-os-partner:33007 TEST=make buildall Change-Id: I47f4a024dca294f555428c3f2053c1d32835ebe0 Signed-off-by: Vic Yang <victoryang@google.com> Reviewed-on: https://chromium-review.googlesource.com/246181 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org>
* samus: pd: fix potential junk at end of tx transmissionstabilize-6670.BAlec Berg2015-01-091-24/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix potential junk at end of PD TX transmit by adding to the DMA transmit complete interrupt a blocking wait for SPI to finish and then immediately disable SPI clock. This means we block in an interrupt function for approximately 45us at the end of every transmit. But, this is the highest priority thing going on anyway. Note, there is still a potential for junk if both ports are transmitting at the same time and finish very close to the same time. BUG=chrome-os-partner:34600 BRANCH=samus TEST=load onto samus and test communications with zinger. tested specifically with an old zinger CL, https://chromium-review.googlesource.com/#/c/226118/11, which watchdogs when samus has junk at end of transmit. Tested without this CL and verified we could never successfully flash zinger over PD due to this watchdog and verified on scope presence of junk. Then tested with this change and was able to successfully flash zinger using ectool on both ports in both polarities. Change-Id: If0cd9ab0551d36a7d7dc10232b6476dd56735972 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/239244 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* disable DMA before sysjumpingVincent Palatin2015-01-081-0/+10
| | | | | | | | | | | | | | | | | | | | | It's not safe to sysjump with a DMA enabled as it can led to memory corruption after we have landed in the new image before that piece of hardware is re-configured. Implement and call dma_disable_all() on all platforms with generic DMA. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=all BUG=chrome-os-partner:34865 TEST=on various boards, call "sysjump rw". Change-Id: I2a6b63ff19c2d932a5e31bc375bf468bc8ae5125 Reviewed-on: https://chromium-review.googlesource.com/237340 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* stm32f: Add DMA interrupt handlers for channel 1 to 3Vic Yang2014-10-211-30/+17
| | | | | | | | | | | | | | | | | | We already have interrupt handlers for channel 4 to 7. We need channel 3 for the new Ryu boards. Add the handlers for channel 1 to 3. Also, instead of copy-pasting interrupt handlers, define a macro and declare interrupt handlers with it. BRANCH=None BUG=chrome-os-partner:32660 TEST=make buildall TEST=Check PD communication on the new Ryu board (with other CLs to enable the new boards.) Change-Id: I51d6bd16739f31a7efbeb4ec19bb91a1546fe21d Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/224175 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Allow to disable default DMA interrupt handlersVincent Palatin2014-09-251-0/+2
| | | | | | | | | | | | | | | | | The default DMA interrupt handlers are somewhat slow and not really flexible, allow to override them in board if needed. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=none Change-Id: I909bfab265ccaa4f3b61d0a2a69bf7dfc0414be2 Reviewed-on: https://chromium-review.googlesource.com/215671 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* pd: clean up beg/end transitions of PD commsAlec Berg2014-07-031-2/+51
| | | | | | | | | | | | | | | | | | Fix the beginning and end of BMC PD communication: - Initial transmission within 1us of taking control of CC line - CC line released between 1us and 23us after last edge - If final bit is a 0, then add two 1 bits to the end - No garbage after the final bit BUG=chrome-os-partner:30132 BRANCH=none TEST=tested with a fruitpie, samus, and zinger. verified timing on scope. Change-Id: Ie45695eb367a7554cf5d5b76b6fbdf1e3fc85d29 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206453 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cprints: Revert some changes from CPRINTF to CPRINTSAnton Staaf2014-07-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | These changes were made in files that did not have the [%T ... ] pattern. These files were broken by the change because they still contained uses of the CPRINTF macro. There were two options to fix this, switch to the CPRINTS macro and get the timestamp added to these strings, or switch those files back to defining the CPRINTF macro. Switching back seems like the right thing since it doesn't change the output of those debug messages. This commit also adds newline termination to a few invocations of CPRINTF that were missing it, but obviously wanted it. This breakage is only visible with a particular set of CONFIG_ defines that no boards currently use. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Change-Id: I784b52dc385b29f05d7b9bc1521e37597409153b Reviewed-on: https://chromium-review.googlesource.com/206281 Reviewed-by: Vic Yang <victoryang@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* Add cprints() and ccprints()Vic Yang2014-05-211-1/+1
| | | | | | | | | | | | | | | | | | | | | Our code base contains a lot of debug messages in this pattern: CPRINTF("[%T xxx]\n") or ccprintf("[%T xxx]\n") The strings are taking up spaces in the EC binaries, so let's refactor this by adding cprints() and ccprints(). cprints() is just like cprintf(), except that it adds the brackets and the timestamp. ccprints() is equivalent to cprints(CC_CONSOLE, ...) This saves us hundreds of bytes in EC binaries. BUG=chromium:374575 TEST=Build and check flash size BRANCH=None Change-Id: Ifafe8dc1b80e698b28ed42b70518c7917b49ee51 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/200490 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32: flush write buffer before start DMA transfer.Louis Yung-Chieh Lo2014-03-111-0/+3
| | | | | | | | | | | BUG=chrome-os-partner:22849 TEST=Tested on peach-pit FAFT. No "checksum invalid" from cpu_uart.txt BRANCH=pit,nyan Change-Id: I64f4b636943158fab48892020980f784ca551e4f Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/178087 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32: add support for STM32F0xx familyVincent Palatin2014-03-111-0/+2
| | | | | | | | | | | | | | | | | | Add support for the STM32F0xx family of devices using a Cortex-M0 core and slightly newer peripherals than F1xx family. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=run EC console on STM32F072B Discovery board. and pass all available unit-tests on target. Change-Id: Idaa3fcbf1c0da8a8f448c0e88e58bfd976b0a735 Reviewed-on: https://chromium-review.googlesource.com/188983 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* force the compiler to use a valid register allocation for irq handlersVincent Palatin2014-03-111-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we are calling the re-scheduling routine at the end of an irq handling routine, we need to ensure that the high registers are not currently saved on the system stack. On Cortex-M3/M4, the compiler is normally doing tail-call optimization there and behaving properly, but this fixes the fact that insanely large interrupt handling routines where sometimes not compile and not running properly (aka issue 24515). This also prepares for one more core-specific DECLARE_IRQ routine on Cortex-M0. Note: now on, the IRQ handling routines should no longer be "static". Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:24515 TEST=make -j buildall revert the workaround for 24515, see the issue happening only without this CL. Change-Id: Ic419369231925568df05815fd079ed191a5446db Reviewed-on: https://chromium-review.googlesource.com/189153 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Initalize DMA before UARTRandall Spangler2013-09-101-2/+1
| | | | | | | | | | | | | | This is in preparation for enabling DMA-based UART transfers, to improve UART performance on STM32. BUG=chrome-os-partner:20485 BRANCH=none TEST=Boot pit. Host commands should still be received; this verifies DMA is still operational. Change-Id: Ibc3b2e2cd187547eb61b85e4a086704accd7f2fb Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/168810
* stm32: Clean up DMA register usageRandall Spangler2013-06-271-87/+61
| | | | | | | | | | | | Bitfields are now in registers.h where they belong. BUG=chrome-os-partner:20529 BRANCH=none TEST='crosec test' from u-boot still works Change-Id: I726550a32b61111c906c1b10c628c5e47eff74fb Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/60179
* Clean up DMA module and interface.Randall Spangler2013-06-261-126/+113
| | | | | | | | | | | | | | | | | | | | | | | Explicitly use enum for dma_channel, instead of ints (since channel is 1-based in the docs and 0-based in the enum). Add enum values for other channels like USART. Use volatile structs instead of typecasting through REG32(). Other assorted code cleanup. Remove DMA2 partial support, since neither STM32F100R8 nor STM32L151x has hardware support for it and it cluttered the code. No functional changes. BUG=chrome-os-partner:20485 BRANCH=none TEST=from pit root shell, 'ectool version' still works Change-Id: Ifdd62fb287c608a684ba8fa16934dfcab83ee609 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/59949
* Trigger dma_init() via HOOK_INITRandall Spangler2013-04-031-3/+5
| | | | | | | | | | | | | | There's no need for it to be initalized in board_init(); it just needs to be done before ADC / I2C / SPI initialize. BUG=chrome-os-partner:18343 BRANCH=none TEST=boot spring; verify EC communication and 'adc' console command still work Change-Id: I6039848fe031222d5ca59b459adfe18fc3e8ef08 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/47182 Reviewed-by: Vic Yang <victoryang@chromium.org>
* stm32: support DMA on I2C1Vincent Palatin2012-10-111-6/+22
| | | | | | | | | | | | | | | | | | | | | Each I2C controller needs to use a fixed pair of DMA channels. The former code was hardcoded for I2C2. We now use the board configuration to decide between I2C1 and I2C2 DMA channels. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:15185 TEST=make BOARD=snow && make BOARD=spring && make BOARD=daisy run on Spring and Snow and see we can communicate both with the PMU (using "pmu" EC console command) and the AP (answering U-Boot host command) Change-Id: Ifd6806205b443c623e3db09fb1a2d5804bb94214 Reviewed-on: https://gerrit.chromium.org/gerrit/35355 Reviewed-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* stm32: Export DMA memory size optionVic Yang2012-09-261-9/+10
| | | | | | | | | | | | | | We need different memory size configuration in different application. Let's export the memory size option to DMA function parameters. BUG=chrome-os-partner:14316 TEST=Boot on snow. Check I2C host command works. BRANCH=none Change-Id: I30481ddf86a1526d517961e009898642ecdd649a Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/33981 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Replacing usleep with interrupt friendly udelayCharlie Mooney2012-08-171-1/+1
| | | | | | | | | | | | | | | | | | | | There was a usleep put into a function that can be called from in an interrupt context, which doesn't work. This just switches it over to udelay which will work in an interrupt. Also flips the condition on the i2c if/else that might send it there. It was backwards before BUG=chrome-os-partner:12688 TEST=Run "battery" "pmu" boot the machine and use the keyboard. Then replace the in_interrupt_context() function with "1" to force it to use polling and repeat the test. Everything should work in both cases. BOARD=snow Change-Id: Ib2a8c7f9e5e2eb3f6b00678d6307afc9dd5f0518 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30575 Reviewed-by: Simon Glass <sjg@chromium.org>
* Snow: Possible problems with i2c error handlingCharlie Mooney2012-08-161-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Fixing a couple problems in the error handling for i2c interrupts. The code could fail and not notice if master_start() returned an error code with the TASK_EVEN_WAKE bit set. Now it stores the return values separately to prevent this. Also, the task id's that the ISR's use to wake up the i2c task after the transfer is complete were uninitialized. They should always be initialized by a call to dma_enable_tc_interrupt() but just in case, now they all get a default value in dma_init() which is called on startup in board.c BUG=chrome-os-partner:12405 TEST=confirm that i2c is still working in both slave and master mode by using the battery and pmu commands from the EC console, then booting up the machine and using the keyboard. Confirm there are no error messages on the cpu console. Change-Id: I49c3da0bf17d0853247a37131cac9719face7ed4 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30417 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Snow: Make i2c slave work in interrupt contextCharlie Mooney2012-08-151-0/+19
| | | | | | | | | | | | | | | | | | | To make software Sync work, they need to be able to call i2c_send_response() from within host_command_received() while still in an interrupt context. This won't work if you're using interrupts to know when the dma transfer has completed. This puts a switch in that will toggle between interrupts and polling the interrupt flag based on if the program in in an interrupt context or not. BUG=chrome-os-partner:12688 TEST=Run "battery" "pmu" boot the machine and use the keyboard. Then replace the in_interrupt_context() function with "0" to force it to use polling and repeat the test. Everything should work in both cases. Change-Id: Ie989c1a6ad29529a7ec390065b310ad4af8cf0bf Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30483 Reviewed-by: Simon Glass <sjg@chromium.org>
* Snow: Switching i2c from polling to InterruptsCharlie Mooney2012-08-141-17/+50
| | | | | | | | | | | | | | | | | | | | | | | | | To reduce the amount of time spent polling to see if the i2c bus has completed its transfer, I'm converting it over to interrupts. Before starting a dma transfer, the i2c code now enables dma interrupts with an ISR that will just wake up the i2c task when the transfer is complete. This leaves the cpu free while the dma is handling all the i2c work. The slave-receiver didn't require any updates as it is already interrupt driven, via the i2c events. The other three cases: master-receiver, master-transmitter, and slave-transmitter, have all been converted over to use the dma interrupts. With these changes, the cpu should spend very little time waiting for i2c transfers to complete. BUG=chrome-os-partner:12405 TEST=To test the master modes, from the EC console run "battery" and "pmu." If those work, then master mode is functioning. For slave modes, power on the machine and monitor the cpu console for errors. When it's on, try typing and confirm there are no errors there either. Change-Id: I1ca020911b7be6762389ca2b858b2b973f8754bc Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/30229 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Lucas: Switching the i2c transmit code over to dmaCharlie Mooney2012-08-131-1/+44
| | | | | | | | | | | | | | | | | | | | | There was an errata issues for the i2c on STMF100xx. It specified that not all guarantees apply to i2c on these chips if you are not using DMA to load the data. To prevent problems, I am converting the i2c code on the EC for Lucas over to DMA. Here the i2c's master functionality is retrofitted to use DMA instead of polling to fill the i2c buffer. The slave functionality is still left in the old style for the time being, but will also be converted soon. BUG=chrome-os-partner:10901 TEST=From EC console, make sure that "battery" and "pmu" commands work. They both use i2c, so if i2c had been broken they would fail. Change-Id: I2fb80dcb68632938df1c9165ebd5a67cb5194451 Signed-off-by: Charlie Mooney <charliemooney@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/29811 Reviewed-by: Simon Glass <sjg@chromium.org>
* dma: Add dma_dump() and rename debug config to CONFIG_DMA_HELPSimon Glass2012-07-021-3/+22
| | | | | | | | | | | | Add a new function to dump the current dma state, and hide it behind a more official-sounding CONFIG_DMA_HELP. BUG=chrome-os-partner:10533 TEST=build and boot on snow Change-Id: I42fb101628e9044284a6b39447b0b1fc2d36587b Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26168
* dma: Add dma_bytes_done() to return bytes completed in a dma channelSimon Glass2012-07-021-0/+7
| | | | | | | | | | | | | | By subtracting the current dma count from the number of bytes originally requested to be transferred, we can find out how many bytes have been transferred so far. BUG=chrome-os-partner:10533 TEST=build and boot on snow Change-Id: Ideee1ed27c08b56882f5d2095341fe04bbe9c34b Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26167 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* dma: Deprecate dma_start_tx() in favor of dma_prepare_tx()Simon Glass2012-06-291-7/+7
| | | | | | | | | | | | This allows us to prepare a dma transaction in advance, and quickly start it when needed. BUG=chrome-os-partner:10533 TEST=build and boot on snow Change-Id: Ib7d843b2d3a5cd94b6025b9741db1794ebbcfda0 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26449
* Revert "dma: Deprecate dma_start_tx() in favor of dma_prepare_tx()"davidjames2012-06-281-7/+7
| | | | | | | | | | | | | | | This reverts commit 7af4172be4afad9d576549721a82b3a47d701647 / Iac605b879b3556f33af5585b298ada6bc4f52c90. This change bypassed the commit queue and broke daisy as a result. BUG=chrome-os-partner:10533 TEST=build and boot on snow Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I7a05ab42f71a901d167bde977f8a025c7ef62dfc Reviewed-on: https://gerrit.chromium.org/gerrit/26379 Reviewed-by: David James <davidjames@chromium.org> Tested-by: David James <davidjames@chromium.org>
* dma: Deprecate dma_start_tx() in favor of dma_prepare_tx()Simon Glass2012-06-281-7/+7
| | | | | | | | | | | | | | | | This allows us to prepare a dma transaction in advance, and quickly start it when needed. BUG=chrome-os-partner:10533 TEST=build and boot on snow Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Iac605b879b3556f33af5585b298ada6bc4f52c90 Reviewed-on: https://gerrit.chromium.org/gerrit/26166 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org>
* dma: Adjust prepare_channel() to use a channel pointerSimon Glass2012-06-281-15/+16
| | | | | | | | | | | | | Rather than a channel number, use a pointer. Also we don't need a return value, since this function cannot fail. BUG=chrome-os-partner:10533 TEST=build and boot on snow Change-Id: I9d7e567a9f3d496184fd28f0820ad798b1c43a28 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26165 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* dma: Export dma_get_channel()Simon Glass2012-06-281-11/+5
| | | | | | | | | | | | | | | | | | Access to dma is currently via a channel number. It is more efficient to export a pointer to the dma channel since it avoids the conversion on every API call. This helps, because dma is often on the critical path. Export the function to provide a pointer to a dma channel given its number. BUG=chrome-os-parter:10533 TEST=manual: build for all boards Change-Id: I0318e59dbb1b9077f0445804692ca7ea99cf6581 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/26164 Reviewed-by: David Hendricks <dhendrix@chromium.org>
* introducing chip variant for stm32 family [3/3]Vincent Palatin2012-05-011-1/+1
| | | | | | | | | | | | | Add STM32F support. Based on David's changelist. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:9057 TEST=make BOARD=daisy ; make BOARD=adv ; make BOARD=discovery Change-Id: Ide817d11480f0b56f67deaae3c08bc631f605075
* introducing chip variant for stm32 family [1/3]Vincent Palatin2012-05-011-0/+170
just rename STM32L to STM32. Most of the STM32L15x code is common with STM32F1xx. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:9057 TEST=make BOARD=daisy ; make BOARD=adv ; make BOARD=discovery Change-Id: I819eff5fcd23deff57f5f6dedcf37e6c421b96c2
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