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* include: Move RESET_FLAG_* into ec_commands.h as EC_RESET_FLAG_*You-Cheng Syu2019-08-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | RESET_FLAGS_* are used when setting/reading the field ec_reset_flags of struct ec_response_uptime_info, which is defined in ec_commands.h. So it might be better to put those macros there. To be consistent with the other macros in the file, add "EC_" prefixes to them. BUG=b:109900671,b:118654976 BRANCH=none TEST=make buildall -j Cq-Depend: chrome-internal:1054910, chrome-internal:1054911, chrome-internal:1045539 Change-Id: If72ec25f1b34d8d46b74479fb4cd09252102aafa Signed-off-by: You-Cheng Syu <youcheng@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1520574 Tested-by: Yu-Ping Wu <yupingso@chromium.org> Commit-Ready: Yu-Ping Wu <yupingso@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-2/+2
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* flash: Pass more precise parameter to flash_[physical_]protect_at_bootNicolas Boichat2017-02-121-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for adding the rollback protection block, pass EC_FLASH_PROTECT_RO/ALL_AT_BOOT to flash_[physical_]protect_at_boot, instead of an enumeration no protection/RO/ALL. This will later allow us to protect/unprotect the rollback region only, by adding a EC_FLASH_PROTECT_ROLLBACK_AT_BOOT flag. BRANCH=none BUG=chrome-os-partner:61671 TEST=Build hammer with CONFIG_CMD_FLASH command, so that write protection can be checked with flasherase/flashwrite. TEST=On hammer (stm32f072): flashinfo => RO+RW not protected flashwp true; reboot => only RO protected flashwp rw; reboot => RO+RW protected flashwp norw; reboot => only RO protected TEST=On reef (npcx): deassert WP, flashwp false; flashinfo => RO+RW not protected flashwp true => only RO protected reboot => only RO protected flashwp rw => RO+RW protected reboot => only RO protected Change-Id: Iec96a7377baabc9100fc59de0a31505095a3499f Reviewed-on: https://chromium-review.googlesource.com/430518 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Rename geometry constantsShawn Nematbakhsh2015-09-161-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename and add geometry constants to match spec doc - https://goo.gl/fnzTvr. CONFIG_FLASH_BASE becomes CONFIG_PROGRAM_MEMORY_BASE CONFIG_FLASH_MAPPED becomes CONFIG_MAPPED_STORAGE Add CONFIG_INTERNAL_STORAGE, CONFIG_EXTERNAL_STORAGE and CONFIG_MAPPED_STORAGE_BASE where appropriate. This CL leaves chip/npcx in a broken state -- it's fixed in a follow-up CL. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Change-Id: Idb3c4ed9f7f6edd0a6d49ad11753eba713e67a80 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297484 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Use appropriate image geometry CONFIGsShawn Nematbakhsh2015-05-151-2/+1
| | | | | | | | | | | | | | | | - Use CONFIG_*_MEM when dealing with images in program memory. - Use CONFIG_*_STORAGE when dealing with images on storage. - Use CONFIG_WP when dealing with the entire WP RO region. BUG=chrome-os-partner:39741,chrome-os-partner:23796 TEST=Manual on Cyan with subsequent commit. Verify that FMAP matches actual layout of image. Verify flashrom succeeds flashing + verifying EC image using host command interface. BRANCH=None Change-Id: Iadc02daa89fe3bf07b083ed0f7be2e60702a1867 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/270269
* Fix incorrect valid and writable flash flagsVic Yang2014-10-151-0/+26
| | | | | | | | | | | | | | | | The valid and writable flags the EC sends back to the AP are incorrect. They are a little bit different on differnt chips, so let's move it to flash physical layer. This is not any causing problem, but we should fix this. BUG=chrome-os-partner:32745 TEST=make buildall BRANCH=samus Change-Id: Ibcda5ae770f5ea02cde094490997a5bc447df88f Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222661 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Write protect support for STM32F0Vic Yang2014-10-151-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On STM32F0, we cannot work around the hard fault triggered when trying to protect the whole flash. Therefore, we need to go with the ALL_AT_BOOT approach. When write protect is enabled, instead of setting ALL_NOW flag to immediately lock down the entire flash, we need to set ALL_AT_BOOT and then reboot to have the protection take effect. BUG=chrome-os-partner:32745 TEST=Along with the next CL. On Ryu: 1. Enable HW WP. Check the output of 'ectool flashprotect' and see correct flags. 2. 'flashrom -p ec --wp-range 0 0x10000'. Check RO_AT_BOOT is set. 3. Reboot EC and check RO_NOW is enabled. 4. Boot the system and check ALL_NOW is set. 5. Update BIOS and reboot. Check software sync updates EC-RW. 6. 'flashrom -p ec --wp-disable' and check it fails. 7. Disable HW WP and reboot EC. Check RO_NOW and ALL_NOW are cleared. 8. 'flashrom -p ec --wp-disable' and check RO_AT_BOOT is cleared. TEST=Enable/disable WP on Spring. Check RO_AT_BOOT/ALL_NOW can be set properly. BRANCH=samus Change-Id: I1c7c4f98f2535f1c8a1c7daaa88d47412d015977 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222622 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Factor out common flash code for STM32F and STM32F0Vic Yang2014-10-151-2/+5
| | | | | | | | | | | | | | This is a preparatory work for the following change for write protection support on STM32F0. BUG=chrome-os-partner:32745 TEST=make buildall BRANCH=samus Change-Id: Ic4deea06e26c4a6ac024a5388e1a5783b40e9876 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/222660 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Remove checkpatch warningsRandall Spangler2013-12-191-5/+4
| | | | | | | | | | | | | | | | This make minor syntactic changes and renames some camel-cased symbols to keep checkpatch from complaining. The goal is to reduce the temptation to use 'repo upload --no-verify'. This is a big furball of find/replace, but no functional changes. BUG=chromium:322144 BRANCH=none TEST=build all boards; pass unit tests Change-Id: I0269b7dd95836ef9a6e33f88c003ab0f24f842a0 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180495
* pit: If flash registers are disabled all blocks are protectedRandall Spangler2013-08-081-0/+7
| | | | | | | | | | | | | | | | | | This fixes a confusing indication in flashinfo, where the all_now flag is set but banks aren't shown as protected now. BUG=chrome-os-partner:20277 BRANCH=pit TEST=See bug for full test procedure. In short: 1) Enable physical write protect 2) flashwp enable 3) flashwp now 4) flashinfo shows all banks protected now Change-Id: I489e80f63a33c182629d3a04fd0a9dadfb3914ab Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/64980 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* stm32l: Disable interrupts while running from flashSimon Glass2013-07-171-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The curent code ends up creating a veneer for interrupt_enable/disable() which isn't really needed (see below). By calling the interrupt code while still running from flash we can avoid this. I cannot see any problem with the current implementation, but it seems that with this patch I also avoid an exception. BUG=chrome-os-partner:20976 BRANCH=none TEST=manual Build EC and see code generated like this: 200029ec <iram_flash_write>: 200029ec: b538 push {r3, r4, r5, lr} 200029ee: 460d mov r5, r1 200029f0: 4604 mov r4, r0 200029f2: f000 f83d bl 20002a70 <__interrupt_disable_veneer> ... 20002a4a: f000 b809 b.w 20002a60 <__interrupt_enable_veneer> 20002a4e: bf00 nop 20002a60 <__interrupt_enable_veneer>: 20002a60: b401 push {r0} 20002a62: 4802 ldr r0, [pc, #8] ; (20002a6c <__interrupt_enable_veneer+0xc>) 20002a64: 4684 mov ip, r0 20002a66: bc01 pop {r0} 20002a68: 4760 bx ip 20002a6a: bf00 nop 20002a6c: 080007f5 .word 0x080007f5 20002a70 <__interrupt_disable_veneer>: 20002a70: b401 push {r0} 20002a72: 4802 ldr r0, [pc, #8] ; (20002a7c <__interrupt_disable_veneer+0xc>) 20002a74: 4684 mov ip, r0 20002a76: bc01 pop {r0} 20002a78: 4760 bx ip 20002a7a: bf00 nop 20002a7c: 080007f1 .word 0x080007f1 With this patch the veneers go away. Change-Id: Idfe173b4c8d45a142914b2388bcff8ba708c657c Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/62243 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32l: Fix flash_is_erased() detectionRandall Spangler2013-07-081-5/+4
| | | | | | | | | | | | | | | | | | | | STM32L erases flash to 0, not 1, so we need a config value to indicate that. This speeds up flash erase on STM32L by not re-erasing already-erased blocks. BUG=chrome-os-partner:13066 BRANCH=none TEST=manual - hack flash_physical_erase() to print something just after flash_is_erased() check. 1. flasherase 0x1f800 0x800 2. flashwrite 0x1fa00 0x100 3. flasherase 0x1f800 0x800 -> only re-erases 0x1fa00 Change-Id: I4d726caf0605e7815b9360bb2d44bdfdd757b4a2 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/61110 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* stm32: Add CHIP_FAMILY definesRandall Spangler2013-07-011-0/+448
Previously, code which needed to work on all STM32F platforms needed to specify them by name (CHIP_VARIANT_stm32f100 || CHIP_VARIANT_stm32f10x), and we needed extra symlinks in the chip/stm32/ directory to allow the build system to find family-specific files. Add a CHIP_FAMILY level of abstraction, so that things which are common across all STM32F platforms don't need to specify every STM32F variant. Make the chip build look for family-specific filenames instead of variant-specific filenames (except for config*.h, which is actually variant specific). In the few places where things actually are variant-specific, keep using the existing CHIP_VARIANT defines. Code refactoring only; no functional changes. BUG=chrome-os-partner:20567 BRANCH=none TEST=build all platforms Change-Id: I1da831aadabf8b8dd9dfde423cac13c9f43eb953 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/60247 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
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