| Commit message (Collapse) | Author | Age | Files | Lines |
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Adds the USB SPI protocol V2, this protocol supports larger
SPI transfers that are delivered in multiple USB packets.
This enables us to perform 2 optimizations on the USB SPI
transfer speed for large USB packets:
* USB packets can be grouped together reducing the total
number of packets exchanged. The host can write multiple
data sections sequentially without the device responding
with a packet for each one. Going the other direction,
the host can continue to poll the device for data until
the transmission is complete.
* Only a single SPI transaction is required, this eliminates
overhead in setting up and getting data from SPI transactions.
Benchmark results show a typical 35% improvement in performance
on Servo Micro platforms with these changes on operations which
involve large SPI transfers reading or writing from the flash.
Signed-off-by: Brian Nemec <bnemec@chromium.org>
Blocked on upstream changes to flashrom:
Depends-On:https://review.coreboot.org/c/flashrom/+/41533
BUG=b:139058552
BRANCH=servo
TEST=Tested with Servo Micro with the reading, erase, write,
and verify operations with updated copies of flashrom.
Change-Id: I04b6cf8449e32cc1b75d3501939958887eb57f5b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2224765
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Brian Nemec <bnemec@chromium.org>
Tested-by: Brian Nemec <bnemec@chromium.org>
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Adds context states to USB SPI for handling receiving and
transmitting data. These context states allow us to keep track
of data buffers that can not fit within a single USB packet.
A context state has been added to describe the USB packets accepted
by the USB SPI protocol. This structure includes union fields for
easily addressing the different packet's fields and to describe
the basic attributes for a USB packet including its size and
how many bytes are allocated to the header.
Helper functions process the USB packets and aid in the transfer
of data between them and receive and transmission buffers.
BUG=b:139058552
BRANCH=servo
TEST=Tested with Servo Micro reading and verifying flash
writes are successful in a loop.
Signed-off-by: Brian Nemec <bnemec@chromium.org>
Change-Id: I3e0b31f33f442719123b9e897495cad25e9e6ed4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2224764
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Brian Nemec <bnemec@chromium.org>
Commit-Queue: Brian Nemec <bnemec@chromium.org>
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Minor cleanup of a commonly used magic number in the STM32
USB interface.
BUG=none
BRANCH=none
TEST=Builds
Signed-off-by: Brian Nemec <bnemec@chromium.org>
Change-Id: I2c0b7947810aae651e452db42ac27221ab19b99b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2224763
Tested-by: Brian Nemec <bnemec@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Brian Nemec <bnemec@chromium.org>
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When the HW SPI module is disabled (i.e. SPE bit is cleared), then the
stm stops actively driving the SPI CLK signal and lets it float. This
can cause spurious communication issues or guaranteed issues if there is a
pullup on the CLK signal.
Ensure that the CLK signal is being driven (low) for the duration of a
USB SPI transaction at minimum.
Driving the CLK signal low for the duration of the SPI transaction also
seems to help with sporadic reliability issues on servo_micro
Also add a flag that enables the SPI module to be enabled for the
entire time the firmware wants to enable the SPI module opposed to
needing both the firmware and the USB host to enabled the SPI module.
BRANCH=servo
BUG=b:145314772,b:144846350
TEST=with scope verify that SPI CLK line is help low as soon at the
`enable_spi 1800` command is enter on C2D2 console and continues to stay
low in between all USB SPI traffic from host.
Change-Id: I9dbd6b3ebca8db6470d9ec70bae02ac8366d6c9e
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1995604
Reviewed-by: Brian Nemec <bnemec@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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If the stm has its SPI bus disabled locally, then the
host request to enable or disable SPI would go unacknowledged
which would ultimately crash the stm32.
BRANCH=none
BUG=b:147353903
TEST=execute flash rom when C2D2 is not in SPI mode and watch
that C2D2 no longer crashes.
Change-Id: I05d6c1519b90932a9c883c013059446c2751c892
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1995602
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Brian Nemec <bnemec@chromium.org>
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Ran the following command:
git grep -l 'Copyright (c)' | \
xargs sed -i 's/Copyright (c)/Copyright/g'
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Some USB interface handlers need to know when USB has been
successfully resumed after a wake event. For example, this is
useful so that HID keyboard can send the events at the right time.
BRANCH=none
BUG=b:35775048
TEST=Using USB HID keyboard patches to queue keys in a FIFO:
After USB autosuspends, press a single key and hold it. Without
this patch the endpoint data only gets reloaded on the _next_
event.
TEST=On hammer, I2C passthrough still works.
Change-Id: I9b52b9de16767c8a66c702a5ae70369334a3d590
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/569547
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Let's split the usb headers in 3 different parts, instead of having
usb_descriptor.h pull in usb_hw.h and usb_api.h.
- usb_api.h: EC functions related to usb (e.g. connect/disconnect)
- usb_descriptor.h: common USB names and structures
- usb_hw.h: Functions required for interactive with EC's USB HW
BRANCH=none
BUG=b:35587171
TEST=make buildall -j
Change-Id: I37ead61e3be5e7ae464f1c9137cf02eaab0ff92e
Reviewed-on: https://chromium-review.googlesource.com/454861
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Previously a bogus rx_count value from the USB hardware could have
caused a buffer overflow while copying from the packet ram to the DMA
bounce buffer. I'm not sure if it is possible to cause the hardware
to generate a bogus rx_count, I doubt it, but this is now nicely
paranoid
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Test SPI bridge functionality on discover board
Change-Id: I080ba1c1f05c2b0a86a4c6eb89e8c1387827466e
Reviewed-on: https://chromium-review.googlesource.com/329849
Commit-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Nick Sanders <nsanders@google.com>
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Rename usb.h to usb_descriptor.h to prevent conflict with a
commonly-used libusb header.
BUG=chromium:552006
BRANCH=None
TEST=`make buildall -j`
Change-Id: I6145ce120e1fda41bc5c4d4da0313272e76839c7
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311429
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Allow more than one SPI master.
Add CONFIG variables to address the system SPI flash.
To have SPI master ports, spi_ports array must be defined.
BRANCH=smaug
TEST=compile
BUG=chrome-os-partner:42304
Change-Id: Id43869f648965c1582b7be1c7fb3a38f175fda95
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288512
Commit-Queue: David James <davidjames@chromium.org>
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This required changing the USB-SPI implementation slightly
so that all work is done within the deferred callback. In
particular, this allows the board specific enable and disable
functions to do things that can only be done from a task
context, like sleeping.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I3f6a01ed9d6f31a3259ba0a0f6b4e123d6d2e718
Reviewed-on: https://chromium-review.googlesource.com/260964
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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The task based approach made sense when it looked like
there would be a case closed debugging task to handle
multiple bridges (SPI/I2C/USART...). I'm not convinced
anymore that that task will be needed, so this
simplification seems good.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ic431c287c28d10252246fe9f507d9c5fcc64a077
Reviewed-on: https://chromium-review.googlesource.com/232733
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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This allows the USB SPI bridge to be controlled from the
host at a larger timescale than a single SPI transaction.
This allows the host to signal that many transactions
will take place and that the device should keep the SPI
bridge enabled across them. This allows the device to
hold the AP or other possible user of the SPI bus in
reset while the bridge is enabled.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ifd6f96b0ff47f35d853735d44e255a205b0e677a
Reviewed-on: https://chromium-review.googlesource.com/232732
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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Simple control of SPI for flashing over USB.
This driver is working, and using the discovery board
with a W25Q16 flash chip attached flashrom can read,
erase, write, and verify the whole chip in 45 seconds.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I224f1f87cd6adc8b64c17de1df98dae0a9cfa6a5
Reviewed-on: https://chromium-review.googlesource.com/218740
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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