| Commit message (Collapse) | Author | Age | Files | Lines |
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Ran the following command:
git grep -l 'Copyright (c)' | \
xargs sed -i 's/Copyright (c)/Copyright/g'
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Fix bug and actually increase watchdog timeout to 1.8s.
BUG=none
BRANCH=none
TEST=put a 3 second blocking delay in pd_task and make
sure watchdog reboots. set blocking delay to 1.5seconds
and make sure no reboot.
Change-Id: Ie66621a3bd98354f9fd22b9b10a866d004277340
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204471
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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No functional changes, just cleanup.
BUG=chrome-os-partner:20529
BRANCH=none
TEST='waitms 2000' reboots the system with a watchdog reset cause
Change-Id: I8fcee92476a287e6cb81bf9012f29c87d2aca0ba
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/60680
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Modules which care about system clock frequency now hook HOOK_FREQ_CHANGE.
- hwtimer
- i2c
- uart (which is now also smart enough to use x8 oversampling instead of
x16 when the system clock is too slow to support x16)
Added 'clock' debug command to set system clock frequency.
STM32F platforms don't change clock frequency; on those platforms,
clock_get_freq() simply returns CPU_CLOCK, so behavior of those
platforms is unchanged.
BUG=chrome-os-partner:20414
BRANCH=none
TEST=from EC console:
- reboot ap-off -> to make sure AP is off during testing
- clock msi2 -> reports 2MHz clock
- battery -> reports battery info
- clock msi1 -> reports 1MHz clock
- battery -> reports battery info
- clock hsi -> reports 16MHz clock
- battery -> reports battery info
- power on -> AP powers on and host commands succeed
Change-Id: Ib8276bf124727e4fb502297ca8b3d6d4b6170241
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/59645
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This reduces memory footprint.
BUG=chrome-os-partner:15714
BRANCH=none
TEST=system still boots; 'waitms 1500' prints watchdog error dump
Change-Id: Ieb0248a34655514b03d919cc36c2b369691da716
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/36937
Reviewed-by: Simon Glass <sjg@chromium.org>
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The WWDG is not ideal for this purpose, since if we fail to handle its
interrupt withint 60ms or so, we get a reset. This can be a problem when we
are reporting a panic, since the uart output takes a long time.
Change to using timer 9, which is free, and make it print a watchdog warning
after one second.
BUG=chrome-os-partner:10146
TEST=manual:
build and boot on snow; waitms 1200 and see that a watchdog timeout is
reported correctly.
See that the panic message is displayed in full without a reset happening
before the end.
Change-Id: Ifc3671098e1f3a7ef409b8d1fb919d22eaa90358
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/26172
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Rather than just reset with no information when we hit a watchdog, try
to anticipate the problem and display a trace message as on lm4.
This solution is not ideal since we must constantly reset the WWDG to make
it work. It may be better to look at dedicating a timer to this purpose
instead, since we are really just shadowing the IWDG and don't actually
need the reset functionality.
One problem is that we now have a fairly short time limit on many
operations, since if we can't service an interrupt within about 30ms then
the WWDG will reset the system.
It also affects JTAG since it seems that the watchdog goes off the first
time JTAG is invoked to program the flash. The solution here is to retry.
For these reasons it is implemented as an option, CONFIG_WATCHDOG_HELP.
BUG=chrome-os-partner:10145
TEST=manual:
build for all boards
On snow:
> waitms 500
See that there is no message
> waitms 1300
Time: 0x0000000000733ba3 us
Deadline: 0x00000000006b6db2 -> -0.511473 s from now
Active timers:
Task Ready Name Events Time (s)
0 R << idle >> 00000000 0.000000
1 R WATCHDOG 80000000 0.000000
2 KEYSCAN 00000000 0.000000
3 GAIAPOWER 00000000 0.000000
4 R CONSOLE 00000000 0.000000
5 HOSTCMD 00000000 0.000000
--- UART initialized after reboot ---
[Reset cause: watchdog]
[Image: RO, snow_v1.1.32-8c00326-dirty 2012-06-03 07:54:29 sjg@sglass.mtv.corp.google.com]
done
Change-Id: I042fcc9ecd9c21210ea3826ca69c943aab949d1f
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24398
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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We want this function to be available for all chips, so move it into a
generic place.
The task_disable_irq() from the LM4 version can be left in
watchdog_check(), to keep the watchdog_trace() function generic.
BUG=chrome-os-partner:10145
TEST=build for all boards
Change-Id: I98c60ce5958f1498b84a233ef04290a68a7838c5
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24397
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Some things about watchdogs are common across Cortex-M3, so create a
common watchdog file to hold these. Put the watchdog task in there as
the first customer.
BUG=chrome-os-partner:10145
TEST=build for all boards
Change-Id: Id55f71a807ee12bae3758afc213c30c731eadc07
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24395
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Use the same prototype for watchdog_init() everywhere. One version takes
a parameters and one doesn't. We don't need the parameter since we have
a #define. Tidy this up.
Also move watchdog defines into watchdog.h.
BUG=chrome-os-partner:10145
TEST=build for all boards
Change-Id: I38ae63d7cc137b93017c850e767703d5f90f56ad
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/24394
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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We no longer support ADV EVT0 board and Discovery reference design.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make BOARD=daisy && make BOARD=link
Change-Id: I7eb81e5271c070b17f018ac9c14491f1804c0e08
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just rename STM32L to STM32.
Most of the STM32L15x code is common with STM32F1xx.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9057
TEST=make BOARD=daisy ; make BOARD=adv ; make BOARD=discovery
Change-Id: I819eff5fcd23deff57f5f6dedcf37e6c421b96c2
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