summaryrefslogtreecommitdiff
path: root/chip
Commit message (Collapse)AuthorAgeFilesLines
* npcx7: fix RAM powerdown regressionCaveh Jalali2019-10-081-2/+3
| | | | | | | | | | | | | | | | chromium:1518660 introduced a subtle change in which RAM bank power-down bits are set. this change reverts to the original bit pattern and masks the reserved bits as suggested by nuvoton. BUG=b:141715856 BRANCH=none TEST=boots on atlas. Change-Id: Idfbedd73fd46aa639f12c9991911d96f15739174 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1833153 Reviewed-by: Caveh Jalali <caveh@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* npcx: espi: guard to call power_signal_interruptCHLin2019-10-081-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The source of the SLP_Sx power signals can come from only either GPIO or virtual wire. The firmware now assumes that, when the GPIO is chosen, (i.e. CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS is not enabled.) there should be no virtual wire SLP_Sx event is triggered. However if the host accidentally sends a SLP_Sx VW to EC, EC will call the power_singal_interrput(signal) by passing an invalid enum signal number. (i.e. The index is of the range of GPIO table.) It may cause the system problematic when the firmware uses the enum signal number to access the GPIO table. BUG=b:141730279 BRANCH=none TEST=No error for "make buildall" TEST=Test on trembyle, the crash symptom can be fixed. Change-Id: I0fa606f812b377d6616e314ca1f1c9675a04e2a8 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1844658 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* npcx: espi: clear pending bit while setting VW interruptCHLin2019-10-081-0/+3
| | | | | | | | | | | | | | | | | | | | | According to the datasheet, firmware should clear MIWU pending register (WKPND) after configuring WKMOD/WKEDG/WKAED register and before enabling WKEN register. Otherwise, the module might cause a false wake-up or interrupt event. BUG=b:141730279 BRANCH=none TEST=No error for "make buildall" TEST=Test on yorp, check the fake virtual wire events are no longer generated and the system crash symptom is fixed when CONFIG_BRINGUP is defined. Change-Id: I89e055b4174419658cdd823f04acff41aa14cfe6 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1844660 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org>
* Remove uses of %lEvan Green2019-10-053-4/+4
| | | | | | | | | | | | | | | | | | | | | | | This change removes uses of %l from the EC side of the EC codebase. This is done because the semantics of %l within printf have changed, and there are concerns that new calls to printf will be cherry-picked into old firmware branches without the printf changes. So, in preparation for disallowing %l in master, remove occurrences of %l. This change was done by manually fixing up anything found under the EC directory with the following regex: %[0-9*.-]*l[^l] Remember that anything on the host machine is fine as-is, since the host printf never changed. BUG=chromium:984041 TEST=make -j buildall BRANCH=None Change-Id: I2a97433ddab5bfb8a6031ca4ff1d3905289444e2 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834603 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* include: De-longify BIT() macroEvan Green2019-10-052-2/+2
| | | | | | | | | | | | | | | | | | | | | | | The BIT() macro was recently introduced to make things more comfortable to upstream Linux. However, there's no need for it to be a long. Change the macro back to being an int (int and long are the same on 32-bit platforms, which all of our ECs are), so that we can reduce the number of %l specifiers. The semantics of %l have changed, we are deprecating its use on master to reduce the risk that we accidentally cherry-pick one of those printfs to an old firmware branch. BUG=chromium:984041 TEST=make -j buildall BRANCH=None Change-Id: I95b9cd49895cc67998dcb1de9bab5b5591d93243 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834601 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* printf: Enable compile-time format checkingEvan Green2019-10-052-0/+2
| | | | | | | | | | | | | | | Add annotations to allow the compiler to check printf-style format strings in the EC. BUG=chromium:984041 TEST=make -j buildall BRANCH=None Change-Id: Ic39f37f8362372de7d289becea684d9da535599a Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1733101 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* printf: Fix formatting errorsEvan Green2019-10-058-14/+18
| | | | | | | | | | | | | | | | | | | This change fixes the printf formatting errors found by the compile-time prinf format checker. The errors fall into a few categories: 1. Incorrect size specifier (missing or extra l). 2. Missing or extra arguments. 3. Bad line splitting. BUG=chromium:984041 TEST=make -j buildall BRANCH=none Change-Id: I5618097a581210b9fcbfc81560dec050ae30b61c Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819653 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* printf: Convert %l to %llEvan Green2019-10-059-19/+19
| | | | | | | | | | | | | | | | | | | | | In order to make our printf more standard, utilize %ll for long long arguments, rather than %l. This does cost a little bit in flash space for that extra l in a couple of places, but enables us to turn on compile-time printf format checking. For this commit only, the semantics are such that both %l and %ll take 64-bit arguments. In the next commit, %l goes to its correct behavior of taking a sizeof(long) argument. BUG=chromium:984041 TEST=make -j buildall BRANCH=none Cq-Depend:chrome-internal:1863686,chrome-internal:1860161,chrome-internal:1914029 Change-Id: I18081b55a8dbf5ef8ec15fc499ca75e59d31da58 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819652 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* printf: Add support for %zEvan Green2019-10-052-3/+3
| | | | | | | | | | | | | | | | When printing size_t sized integers, utilize the standard %z modifier so that the specifier format is correct. This will enable us to turn on compile-time printf format verification. BUG=chromium:984041 TEST=make -j buildall BRANCH=none Cq-Depend:chrome-internal:1860160 Change-Id: I2c95df5c0d87677cb9fcbde33ab8846708a774a1 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819651 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* printf: Convert %h to %phEvan Green2019-10-057-15/+16
| | | | | | | | | | | | | | | | | | | | | In order to make printf more standard, use %ph. Pass a pointer to a struct describing the buffer, including its size. Add a convenience macro so that conversion between the old style and new style is purely mechanical. The old style of %h cannot be converted directly to %ph as-is because the C standard doesn't allow flags, precision, or field width on %p. Ultimately the goal is to enable compile-time printf format checking. This gets us one step closer to that. BUG=chromium:984041 TEST=make -j buildall BRANCH=None Cq-Depend:chrome-internal:1559798,chrome-internal:1560598 Change-Id: I9c0ca124a048314c9b62d64bd55b36be55034e0e Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1730605
* printf: Fix up %p to %pPEvan Green2019-10-054-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | In order to avoid landmines later with future extensions to %p, disallow %p by itself. The danger is that we'll have something like: printf("%pFOO", myptr), and then later will add a %pF extension, but miss this printf (maybe the string is split, maybe it's just missed). Missing a conversion during extension is worse than just seeing a print like <ptr_val>OO, since %pF likely reaches through the pointer and interprets its contents according to whatever F means. Convert existing uses of %p to %pP, so they're explicitly printing a pointer value, giving us flexibility to extend in the future. BUG=chromium:984041 TEST=make -j buildall BRANCH=None Cq-Depend:chrome-internal:1560879 Change-Id: I36a4bee8d41cb9a6139171f8de0d8f2f19468132 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1730604 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* host_command: Change host command return value to enum ec_statusTom Hughes2019-10-0216-34/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the host command handler callback function returns an int, it's easy to accidentally mix up the enum ec_error_list and enum ec_status types. The host commands always expect an enum ec_status type, so we change the return value to be of that explicit type. Compilation will then fail if you accidentally try to return an enum ec_error_list value. Ran the following commands and then manually fixed up a few remaining instances that were not caught: git grep --name-only 'static int .*(struct host_cmd_handler_args \*args)' |\ xargs sed -i 's#static int \(.*\)(struct host_cmd_handler_args \*args)#\ static enum ec_status \1(struct host_cmd_handler_args \*args)##' git grep --name-only 'int .*(struct host_cmd_handler_args \*args)' |\ xargs sed -i 's#int \(.*\)(struct host_cmd_handler_args \*args)#\ enum ec_status \1(struct host_cmd_handler_args \*args)##' BRANCH=none BUG=chromium:1004831 TEST=make buildall -j Cq-Depend: chrome-internal:1872675 Change-Id: Id93df9387ac53d016a1594dba86c6642babbfd1e Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816865 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Unify #! use in python scriptsStefan Reinauer2019-10-012-2/+2
| | | | | | | | | | | | | | | | | | Right now we have several different versions of #! in our python scripts. Unify them all and specify that we are using python2. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> BUG=none BRANCH=none TEST=make buildall Change-Id: Iab33a3f5d4b827451a55542bcee8837b00da7867 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1817948 Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* chip/npcx: fix cprints argumentsCaveh Jalali2019-10-011-2/+2
| | | | | | | | | | | | | | | this fixes the format string used in cprints. the intent was clearly string concatenation, but instead 2 strings were passed to cprints. BUG=none BRANCH=none TEST=buildall passes, boots on atlas Change-Id: I8942c4f5fd99b490a3da8a6a289d23454509e69d Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1826177 Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cleanup: fix byte access and ifdefs for BBRAM_PD2Jett Rink2019-09-305-14/+10
| | | | | | | | | | | | | | Ensure that PD2 is accessed as a single byte instead of 4 bytes and remove unnecessary ifdef guards in all chip implementations. BRANCH=none BUG=none TEST=builds Change-Id: I319d8d6a8456662235ab4d8dcda6bda7e8ed7c15 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1809938 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* g: avoid locked up flash after denied operationVadim Bendebury2019-09-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | It looks like the flash controller requires the user to explicitly clear the command field if the command fails. Not clearing the command field prevents error status from clearing on read. BRANCH=cr50, cr50-mp BUG=b:141203977 TEST=with the latest RO locking out INFO1 erases, it is possible to keep accessing flash after failing 'eraseflashinfo' invocation: > eraseflashinfo do_flash_op:274 errors 1000 fsh_pe_control 40720004 do_flash_op:265 Failed to erase info space! Unknown error Usage: eraseflashinfo > bid Board ID: 0001e240, flags 00000000 > Change-Id: I4dd14e1e5f974bb30e2ca5beb9e43e2974ace179 Signed-off-by: Marius Schilder <mschilder@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1812175 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* max32660: add I2C master and slaveJerry Bradshaw2019-09-264-67/+2934
| | | | | | | | | | | | | | BRANCH=none BUG=none TEST=slave tested with EC CMDs sent from a custom written EC HOST using another MAX32660 device as an I2C Master Change-Id: Icdd3ac4bacbc6536a4165f63d155760d4013a8cc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1716928 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Harry Cutts <hcutts@chromium.org> Tested-by: Harry Cutts <hcutts@chromium.org> Commit-Queue: Harry Cutts <hcutts@chromium.org>
* chip/mt_scp: support software gainTzung-Bi Shih2019-09-191-2/+11
| | | | | | | | | | | | | | | | | | | Multiply the audio data by a gain value. Note that it get muted when gain is 0. BRANCH=none BUG=b:122027734, b:123268236 TEST=1. define CONFIG_AUDIO_CODEC in board.h 2. define CONFIG_AUDIO_CODEC_DMIC in board.h 3. define CONFIG_AUDIO_CODEC_DMIC_SOFTWARE_GAIN in board.h 4. define CONFIG_AUDIO_CODEC_DMIC_MAX_SOFTWARE_GAIN in board.h 5. define CONFIG_AUDIO_CODEC_WOV in board.h 6. make BOARD=kukui_scp -j Change-Id: I8c308ffb6d7c8f5bd378524bdffc980d7b9948fa Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1683028 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* chip/mt_scp: support audio codec WoVTzung-Bi Shih2019-09-193-0/+141
| | | | | | | | | | | | | | | | BRANCH=none BUG=b:122027734, b:123268236 TEST=1. define CONFIG_AUDIO_CODEC in board.h 2. define CONFIG_AUDIO_CODEC_DMIC in board.h 3. define CONFIG_AUDIO_CODEC_DMIC_SOFTWARE_GAIN in board.h 4. define CONFIG_AUDIO_CODEC_DMIC_MAX_SOFTWARE_GAIN in board.h 5. define CONFIG_AUDIO_CODEC_WOV in board.h 6. make BOARD=kukui_scp -j Change-Id: I51e22947c3f535c9a504033c502ec2ff1c688e6a Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1490801 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* chip/mt_scp: support speech-microTzung-Bi Shih2019-09-191-0/+8
| | | | | | | | | | | | | | | | | | | | If CONFIG_AUDIO_CODEC_WOV is enabled and the builder can access the EC private repository, then compile with speech-micro. Otherwise, there are dummy implementations for speech-micro API. BRANCH=none BUG=b:122027734, b:123268236, b:132319180 TEST=1. define CONFIG_AUDIO_CODEC in board.h 2. define CONFIG_AUDIO_CODEC_DMIC in board.h 3. define CONFIG_AUDIO_CODEC_DMIC_SOFTWARE_GAIN in board.h 4. define CONFIG_AUDIO_CODEC_DMIC_MAX_SOFTWARE_GAIN in board.h 5. define CONFIG_AUDIO_CODEC_WOV in board.h 6. make BOARD=kukui_scp -j Change-Id: I175903867ed7e1885e9438e8ef0dee1a8b4881b6 Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1644894 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* g: re-implement usb console with usb-stream configuration.Namyoon Woo2019-09-192-1/+11
| | | | | | | | | | | | | | | | | | | | This patch introduces CONFIG_USB_CONSOLE_STREAM, which implements usb-console with usb-stream configuration, intending to remove code redundancy between the previous implementation (usb_console.c) and usb_stream.c. Flash usage decreases by 224 bytes, and RAM usage by 40 bytes. BUG=b:138447451 BRANCH=cr50 TEST=Checked cr50 USB console and cr50 UART console respectively. Key-in response and output are working well: ./util/uart_stress_tester.py /dev/ttyUSB0 -t 300 --debug Change-Id: I305038e1db83dc49bb12a8afdbfcc2a8135d50f5 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1741302 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* g: fix typoMarius Schilder2019-09-181-1/+1
| | | | | | | | | | | | | | | Signed-off-by: mschilder@google.com BRANCH=none BUG=none TEST=buildall -j Change-Id: I4a70828bc6e9af2acc91de501ffa853e23395353 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1809108 Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Marius Schilder <mschilder@chromium.org> Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Marius Schilder <mschilder@chromium.org> Auto-Submit: Marius Schilder <mschilder@chromium.org>
* Sweetberry: Fix for struct declaration in power logging.Brian J. Nemec2019-09-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | The struct declaration in Sweetberry was changed while supporting the new 7-bit address declarations without updating the interface. This reverses the change on the firmware side so the structs are correctly unpacked. This structure is only used in the usb_power file to load the value into a field used internally and during validation of correctly formated packets. BUG=b:140969461 BRANCH=None TEST=Manual testing with powerlog using: powerlog -b atlas_rev3.board -c atlas_rev3.scenario Before: No INA output is returned, command fails validation. After: INA output is returned and visible on console. Signed-off-by: Brian Nemec <bnemec@chromium.org> Change-Id: Ibddf4b8f8d48af0eea9e219ab3728a95e2cf66a8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1802578 Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org>
* audio_codec: replace legacy console channelTzung-Bi Shih2019-09-171-2/+2
| | | | | | | | | | | | | | | CC_WOV is going to be replaced by CC_AUDIO_CODEC. BRANCH=none BUG=b:122027734, b:123268236 TEST=make BOARD=npcx7_evb -j Change-Id: Ib263375c02b69a82eb97ef0a7b9ede4571104af1 Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1697886 Commit-Queue: Sean Abraham <seanabraham@chromium.org> Reviewed-by: Cheng-Yi Chiang <cychiang@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* chip/nrf51/gpio.c: Actually check the flag (instead of == 0)Patrick Georgi2019-09-121-1/+1
| | | | | | | | | | | | | | | Found by Coverity Scan #146623 BUG=none BRANCH=none TEST=none Change-Id: I04ca143f794596c7be00f69ee297b33759125ae2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1801204 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
* Revert "npcx: ensure we don't unlock watchdog too soon"Caveh Jalali2019-09-124-32/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 031c5d2d62dd891622ded885756c03021e934ef2. Reason for revert: introduced compilation errors: chip/npcx/spiflashfw/npcx_monitor.c: In function 'sspi_flash_upload': chip/npcx/spiflashfw/npcx_monitor.c:290:2: error: implicit declaration of function 'watchdog_stop_and_unlock' [-Werror=implicit-function-declaration] watchdog_stop_and_unlock(); ^~~~~~~~~~~~~~~~~~~~~~~~ Original change's description: > npcx: ensure we don't unlock watchdog too soon > > We cannot unlock the watchdog timer with 3 watch dog ticks of touching > it per the datasheet. This is actually around 100ms so we should protect > against this. > > BRANCH=none > BUG=b:140207603 > TEST=eliminates cold reset issue. > > Change-Id: Iaef59dad9f5640d64d5d430aea87bd16c2efd30d > Signed-off-by: Jett Rink <jettrink@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1790302 > Reviewed-by: Scott Collyer <scollyer@chromium.org> > Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> > Reviewed-by: ML Chao <mlchao@nuvoton.corp-partner.google.com> > Reviewed-by: Furquan Shaikh <furquan@chromium.org> > Tested-by: Furquan Shaikh <furquan@chromium.org> > Commit-Queue: Furquan Shaikh <furquan@chromium.org> Bug: b:140207603 Change-Id: I540fa53c2c568cb789400d55b807a672b182302a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1799293 Reviewed-by: Caveh Jalali <caveh@google.com> Commit-Queue: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com>
* npcx: ensure we don't unlock watchdog too soonJett Rink2019-09-124-13/+32
| | | | | | | | | | | | | | | | | | | | We cannot unlock the watchdog timer with 3 watch dog ticks of touching it per the datasheet. This is actually around 100ms so we should protect against this. BRANCH=none BUG=b:140207603 TEST=eliminates cold reset issue. Change-Id: Iaef59dad9f5640d64d5d430aea87bd16c2efd30d Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1790302 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: ML Chao <mlchao@nuvoton.corp-partner.google.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
* Fix typo on STM32 i2c driverMario Tesi2019-09-111-1/+1
| | | | | | | | | | | | | | On STM32 discovery board build fails due to a typo on chip/stm32/i2c-stm32l.c in assignement BUG=none Change-Id: I8e01006f70165b797472eb367e70aebb8dcb9502 Signed-off-by: Mario Tesi <mario.tesi@st.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1720392 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* chip/stm32/dma.c: don't overrun array sizePatrick Georgi2019-09-101-1/+2
| | | | | | | | | | | | | | | | | On smaller models there may not be 7 channels. Found by Coverity Scan #157523 BUG=none BRANCH=none TEST=none Change-Id: I8b494c6714dfd355875c5b6069b65519e91efcc9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1793584 Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* chip/stm/i2c-stm32f4: Remove constant conditionalsPatrick Georgi2019-09-101-12/+7
| | | | | | | | | | | | | | | | | | rv_start is effectively constant (and 0) after goto xfer_exit, so the conditionals aren't needed. Found by Coverity Scan #157505 BUG=none BRANCH=none TEST=none Change-Id: Id7d2445615ae0f1230a9245f0baf9b9ea1d9a80a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1793582 Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* g: allow I2CS operate without hardware resetsVadim Bendebury2019-09-051-15/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is not always possible to rely on PMU for resetting the I2CS controller. Most of the AP firmware versions deploy the 'I2C unwedge' cycle when coming out of reset, but not all of them, this is why Cr50 needs to be able to recover on its own in case there was a crash and the I2C bus was left mid transaction with the H1 holding down the SDA line. A GPIO is dedicated to monitor the I2CS_SDA line during reset. If the line is kept low, it could be a sign of a 'wedged' controller. The g I2CS FSM will reset any time the I2C 'stop' condition is detected. The create the 'stop' condition the I2C_SCL input is disconnected from the bus and connected to an internal GPIO, then I2C_SCL level is set to 'high' and register inverting the I2C_SDA value is toggled, which looks like a transition from zero to one to the controller. thus creating the 'stop' condition. BRANCH=cr50, cr50-mp BUG=b:135772657 TEST=the test was ran on a Pyro device, which uses I2C for communication with H1 and which AP firmware does not deploy the 'I2C unwedge' cycle. Test instrumentation involved setting a Chrome OS startup file such that once booted, the AP starts continuously polling TPM for value of an NVMEM index, creating I2C traffic. The host workstation sends the 'apreset cold' command to the EC within a few seconds of Chrome OS coming up. First run a special Cr50 image which is not resetting I2CS using PMU on TPM restarts, is was not trying to unwedge the stuck I2C bus. On five experiments, it takes on average 32 reboots for until I2C bus is locked up and the DUT falls into recovery. Then loaded the Cr50 image with this patch and ran the test again, it survived for 150 cycles without a problem. Change-Id: Iffec33f97557e3acfd1cd5fb76ba158f8c23b608 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1730143 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* g: fix UART TX done logicVadim Bendebury2019-09-031-15/+3
| | | | | | | | | | | | | | | | | | | TX is done when both TX_IDLE and TX_EMPTY conditions are true. Fixing the check makes unnecessary the code which waited for another character time before proceeding when flushing the UART TX FIFO. BRANCH=cr50, cr50-mp BUG=b:140305442 TEST=added code to print a really long string before reset in the 'reboot' command, observed that the entire string is reliably printed before the reset. Change-Id: I0882d96ba9ca5412deb704ccdbc43e8cebeeeab5 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1779587 Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* audio_codec: refactor I2S RXTzung-Bi Shih2019-09-031-0/+2
| | | | | | | | | | | | | | | | Refactor by the following items: - use more specific name "i2s rx" - use verbose symbol names to separate namespaces - remove unused TDM-related code BRANCH=none BUG=b:122027734, b:123268236 TEST=make BOARD=kukui_scp -j && make BOARD=npcx7_evb -j Change-Id: I8ccda5b5bbd9cf144bd68ba25249c8243b3086ac Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1564500 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* cr50: added references to FIPS / NIST standards to cryptographic functionsVadim Sukhomlinov2019-08-294-22/+109
| | | | | | | | | | | | | Clarified standards compliance status for cryptographic functions. BRANCH=cr50 BUG=b:138574542 TEST=code compiles, unit tests pass Change-Id: I75ce155b53d1ce049e5063d2aaa1464b75f7d678 Signed-off-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1769420 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* mchp/espi: fix error condition handlingPatrick Georgi2019-08-281-7/+10
| | | | | | | | | | | | | | | | | As uint tidx can't be < 0 which can lead to overflow further down. (Found by Coverity Scan) BUG=none BRANCH=none TEST=none Change-Id: I63988be98a64292362cdc017beceac296ddde0dc Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1768650 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
* mchp/i2c: Fix boundary checkPatrick Georgi2019-08-281-8/+8
| | | | | | | | | | | | | | | | | | It's an off-by-one and the same test is implemented properly in the following function, so use that. (Found by Coverity Scan) BUG=none BRANCH=none TEST=none Change-Id: Idfe3ae0f1128e430a0d52c151e264de86579c67a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1768649 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
* mtk_vcodec: Add the service for h264 decoderYunfei Dong2019-08-262-1/+8
| | | | | | | | | | | | | | | Fix the service to support h264 decoder. BRANCH=none BUG=b:123551776 TEST=build kukui_scp pass. Change-Id: Iccd6389a40239a6d6791543eeb522cc3e5fc3991 Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1644186 Commit-Queue: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Yilun Lin <yllin@chromium.org>
* include: Move RESET_FLAG_* into ec_commands.h as EC_RESET_FLAG_*You-Cheng Syu2019-08-2628-150/+157
| | | | | | | | | | | | | | | | | | | | | | | RESET_FLAGS_* are used when setting/reading the field ec_reset_flags of struct ec_response_uptime_info, which is defined in ec_commands.h. So it might be better to put those macros there. To be consistent with the other macros in the file, add "EC_" prefixes to them. BUG=b:109900671,b:118654976 BRANCH=none TEST=make buildall -j Cq-Depend: chrome-internal:1054910, chrome-internal:1054911, chrome-internal:1045539 Change-Id: If72ec25f1b34d8d46b74479fb4cd09252102aafa Signed-off-by: You-Cheng Syu <youcheng@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1520574 Tested-by: Yu-Ping Wu <yupingso@chromium.org> Commit-Ready: Yu-Ping Wu <yupingso@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Revert "it83xx/intc:message id of pd packet repeat"Yilun Lin2019-08-251-47/+1
| | | | | | | | | | | | | | | | | This reverts commit bd19b03b128db664dfb5e6582810bd177b635408. With https://crrev.com/c/1757596/ merged, one doesn't need to handle repeated MessageID in TCPC. TEST=make buildall BUG=b:134556286 BRANCH=none Change-Id: I0f97e4e574b94ecbc23e5ee97ade7cc4da7f9020 Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1763895 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* g: corrected division algorithm in DCRYPTO_bn_divVadim Sukhomlinov2019-08-231-0/+1
| | | | | | | | | | | | | | | Long division algorithm computes incorrect answer in rare cases causing valid RSA signatures to be rejected. BRANCH=cr50 BUG=b:137973895 TEST=tpm_test passes Change-Id: Ie8f39eed21443978734adbbf60b72d7701154c18 Signed-off-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1766088 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* g: add vendor cmd to get/set the endorsement seedMary Ruthven2019-08-131-1/+64
| | | | | | | | | | | | | | | | We've had some eraseflashinfo issues that cause the endorsement key seed to get lost. Add a vendor command, so we can set the endorsement key seed if it's erased. BUG=b:138943966 BRANCH=none TEST=get/set endorsement key seed. Change-Id: Iee7d78e22f44786efd86b3ec68780a53e567705d Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1740075 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* dma: separate out DMA enable status from wait_for_bytesTom Hughes2019-08-136-26/+53
| | | | | | | | | | | | | | | | | | | | | | | When wait_for_bytes returns 0 when DMA is disabled, we can't differentiate between DMA being disabled and a transfer having completed when it has reached the end of the requested transfer. Separating out into separate functions lets us distinguish the two cases. The reason we didn't hit this in the past is that the requested receive size is generally larger than the actual amount we're sending. Since we know the amount that we're waiting for from the header, we would stop the transfer in software. BRANCH=none BUG=b:132444384 TEST=On DUTs with bloonchipper and dartmonkey: ectool --name=cros_fp testmaxtransfer TEST=make buildall -j Change-Id: I885161a3e04b7a12d597d8dc8691f599990bda8b Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1734010 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* npcx: i2c: adjust i2c bus frequency when it is set to 100kHz.Mulin Chao2019-08-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When npcx i2c module's bus frequency is set to 100KHz, it operates in normal mode and its bus frequency, fSCL, follows the formula listed below: fSCL = fCLK / (4*SCLFRQ), ie. SCLFRQ = fCLK / (4*fSCL) where fCLK is the source clock frequency of i2c module and SCLFRQ defines the SCL output period in SMBCTL2/3 registers. But integer division in this formula is equal to the floor of regular division if it isn't divisible. So far, all i2c modules' source clock frequency is 15MHz and if the desired i2c bus frequency is 100KHz, the SCLFRQ will be: SCLFRQ = fCLK/(4*fSCL) = 15MHz/(4*100kHz) = floor(37.5) = 37 And the actual i2c frequency is: fSCL = fCLK/(4*SCLFRQ) = 15MHz/(4*37) = 101.35KHz That's why we observe the i2c frequency is slightly higher than 100kHz. To fix this issue, this CL replaces integer division with the ceiling value of the formula to make sure bus frequency is lower than 100KHz and meet i2c spec when it operates in normal mode. BRANCH=none BUG=b:138350407 TEST=No build errors for npcx series. Measure the actual i2c bus which is configured to 100KHz after applying this CL. The actual frequency is 98.7 KHz on npcx5/7 evbs. Change-Id: I71e2c3090bc91c7b9945c01c04c9ac5ac656c893 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1741566 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* cr50: use dedicated region for info1 accessesVadim Bendebury2019-08-105-103/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The INFO1 flash space is used for various purposes (endorsement key seed, Board ID and flags, serial number, etc.). Accessing these spaces in INFO1 is accompanied by managing the flash region registers, each time opening a window of the appropriate size, with appropriate permissions, etc, In fact none of these spaces contain a secret, to simplify things and preventing situations when concurrent accesses change the flash range window settings lets dedicate previously unused Region 7 register file to providing always open read access to INFO1. Write access will be enabled/disabled as required. In prod images write accesses will always happen from the vendor command context. In DBG images CLI commands will also have write access to INFO1. INFO1 window is accessed by other H1 based devices as well, this is why it is necessary to enable the window in the common chip code. BRANCH=cr50, cr50-mp BUG=b:138256149 TEST=the firmware_Cr50SetBoardId test now passes on Mistral. Cq-Depend: chrome-internal:1577866, chrome-internal:1581327 Change-Id: Id27348f3b04191f1b3b60fd838d06009f756baa2 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1730147 Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* g: Make DMEM word writes explicitLouis Collard2019-08-091-85/+104
| | | | | | | | | | | | | | | | | | This change refactors access to DMEM during ECC operations to make all writes explicitly word writes. This is effectively a no-op, but should prevent against any future regressions. BUG=b:131807777 TEST=build and flash on soraka locally, ensure signature of known blob matches signature generated prior to this CL BRANCH=none Signed-off-by: Louis Collard <louiscollard@chromium.org> Change-Id: Ie24712c3f4a5dc15c8ad08cd50b9e8b9cdab2822 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1595928 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* mt_scp: Do not set cache-size in SCP FW.Yilun Lin2019-08-072-6/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | cache-size and way setting should be done in kernel driver side. Logical memory address will be shifted when cache size config changes. e.g. - 8 kb I-cache + 0 kb D-cache: logical address of I-cache 0x7e000~0x7ffff - 8 kb I-cache + 8 kb D-cache: logical address of I-cache 0x7c000~0x7bfff I-cache region moves starting address from 0x7e000 to 0x7c000, and it forces all the contents which was in 0x7c000~0x7dffff step back for 8KB. i.e. The logical address are changed by 8kb. This will break the loaded SCP firmware layout. As a result, we should configure the cache size before loading firmware and never re-configure it in SCP FW. BUG=b:137920815 TEST=Reboot kukui, and see SCP can successfully boot on first time. BRANCH=None Change-Id: I58342e8276b654a786864904cde980c6fc9ef781 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1725384 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org>
* mt_scp/ipi: only invoke interrupt when ipi readyYilun Lin2019-08-071-1/+1
| | | | | | | | | | | | | | | | | IPC interrupt should only be invoked when the task inited and informing AP that SCP is ready. TEST=Boot SCP, and doesn't see the process stack overflow. BUG=b:137920815 BRANCH=none Change-Id: Ibe926b77705718a986c3b090227328b569cd9b59 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1736411 Reviewed-by: Erin Lo <erin.lo@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org>
* ectool/trng: Add "rand" host command for testing RNGTom Hughes2019-08-061-2/+34
| | | | | | | | | | | | | | | | | | | | | This host command and corresponding ectool command allows us to generate random numbers with the MCU's RNG and process the resulting output with tools to validate the statistical randomness, such as dieharder (https://webhome.phy.duke.edu/~rgb/General/dieharder.php) and NIST SP 800-22 (https://csrc.nist.gov/publications/detail/sp/800-22/rev-1a/final). BRANCH=none BUG=b:124770147 TEST=ectool --name=cros_fp rand 1 > rand.bin; ls -la rand.bin TEST=ectool --name=cros_fp rand 536 > rand.bin; ls -la rand.bin TEST=ectool --name=cros_fp rand 537 > rand.bin; ls -la rand.bin TEST=ectool --name=cros_fp rand 99999999999999999999999999 Change-Id: Ic0bda4deae79fc7465671dcacfe8bbc9a066b5e5 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1726822 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* g: refactor pinmux state printing functionVadim Bendebury2019-08-021-10/+20
| | | | | | | | | | | | | | | | | | This refactoring improves optional parameter alignment, includes virtual pads in the output and shaves 44 bytes from the image size. BRANCH=cr50, cr50-mp BUG=none TEST=saved pinmux command output in files pm.before and pm.after, then verified that the following command produced no output $ diff -w <(sort pm.before) <(sort pm.after) Change-Id: I81c2fad8c9e87e05dd39c588340a82f83e3ab488 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1731138 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* g: add flash log entry for dcrypto failuresstabilize-12386.BVadim Bendebury2019-07-311-5/+13
| | | | | | | | | | | | | | | | We want to keep an eye on the dcrypto failures (which are never supposed to happen of course). Let's add logging a flash event so that the failures are visible through UMA. BRANCH=cr50, cr50-mp BUG=b:135772657 TEST=using additional code simulated a single failure, observed new flash log entry by running 'gsctool -a -L' on the DUT. Change-Id: Ib675bb1928166cadc069bf4be3b053a9cf837077 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1723097 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
View Lorry Controller Status