| Commit message (Collapse) | Author | Age | Files | Lines |
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This will be used for sleep/wake/sysjump/etc. For now it's just wired
up to clock frequency changing.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=manual: use nopll command, should still work
Change-Id: Iedcea5830bc18eacfd955c29b8f793aba8905dd8
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Adding trickle charging mode to precharge batteries with
voltage lower than minimal design value. This CL adds
control to charger voltage to track battery input current
change.
To prevent battery from deeply discharging, this CL preserves
3% of the design capacity.
Minor bug fixes include error state check and charger control
logic.
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:8660,8661
TEST=manual
Plug AC power, the power adapter led should be
'yellow'. On the EC serial console, type 'battery'
and 'charger' commands.
Battery input current should staid close to its
desired current.
A deeply discharged battery (5.5V) should be revived to
a healthy state after 30 minutes ~ 4 hours.
Change-Id: Ibaa2396c6b751639d98db32f5919b1e8ec700e40
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Whatever means is used to talk to the AP there is no justifcation for
putting message processing directly in drivers. Create a suitable
header file to define the interface, and provide a processing function
which can provide responses to incoming messages.
BUG=chromium-os:28925
TEST=build on daisy and discovery; run on daisy
Change-Id: If09ea3e30d42d8c5f226dc4421d4895adc54f937
Signed-off-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8884
TEST=manual
optget fake_dev_switch --> 0
optset fake_dev_switch 1
optget fake_dev_switch --> 1
optset fake_dev_switch 0
optget fake_dev_switch --> 0
Reboot by holding ESC+D and tapping power
optget fake_dev_switch --> 1
Reboot by holding ESC+F and tapping power
optget fake_dev_switch --> 0
Change-Id: Iccb3bc8b3d571e551e204892769efc4161858055
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This data is used to populate the _BIF/_BIX packages in ACPI
but it currently needs an EC command to retrieve that isn't
easy to query in ACPI since it isn't using standard EC RAM.
1) Export these additional fields in init() state:
- Design Capacity of Full
- Design Voltage
- Last Full Charge Capacity
- Cycle Count
- Manufacturer String
- Model String
- Serial Number String
2) Fix an issue where battery current was not reported when
the battery was charging.
3) Remove the command interface so there is no duplication.
BUG=chrome-os-partner:7734
TEST=using (not yet published) coreboot to read battery status
via ACPI and verify that battery removal/insertion events
are properly handled.
Change-Id: If337aad3255e5b1a0f85168838f1dd86a32bbeb3
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
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This reverts commit dfe22b2b1e7bf6c810332357044cb3f462453d68.
We seem to have solved I2C block issue. Reverting the workaround LPC
command and ectool command.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8239
TEST=Compilation succeed. Manually tested temperature polling still
works.
Change-Id: I0acb567a138282479c7cc07cbfa723c439d04cd7
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This uses the last bank of flash to hold persistent settings, and
looks at the write protect GPIO to decide whether to protect the chip
at boot (chrome-os-partner:7453).
For ease of debugging, I've temporarily hacked this so flash uses the
RECOVERYn signal (dut-control goog_rec_mode:on) to enable WP instead
of the write protect signal; this works around chrome-os-partner:8580.
Also note that if you write protect any blocks even temporarily,
you'll need to do a power-on reset to clear them before you can
reprogram the flash. See chrome-os-partner:8632. At the EC console,
"hibernate 1" will do that, or you can just yank the power.
This also fixes a bug in the flash write and erase commands, where
they weren't properly detecting failure if you attempted to modify a
protected block (missed an interrupt reason...)
New "flashwp" console commands work. LPC commands need reworking.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8448
TEST=manual
Change-Id: I49c38cc25c793094ae3331a4586fda0761b4bac6
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BUG=chrome-os-partner:7839
TEST=none
Signed-off-by: Bill Richardson <wfrichar@google.com>
Only tested on BDS at the moment, because that's all I have.
Change-Id: I30c7202856a272953bf7170c6786999378984329
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More modules can be disabled individually through CONFIG_ defines.
Reordered early module pre-init and init, and added comments to
explain why things are ordered in main() the way they are.
Fixed a few assorted init-related bugs along the way, like st32m
keyboard scan double-initializing.
BUG=none
TEST=build link, bds, daisy
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I04a7fa51d743adfab4be4bdddaeef68943b96dec
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Board-specific features like lightbar should be config'd at the board
level, not at the chip level.
BUG=none
TEST=build link, bds, daisy
Change-Id: If1df2ca0422f7b8bdc172d0df7bd9f6a1af6a9d2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
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BUG=chrome-os-partner:7498
TEST=powerled {off, red, yellow, green}
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Change-Id: I48beaad94d75c0ec30a969ea4b0e35f54e052085
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Until we solve the I2C hanging issue, we need a reliable way to read
temperature. Add back LPC temperature read command that actually trigger
a I2C read.
Signed-off-by: Vic Yang <victoryang@google.com>
BUG=chrome-os-partner:8452,chrome-os-partner:8495
TEST=none
Change-Id: Icddd1fe3c1f09889bca633af19041a8aca582de9
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This CL adds LPC commands to provide the following information:
- Design Capacity (dword)
- Last Full Charge Capacity (dword)
- Design Voltage (dword)
- Design Capacity of Warning (dword)
- Design Capacity of Low (dword)
- Battery Type (ascii)
- Model Number (ascii)
- Serial Number (ascii)
- OEM (usually Vendor) (ascii)
- Battery charge cycle count (dword)
Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:8181
TEST=none
CQ-DEPEND:Iad4d63c996272568b5a661a6716790ef151b29c5
Change-Id: Iabaf7d9862e15c5b21cf5170cf43450e472b7836
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BUG=chrome-os-partner:8277
TEST=manual
On EC console:
hostevent set 0x1e
From root shell:
ectool eventget --> should return 0x1e
ectool eventclear 0x02
ectool eventget --> should return 0x1c
ectool queryec --> should return event 3
ectool queryec --> should return event 4
ectool queryec --> should return event 5
ectool queryec --> should return no event pending
ectool eventsetsmimask 0x1200
ectool eventsetscimask 0x0034
ectool eventgetsmimask --> should return 0x1200
ectool eventgetscimask --> should return 0x0034
On EC console:
hostevent --> should show raw=0 SMI mask = 0x1200 SCI mask = 0x34
Change-Id: I33042fa80c0b148cd63209a94a184af493e25ed3
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This CL adds a charge state machine for SMB compliant battery pack.
Vendor specific charge constraints can be applied through function
call, defined in battery_pack.h .
BUG=chrome-os-partner:7526
TEST=Attach EC serial console
Unplug AC adapter: state ==> "discharge"
Plug AC adapter: state ==> "charge"
Battery full: state ==> "idle"
Unplug battery: state ==> "error"
Change-Id: Iabff0988a6067d37c17c11b060bbb7e66505c118
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Add build information (date/time/builder) which can be displayed at the
EC console.
Generate a version from the board name and the branch tag.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chromium-os:27013
TEST=on BDS, run version command on the console.
inspect the built binary.
Change-Id: Idb1f68898ba6b811d02919f17ab4536ed9f8934a
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Implement LPC commands and ectool commands to
1. Set/get threshold temperature values.
2. Toggle on/off automatic fan speed control.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:8251
TEST=Manual test
Change-Id: Ia4282a6fa47a838aed26540f33c1eb7acc92ef0e
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The thermal engine monitors the temperature readings from all sensors.
For each sensor, five threshold temperatures can be set:
1. Low fan speed.
2. High fan speed.
3. SMI warning.
4. Shutdown CPU.
5. Shutdown everything we can.
Each of these thresholds can be set to either a fixed value or disabled.
Currently the real implementation of SMI warning and shutting down is
left as TODO, as indicated in the comment.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:8250
TEST=Manually change threshold value to test all actions can be triggered.
Change-Id: If168dcff78ef2d7a3203cb227e1739a08eca961e
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:8247
TEST=manual
from root shell on host:
ectool pstoreinfo --> should print PstoreSize 1024 AccessSize 4
echo testing 1 2 3 4 > /tmp/infile
ectool pstorewrite 8 /tmp/infile
ectool pstoreread 8 /tmp/outfile
diff /tmp/infile /tmp/outfile
Change-Id: I565e580307584f7def36c5e53d360c1a897d67d2
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We now read temp sensor readings using the EC mapped space.
So we don't need this command.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:8239
TEST="ectool temps 0" works.
Change-Id: I47f425e45cea992b19734f39ac6d9f6db6433d39
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A temperature polling task is added to achieve temporal correction and
also reduce the latency of reading temperature.
Factor out sensor specific part to keep code clean.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:7801
TEST=On link, 'temps' shows all temperature readings.
Cover each sensor with hand and see object temperature rise.
Compilation succeeded on bds/adv/daisy/discovery.
Change-Id: I3c44c8b2e3ab2aa9ce640d3fc25e7fba56534b86
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Add a LPC command to control USB charging mode. Also add the command to
ectool.
BUG=chrome-os-partner:7476
TEST=Manually test on link proto-0.
Change-Id: Ica87d0a690bc86e28844bd695f31641398b21939
Signed-off-by: Vic Yang <victoryang@chromium.org>
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This should be enough to switch on the board from either the power
button or the EC console.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run Daisy firmware on Discovery board with logic analyzer attached
to GPIO pins. With an added task to simulate PMIC startup and AP
startup, check the timing chart looks good.
Change-Id: I5dfeab05d0481d121ddacb36b69a542cc1bd428c
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BUG=chrome-os-partner:7839
TEST=none, work in progress
Change-Id: I20acde8db7f250227adcd4b9dc59328362e68720
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
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This change adds a common part of smart battery driver. Following
features are not implemented, or in chip specific driver:
Battery access control, authentication, factory mode
Manufacturer access/data commands
Block read/write, device name, flash data
Chip specific features, per cell info/temp/capacity
Signed-off-by: Rong Chang <rongchang@google.com>
BUG=chrome-os-partner:7856
TEST=console command check battery staus
[unplug power]
> battery
[check voltage,current,capacity,time to empty]
[plug power]
> charger voltage 8400
> charger current 4250
> battery
[check current,time to full]
> charger input 4032
> battery
[check current,time to full]
[wait 130 seconds, charger watch dog timeout]
> battery
[check current]
Change-Id: Ifac17a0892f52e8f37eebc14b00e71f18360776c
Signed-off-by: Rong Chang <rongchang@chromium.org>
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Battery charging state machine contains many file changes.
This is the 1st part of the break down. Refactor original
test code into board dummy driver. Normalize charger API.
And import link's charger IC driver.
Signed-off-by: Rong Chang <rongchang@google.com>
BUG=chrome-os-partner:7855
TEST=build without warning and error
BOARD=bds make
BOARD=link make
BOARD=discovery make
Change-Id: I34b6e9862a45331378916bc77653d4adb22ca548
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Refactor board/chip-specific code into corresponding directories.
Add support of the four I2C temp sensor in Link.
Use table lookup to handle different types of temperature sensors.
BUG=chrome-os-partner:7527
TEST=Correctly read EC internal temperature on bds.
Compile for link succeeded.
Change-Id: I694cfa54e1545798d877fafdf18c5585ab5f03e2
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The GPIO console commands are common to all platform, let's push them in
the common code.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make BOARD=link && make BOARD=bds && make BOARD=discovery
on BDS console, try gpioget command.
Change-Id: I26e6d26b8d661e78b80d5d5f665e81f4daef0c11
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Preparatory work to introduce a second SoC : 3rd series 2/2
All the RO/A/B firmware copy code could be generic to all our platforms.
The console commands are a 'standard' API.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=on BDS EC console, check the reset cause with the 'sysinfo' command.
Change-Id: Ieeb84571085d88b5747a09da4c33d3852bb0da96
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Preparatory work to introduce a second SoC : 3rd series 1/2
Most of the code is handling the buffering and the printf, thus put it
in an hardware independant location and only implement the UART
dependant portions in the chip driver.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run on BDS and stress the console.
Change-Id: I9376f2fa1dad341eac808e1756dbeff32900bd51
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Preparatory work to introduce a second SoC : 2nd series 3/4
Some modules won't be used on other designs, make them optional.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run the EC firmware on BDS and check that the commands from the
optional features are still available and working.
Change-Id: I979864ed94dc4da90c1010bd2e4589d84bc2d046
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You can now enable/disable tasks more easily.
To conditionally compile a C file depending on the task FOO activation,
just write something like that in the build.mk file :
common-$(CONFIG_TASK_FOO)+=foo_source.o
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make all BOARD=link && make qemu-tests
Change-Id: I760fb248e1599d13190ccd937a68ef47da17b510
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Implement TPS2543 USB charging control.
It contains routine for setting each USB port as dedicated charging port
or standard downstream port. To allow us controlling the current
distributed to each port, we can select whether to allow 500mA or 1500mA
for each port.
BUG=chrome-os-partner:7476
TEST=Added USB port definition for BDS and tested GPIO output voltage
level is correct for all modes.
Change-Id: I19bc4b30d333aa802f868ebfc3a398b30e99ba0f
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For bringup, this powers on the x86 unconditionally.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7528
TEST=none
Change-Id: Ib23e56d38ab42f8d8a4dbd1ba9dce12f0c3eeec9
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Removed a duplicated line in common/build.mk which causes compilation
fail.
BUG=chrome-os-partner:7313
TEST=Compilation passed
Change-Id: Ia7bb73b96e4feae27e5b6e519feb3ea1a672913a
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Add LPC host command to get and set fan speed.
BUG=chrome-os-partner:7313
TEST=Connect a fan and manually test fan actual speed matches target
speed.
Change-Id: I4b6a711a1b8cca0dbd1c1936fe4f0f15240d3453
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Add a LPC host command to read temperature sensor value with given
sensor id.
Add ectool command to read temperature sensor value through LPC.
BUG=chrome-os-partner:7329
TEST=Manual check the reading received is the same as value printed by
console command.
Change-Id: Id3386774435be6c3ae010a143f4fa894568efdb8
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source files mainly done by Vincent.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Change-Id: Ic2d1becd400c9b4b4a14d4a243af1bdf77d9c1e2
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