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* Servo_V4: Remove unused commands to save flash spaceBrian J. Nemec2021-01-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Servo_V4 shares common code with the rest of the EC. Flash space slowly increases as features are enabled and added. This removes several large commands which are unused by the Servo_V4 flow to free up space. Initial Capacity: 36 bytes in flash and 1684 bytes in RAM still available on servo_v4 RO 4520 bytes in flash and 1684 bytes in RAM still available on servo_v4 RW Changes: * Removed chgsup: 128 byte removed from RO * Removed usart_info: 192 byte removed from RO * Removed flashwp: 320 byte removed from RO * Added new guard CONFIG_CMD_FLASH_WP which is enabled by default and disabled on Servo_v4 Due to reorganization that occurs, the total improvement is not equal to the sum of the changes, the RO region which increased by 576 bytes and RW increased by 592 bytes. Final Capacity: 612 bytes in flash and 1684 bytes in RAM still available on servo_v4 RO 5112 bytes in flash and 1684 bytes in RAM still available on servo_v4 RW BUG=b:178186394 TEST=Searched autotest, hdctool, and ec/util directories for references to the above commands. Validated cases have no usages or in the case of the flashwp command is used only by the EC rather than the Servo. TEST=Validated commands are not used in update process. Updates to and from these images are successful. TEST=Validated basic servo functionality is working BRANCH=Servo Signed-off-by: Brian Nemec <bnemec@chromium.org> Change-Id: Ib9c4e92c723e9eea3d0f403e1eb46556e3984074 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2654610 Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
* flash: remove unused assertsKeith Short2021-01-221-3/+3
| | | | | | | | | | | | | | | | | | CL:2325764 modified the common flash support to allow the host to program up to CONFIG_WP_STORAGE_SIZE bytes for the RO image and CONFIG_EC_WRITABLE_STORAGE_SIZE bytes for the RW image. The host always erases the full size reported by the region so the checks of CONFIG_RO_SIZE and CONFIG_RW_SIZE are no longer needed. BUG=b:175115527 BRANCH=volteer TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I446ecf2094e158073354766706d4f486acef1bd1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643578 Reviewed-by: caveh jalali <caveh@chromium.org>
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-151-8/+9
| | | | | | | | | | | | | | | | | | | | | In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* flash: allow programming larger EC imagesKeith Short2020-08-131-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some ECs, the EC image size is limited by the amount of code RAM instead of 1/2 the total flash size. In this instance, there is unused flash that can be used for single use data objects. To support linking data objects into the unused flash area, increase the region size that can be programmed for RW images. Analysis of chips that are impacted by this change: Chip EC image limit New RW size limit mec1701h 188 KiB 256 KiB mec17xx_2E00 188 KiB 256 KiB npcx5m5g 96 KiB 128 KiB npcx5m6g 224 KiB 256 KiB npcx7m6f 192 KiB 256 KiB npcx7m6fb 192 KiB 256 KiB npcx7m6fc 192 KiB 256 KiB npcx7m6g 192 KiB 256 KiB npcx7m7wb 256 KiB 512 KiB npcx7m7wc 252 KiB 256 KiB Boards using other chips verified that CONFIG_RW_SIZE is the same as CONFIG_EC_WRITABLE_STORAGE_SIZE. EC_FLASH_REGION_RO isn't used by depthcharge, only EC_FLASH_REGION_WP_RO which is already set to the correct size. BUG=b:160330682 BRANCH=none TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I84b9dc84568273e1ab1473e301d27ffd2b07ba7f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325764 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* common: Document flash_set_protect betterCraig Hesling2020-06-251-6/+33
| | | | | | | | | | | BRANCH=none BUG=none TEST=none Signed-off-by: Craig Hesling <hesling@chromium.org> Change-Id: I07967c32fd481f76385e65af8752c9f5c5d19d98 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2222691 Reviewed-by: Jett Rink <jettrink@chromium.org>
* common/flash: Adds validation to setting serialBrian J. Nemec2020-02-271-9/+13
| | | | | | | | | | | | | | | | | | | | | Adds a simple validation to the serial number to verify it fits within the buffer allocated to it. If a serial number is passed that is too long, it will no longer be silently truncated, instead an invalid argument will show up on the console. Also performed a small bit of cleanup on the function to eliminate extra loops and replace them with memset and memcpy functions. BUG=b:149775650 TEST=Verified that we can set and load serial numbers correctly. On ServoV4 where CONFIG_SERIALNO_LEN = 28: Verified that serial numbers up to 27 characters can be set and loaded. Verified 28 characters and longer return error codes. Change-Id: I9b4fb269a59023001a0fa8c1e8fc810db320fb8f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2063368 Tested-by: Brian Nemec <bnemec@chromium.org> Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Commit-Queue: Brian Nemec <bnemec@chromium.org>
* Servo: Adds persistent storage of MAC addressBrian J. Nemec2020-02-211-24/+107
| | | | | | | | | | | | | | | | | | | | | | | Adds a field to the persistent storage to store the MAC address of the device. This is enabled on ServoV4 in order to store the MAC address for the integrated ethernet port. Added a console command to set and load this value. BUG=b:149506580 TEST=Verified setting and loading the MAC address using: 'macaddr set 12:34:56:78:90:ab' and 'macaddr' or 'macaddr load' Verified that MAC addresses over 19 characters long return an error response and not update the MAC. Verified no set serial number will return the uninitialized string. Verified that the MAC address can be updated independently of serialno Verified that the persist_state fields restore during firmware updates Change-Id: I8425ce9e13322e99a4f59df444ea0dc73821aa6b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2063330 Tested-by: Brian Nemec <bnemec@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Brian Nemec <bnemec@chromium.org>
* common/flash: Add validation to persist_state size.Brian J. Nemec2020-02-201-0/+2
| | | | | | | | | | | | | | | | | | | Adds a check to validate the size of the persist_state to verify that it fits within the space allocated. BUG=b:149509270 TEST=Verified that when the sizeof(persist_state) less than or equal to CONFIG_FW_PSTATE_SIZE that no change occurs. Flash space remains the same and read / writes are functional. Verified that when the persist_state is enlarged, the BUILD_ASSERT check fails giving a compile time error. Branch=none Change-Id: Ia31329ec7817cef71e3835c94028951eaf71fd80 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057968 Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Commit-Queue: Brian Nemec <bnemec@chromium.org> Tested-by: Brian Nemec <bnemec@chromium.org>
* host_command: Change host command return value to enum ec_statusTom Hughes2019-10-021-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the host command handler callback function returns an int, it's easy to accidentally mix up the enum ec_error_list and enum ec_status types. The host commands always expect an enum ec_status type, so we change the return value to be of that explicit type. Compilation will then fail if you accidentally try to return an enum ec_error_list value. Ran the following commands and then manually fixed up a few remaining instances that were not caught: git grep --name-only 'static int .*(struct host_cmd_handler_args \*args)' |\ xargs sed -i 's#static int \(.*\)(struct host_cmd_handler_args \*args)#\ static enum ec_status \1(struct host_cmd_handler_args \*args)##' git grep --name-only 'int .*(struct host_cmd_handler_args \*args)' |\ xargs sed -i 's#int \(.*\)(struct host_cmd_handler_args \*args)#\ enum ec_status \1(struct host_cmd_handler_args \*args)##' BRANCH=none BUG=chromium:1004831 TEST=make buildall -j Cq-Depend: chrome-internal:1872675 Change-Id: Id93df9387ac53d016a1594dba86c6642babbfd1e Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816865 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* common/flash.c: Support finding the flash_bank_index for offset 0Patrick Georgi2019-09-121-0/+3
| | | | | | | | | | | | | | | | | | According to the algorithm that's always the first entry, but it always returned -1 so far. Found by Coverity Scan #174434 BUG=none BRANCH=none TEST=none Change-Id: Idd3f2794b559bea47f8425791351a8d0bc1424d6 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1793583 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
* rollback: Add rollback support for chips with varying flash bank sizesTom Hughes2019-07-031-4/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BRANCH=none BUG=b:124996507 TEST=In hatch_fp and nocturne_fp console with CONFIG_RWSIG_JUMP_TIMEOUT increased to large value and console_task stack size increased to 4096: > rollbackinfo rollback minimum version: 0 RW rollback version: 0 rollback 0: 00000000 00000000 0b112233 [00..00] * rollback 1: ffffffff ffffffff ffffffff [ff..ff] > rollbackupdate 1 > rollbackinfo rollback minimum version: 1 RW rollback version: 0 rollback 0: 00000000 00000000 0b112233 [00..00] rollback 1: 00000001 00000001 0b112233 [00..00] * > rollbackaddent 1234 > rollbackinfo rollback minimum version: 1 RW rollback version: 0 rollback 0: 00000002 00000001 0b112233 [e5..8c] * rollback 1: 00000001 00000001 0b112233 [00..00] TEST=test_that --board=nocturne <IP> firmware_Fingerprint.ObeysRollback firmware_Fingerprint.ObeysRollback [ PASSED ] firmware_Fingerprint.ObeysRollback/firmware_Fingerprint [ PASSED ] Change-Id: I90b524138ca1125e2c1b62936b9f6fbe00e957d4 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1681379 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cr50: convert functions into staticNamyoon Woo2019-04-051-1/+1
| | | | | | | | | | | BUG=b:112778363 BRANCH=cr50 TEST=ran test_that suite:faft_cr50_prepvt on coral. Change-Id: I1b3c573ee5fcb40290541f231c78bf31650c13c4 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1410482 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* common: replace 1 << digits, with BIT(digits)Gwendal Grignou2019-03-261-2/+2
| | | | | | | | | | | | | | | | Requested for linux integration, use BIT instead of 1 << First step replace bit operation with operand containing only digits. Fix an error in motion_lid try to set bit 31 of a signed integer. BUG=None BRANCH=None TEST=compile Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common/flash: Abort rwsig when RW is erased/written toNicolas Boichat2018-07-251-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If RW region is being erased/written to, make sure RO does not automatically jump to RW after the timeout: RO would normally verify RW, then wait for 1 second before jumping to RW, to allow host to issue host commands in the mean time. The problem is that some of these host commands may modify the RW, which would essentially bypass the signature check. This was not important on hammer, as STM32F0 does not support EC_FLASH_PROTECT_ALL_NOW, and would force another reboot after an update to lock the flash again, and verification would run again. Other STM32 variants are able to immediately lock the flash, so no reboot is required, and there is therefore a risk that the EC would jump to an RW image that is not signed. BRANCH=none BUG=b:111190988 TEST=./ectool --name=cros_fp reboot_ec Then, quickly (while EC still in RO) ./ectool --name=cros_fp flasherase 0x120000 131072 Succeeds, and EC does not jump to RW. TEST=Increment rollback number in RW (CONFIG_ROLLBACK_VERSION), see that update works, and rollbackinfo shows updated version. Change-Id: Iaf8e1802cf5c67cafbfda575d7202e00068c6f9b Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1139952 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* vboot: Invalidate cached hash if EC is in ROFurquan Shaikh2018-07-141-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 65d6c6a (vboot: Don't invalidate cached hash for EXEC_IN_RAM boards) changed the behavior of invalidating cached hash to ensure that AP triggers software sync if EC-RW RAM and flash copies do not match. However, this resulted in EC SW sync to fail because vboot in depthcharge reads hash right away after updating EC-RW to ensure that the flash update was indeed performed. Since EC does not invalidate the cache anymore, this results in incorrect hash being returned thus causing the system to reboot into recovery. Since vboot in depthcharge puts the EC in RO before updating EC-RW, this change invalidates cached hash if flash write/erase operations are performed with EC in RO. BUG=b:111449474 BRANCH=nami? TEST=Verified following: 1. Cached hash is invalidated when EC-RW flash is updated with EC in RO --> Flash BIOS-A and EC-A using servo --> Flash EC-B using servo --> Boot system --> Ensure that AP performs SW sync and boots to OS with EC-RW updated to EC-B 2. Cached hash is not invalidated when EC-RW flash is udpated with EC in RW --> Flash BIOS-A and EC-A using servo --> Boot to OS --> Flash BIOS-B and EC-B using flashrom on DUT --> Reboot device --> Ensure that AP detects mismatch in RAM and flash copies of EC-RW and causes EC to reboot. Change-Id: Ia50a9443e2f5ef9b1ed33992a46daf6230bf8816 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1137237 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* vboot: Don't invalidate cached hash for EXEC_IN_RAM boardsDaisuke Nojiri2018-07-111-22/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, a cached hash is invalidated on flash erase or write. This causes the hash to be (unintentionally) equal to the one expected by the AP after flashrom updates EC-RW directly on EXEC_IN_RAM devices. This patch makes EC skip invalidation of the cached hash if the board supports EXEC_IN_RAM. At the next AP reboot, AP will catch the hash mismatch and triggers software sync to resolve the mismatch. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:78285812,b:80143039 BRANCH=none TEST=Verify EC-RO/RW versions are updated on a dogfood Akali as follows: 1. emerge-nami chromeos-firmware-nami to build chromeos-firmwareupdate 2. Replace bios.bin and ec.bin in chromeos-firmwareupdate with new images 4. Run 'chromeos-firmwareupdate -m autoupdate' on DUT 5. Run reboot command on AP Change-Id: Ie5f80e4784814569c14d4cf2a03ddb9d1257cfd5 Reviewed-on: https://chromium-review.googlesource.com/1130552 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* flash: Fix flash_range_okNicolas Boichat2018-06-271-0/+2
| | | | | | | | | | | | | | | | | | With parameter offset=0x7f000000 size_req=7f7f0000, flash_range_ok fails to notice that the offset/size is invalid, as offset+size overflows and becomes negative. BRANCH=none BUG=chromium:855951 TEST=make buildfuzztests -j echo AxMAAH8AAAB/AAB/f39/Bg== | base64 -d > crash ASAN_OPTIONS="log_path=stderr" \ build/host/host_command_fuzz/host_command_fuzz.exe ./crash Change-Id: I9e4c752bee2695a87e69c2ff8494af4e9bffc9a4 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1116198 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* flash: Allow currently active regions to be modifiedDaisuke Nojiri2018-04-051-0/+4
| | | | | | | | | | | | | | | This patch allows chips which run code in RAM to erase or write regions even if they're active. BUG=b:77306460 BRANCH=none TEST=flashrom -p ec -w /tmp/ec.bin on Fizz Change-Id: Ib536b250dde78283513acb942507c67da0a6f622 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/997022 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* gru: Remove `flashinfo` command for RAM savingsShawn Nematbakhsh2017-11-091-0/+2
| | | | | | | | | | | | | BUG=None TEST=`make buildall -j` BRANCH=None Change-Id: Ibfbb6875327dfc13dcba57933d39fd207f382ac1 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/761299 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* EFS: Switch active slot when current slot is invalidDaisuke Nojiri2017-09-211-24/+2
| | | | | | | | | | | | | | | | | | | | | | | When EFS finds the active slot is invalid, it tries the other slot. This patch makes the other slot active so that the following boots will try the other slot first. This patch also replaces enum flash_rw_slot with system_image_copy_t. The new APIs are therefore renamed from *_slot to *_copy. Basically, this makes vboot see slots as a conceptual place instead of physical spaces bound to flash storage. BUG=b:65028930 BRANCH=none TEST=On Fizz, verify: 1. RW_B is old and updated by soft sync. RW_B is activated and executed after reboot. System continues to boot to OS. 2. RW_A is old and updated by soft sync. RW_A is activated and executed after reboot. System continues to boot to OS. Change-Id: Icf97da13e651e7a931b9d507052b9422566eb16c Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/648449
* EFS: Add support for early firmware selectionDaisuke Nojiri2017-09-121-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chromebox ECs performs EFS: verifying firmware before the AP boots. This patch updates host commands which are required for the EFS. The change includes: * Update EC_CMD_FLASH_REGION_INFO to accept EC_FLASH_REGION_UPDATE * Update EC_CMD_VBOOT_HASH to accept EC_VBOOT_HASH_OFFSET_UPDATE When EC_FLASHS_REGION_UPDATE is specified, EC_CMD_FLASH_REGION_INFO returns the slot which currently is not hosting a running RW copy. When EC_VBOOT_HASH_OFFSET_UPDATE is specified, EC_CMD_VBOOT_HASH computs the hash of the update slot. This hash covers the entire region, including the signature at the end. This patch undefines CONFIG_CMD_USBMUX and CONFIG_CMD_TYPEC for gru to create space. BUG=b:65028930 BRANCH=none CQ-DEPEND=CL:648071 TEST=On Fizz, verify: 1. RW_B is old and updated by soft sync. RW_B is activated and executed after reboot. System continues to boot to OS. 2. RW_A is old and updated by soft sync. RW_A is activated and executed after reboot. System continues to boot to OS. Change-Id: I9ece907b764d07ce94054ba27996e048c665a80a Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/648448
* Treat SYSTEM_IMAGE_RW_B also as RW copyDaisuke Nojiri2017-09-091-1/+1
| | | | | | | | | | | | | | SYSTEM_IMAGE_RW_B hasn't been globally treated as a RW copy. This change makes EC treat it also as a RW copy. BUG=none BRANCH=none TEST=make buildall Change-Id: Iae5a9090cdf30f980014daca44cdf8f2a65ea1f2 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/656337 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add OTP supportGwendal Grignou2017-07-281-25/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One Time Programmable memory can be used to store permanent data like serial numbers. Reorganize the code to support writing serial number to OTP, in addition to pstate (if using its own memory bank) or autogenerate from unique id (hammer). + Add CONFIG_OTP to enable OTP code + Add CONFIG_SERIALNO_LEN to indicate the size of the serial number string. Currently set to 28, when USB serial number is needed. + Expose flash_read|write_pstate_serial and add otp_read|write_serail, remove more generic flash_read|write_serial. + Make board_read|write_serial generic, declared outside of USB subsystem. Priority order to read|write serial string: - board definition (like hammer) - pstate location, if stored in its private memory bank - otp area If none of these methods are available, a compilation error is raised. BUG=chromium:746471 BRANCH=none TEST=compile Change-Id: I3d16125a6c0f424fb30e38123e63cf074b3cb2d3 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/580289 Reviewed-by: Nick Sanders <nsanders@chromium.org>
* flash: add flash selection supportWei-Ning Huang2017-07-271-0/+21
| | | | | | | | | | | | | | | | | | | | | | | Some chips require special operations before flash can be accessed (read, write, erase), without it the flash operations could be corrupted. The chip that requires this should enable the CONFIG_FLASH_SELECT_REQUIRED config, which exposes EC_FLASH_INFO_SELECT_REQUIRED in flashinfo flags. Before any flash operations is executed on the chip, EC_CMD_FLASH_SELECT should be issued to notify the chip to prepare for the flash operations. BRANCH=none BUG=b:63685022 TEST=with depended CLs, touchpad interrupt should be disabled when flashrom is in progress. CQ-DEPEND=CL:*416548 Change-Id: I96455adbe739d5f924edf382a2752404a7c5ad04 Signed-off-by: Wei-Ning Huang <wnhuang@google.com> Reviewed-on: https://chromium-review.googlesource.com/582374 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org>
* common/flash: Add option to set PSTATE to be locked by defaultNicolas Boichat2017-07-081-0/+4
| | | | | | | | | | | | | | | | | For hammer, we do not want to require finalization in factory, so we just protect RO whenever WP GPIO is set. BRANCH=none BUG=b:63378217 TEST=Enable CONFIG_FLASH_PSTATE_LOCKED, flash hammer, check with flashinfo that RO protection matches WP status. Change-Id: I902ee478c00a3c932277d2a7d0622c070654a5eb Reviewed-on: https://chromium-review.googlesource.com/563217 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* common: delay flash_erase deferred task so EC_CMD_FLASH_ERASE can completeWei-Ning Huang2017-06-271-1/+2
| | | | | | | | | | | | | | | | | | | | Add a delay before flash_erase deferred started so the task does not halt CPU, and cause the response of EC_CMD_FLASH_ERASE to not be delivered. When the above situation happens the host I2C controller will timeout. A 100ms delay should be long enough on any board to allow the response to be sent. BRANCH=none BUG=b:38018926 TEST=on eve units where flashrom always fail: `flashrom -p ec:type=tp -w ec.bin` succeeds. Change-Id: I399a60064392da41a3e27f8630175ab427047ab7 Signed-off-by: Wei-Ning Huang <wnhuang@google.com> Reviewed-on: https://chromium-review.googlesource.com/547375 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@google.com>
* common: Add deferred erase supportGwendal Grignou2017-06-021-10/+69
| | | | | | | | | | | | | | | | | | | | Some device has large pages that take up to 2s to erase. Add support to send a deferred erase command, that willi be processed on HOOK task. It can leave the other tasks (HOST_CMD) responsive. If the whole EC can stall on flash erase, like the STM32F4 do, at least the command FLASH_ERASE_GET_RESULT can be retried when it times out. BRANCH=none TEST=Check with flashrom doing a loop of overwrites. BUG=b:38018926 Change-Id: I8ce8e901172843d00aac0d8d59a84cbd13f58a10 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/510012 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* common: Add support for flash with regions of different sizeRong Chang2017-06-021-53/+154
| | | | | | | | | | | | | Add support to handle devices with flash regions of different sizes. BRANCH=none TEST=compile BUG=b:38018926 Change-Id: I8f842abaa50de724df60dd7e19f9e97cb9660367 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/264031 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* flash: ensure proper pstate alignmentVincent Palatin2017-03-241-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | The pstate structure is written using the low-level flash_physical_write() function. As a consequence, it is supposed to meet the CONFIG_FLASH_WRITE_SIZE alignment constraint. Add a build-time assertion to avoid silent failures. Slightly decrease the maximum size of the serial number string, so the structure has a natural 32-byte alignment which is compatible with a large number of platforms (including STM32L4 which requires 64-bit alignment). Of course, this change is not fully backward-compatible. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chromium:571477 b:35648258 TEST=on STM32L442, build and run 'flashrom --wp-enable' without failure. Change-Id: Ia8f82790a61a6c7d2cf9bfeb95bfdaf7b8c52d11 Reviewed-on: https://chromium-review.googlesource.com/458201 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org>
* flash: Add ROLLBACK flash region, that can be protected separatelyNicolas Boichat2017-02-251-6/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ROLLBACK region will be used to store rollback information, and can be protected independently of RW (it can only be protected when RO is protected, though). This is only supported on stm32f0 currently. BRANCH=none BUG=chrome-os-partner:61671 TEST=on hammer (stm32f072) flashinfo => RO+RW not protected flashwp true; reboot => only RO protected flashwp all; reboot => RO+RW+RB protected flashwp noall; reboot => only RO protected flashwp rw; reboot => only RO+RW protected flashwp rb; reboot => RO+RW+RB protected flashwp norb; reboot => RO+RW protected flashwp all; reboot => RO+RW+RB protected flashwp norw; reboot => RO+RB protected TEST=on reef, rb/norb commands not available Change-Id: I45ffc66d91cf3699ecff025e5114c59a73dc8274 Reviewed-on: https://chromium-review.googlesource.com/430519 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* flash: Add EC_FLASH_PROTECT_RW_[AT_BOOT|NOW] flagsstabilize-9313.BNicolas Boichat2017-02-231-15/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The idea of this flag is to be able to protect/unprotect only the RW portion of the flash. In the (usual) case where ALL=RO+RW, with no other region, this makes no difference compared to the existing EC_FLASH_PROTECT_ALL_* flag, and this flag may not be supported. This is necessary for futher work, where a ROLLBACK region is added, so that RW/ROLLBACK can be protected/unprotected individually. Only support for stm32f0 is added, as this is the target for hammer. BRANCH=none BUG=chrome-os-partner:61671 TEST=build and flash hammer (stm32f072) flashinfo => RO+RW not protected flashwp true; reboot => only RO protected flashwp all; reboot => RO+RW protected flashwp noall; reboot => only RO protected flashwp rw/norw not available TEST=enable CONFIG_FLASH_PROTECT_RW build and flash hammer (stm32f072) flashinfo => RO+RW not protected flashwp true; reboot => only RO protected flashwp all; reboot => RO+RW protected flashwp noall; reboot => only RO protected flashwp rw; reboot => RO+RW protected flashwp norw; reboot => only RO protected TEST=build and flash reef (npcx) flashinfo => RO+RW not protected flashwp true => RO protected flashwp all; flashinfo => all_now displayed reboot => RO protected flashwp rw/norw not available Change-Id: Ica6f499cf2e8a9345b08ef52c915655a983ffe3c Reviewed-on: https://chromium-review.googlesource.com/442265 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common/flash.c: Remove redundant codeNicolas Boichat2017-02-231-10/+8
| | | | | | | | | | | | | | | | | | | | | Saves a little bit of flash size: Compared 167 of 167 files. 77 files changed. Total size change: -3240 bytes. Average size change: -42 bytes. BRANCH=none BUG=chrome-os-partner:61671 TEST=make buildall -j TEST=hammer: 'flashwp true' works as expected TEST=hammer+CONFIG_FLASH_PSTATE_BANK: 'flashwp true' still works TEST=reef: 'flashwp now' sets all_now flag in flashinfo Change-Id: Ic2fe8f0c67520afea276369fdf8c59e75e95208e Reviewed-on: https://chromium-review.googlesource.com/444488 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common/flash.c: Rename flashwp parameter from [no]rw to [no]allNicolas Boichat2017-02-171-3/+3
| | | | | | | | | | | | | | | | | | | | | Saying that 'flashwp rw' was protecting RW region was not really accurate: it was actually protecting the whole flash (which, well, is actually equivalent as the RW can't be protected without the RO). Let's fix that in anticipation for adding a new flag that will _really_ set the RW protection (and only that). BRANCH=none BUG=chrome-os-partner:61671 TEST=make buildall -j Change-Id: Ic1c585622330b4976e71150f3a71b74a031a7694 Reviewed-on: https://chromium-review.googlesource.com/442264 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* flash: Pass more precise parameter to flash_[physical_]protect_at_bootNicolas Boichat2017-02-121-24/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for adding the rollback protection block, pass EC_FLASH_PROTECT_RO/ALL_AT_BOOT to flash_[physical_]protect_at_boot, instead of an enumeration no protection/RO/ALL. This will later allow us to protect/unprotect the rollback region only, by adding a EC_FLASH_PROTECT_ROLLBACK_AT_BOOT flag. BRANCH=none BUG=chrome-os-partner:61671 TEST=Build hammer with CONFIG_CMD_FLASH command, so that write protection can be checked with flasherase/flashwrite. TEST=On hammer (stm32f072): flashinfo => RO+RW not protected flashwp true; reboot => only RO protected flashwp rw; reboot => RO+RW protected flashwp norw; reboot => only RO protected TEST=On reef (npcx): deassert WP, flashwp false; flashinfo => RO+RW not protected flashwp true => only RO protected reboot => only RO protected flashwp rw => RO+RW protected reboot => only RO protected Change-Id: Iec96a7377baabc9100fc59de0a31505095a3499f Reviewed-on: https://chromium-review.googlesource.com/430518 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* flash: Fix ccprintf parameters in flasherase/writeNicolas Boichat2017-01-251-3/+2
| | | | | | | | | | | | | | Both these functions had a superfluous offset parameter. BRANCH=none BUG=chrome-os-partner:61671 TEST=flasherase/write Change-Id: I2973490e472c2e658440b56a0b76ec9f2aab749a Reviewed-on: https://chromium-review.googlesource.com/432176 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* flash: Call lock function prior to mapped external readShawn Nematbakhsh2016-09-161-1/+8
| | | | | | | | | | | | | | | | | | | | | | | Mapped read access to external flash may conflict with direct access through SPI commands, so call a chip-level function to lock access prior to doing such reads. BUG=chrome-os-partner:55781 BRANCH=Gru TEST=Verify 'ver' still works fine on kevin, and vboot hashing completes successfully. Change-Id: I009d6d5ee61c83260fb49ad4ee137fa3f4cd625a Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/385165 Tested-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> (cherry picked from commit a7f3e3fa376731709f4823a0c1d464b4d1deae14) Reviewed-on: https://chromium-review.googlesource.com/386446 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* Cr50: Mark several console commands as safeBill Richardson2016-08-311-3/+3
| | | | | | | | | | | | | | | | | | | Even when CONFIG_RESTRICTED_CONSOLE_COMMANDS is enabled, there are many commands that can't do anything dangerous. This marks some of those commands as safe to use, even when restrictions are enforced. I'm only marking commands that are used by the Cr50, since that's the only board that has restrictions. BUG=chrome-os-partner:55322 BRANCH=none TEST=make buildall, test on Cr50 hardware Change-Id: I6289d332830175b6adcb6b20cb4c21d01d27a25e Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/376188 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: DECLARE_CONSOLE_COMMAND only needs 4 argsBill Richardson2016-08-241-10/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since pretty much always, we've declared console commands to take a "longhelp" argument with detailed explanations of what the command does. But since almost as long, we've never actually used that argument for anything - we just silently throw it away in the macro. There's only one command (usbchargemode) that even thinks it defines that argument. We're never going to use this, let's just get rid of it. BUG=none BRANCH=none CQ-DEPEND=CL:*279060 CQ-DEPEND=CL:*279158 CQ-DEPEND=CL:*279037 TEST=make buildall; tested on Cr50 hardware Everything builds. Since we never used this arg anyway, there had better not be any difference in the result. Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/374163 Reviewed-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Cr50: Use parse_bool() for boolean argsBill Richardson2016-08-221-10/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The parse_bool() function exists so we don't have to litter our console commands with stuff like this: if (!strncasecmp(argv[1], "on") || !strncasecmp(argv[1], "enable" || !strncasecmp(argv[1], "true" || [...] This CL uses parse_bool instead of that kind of thing so I don't have to remember which commands use "enable" and which use "on" and so forth. I only changed the commands that Cr50 uses. BUG=none BRANCH=none TEST=make buildall; test on Cr50 hardware I tested all the affected commands to ensure that they still work correctly: usb, ccd, flashwp (which doesn't do anything anyway). Change-Id: I7d875ab22934fb4b500e3d0f62ebe3e04101272d Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/373658 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* gru: Align images sizes to flash block erase sizeShawn Nematbakhsh2016-08-011-0/+7
| | | | | | | | | | | | | | | | | Image sizes must be aligned to block erase size to ensure that the host can erase the entire image and nothing but the image. BUG=chrome-os-partner:55828 BRANCH=None TEST=Manual on kevin, rebuild FW with new EC, rebuild + flash EC once again, verify that SW sync completes and unit boots to OS. Change-Id: If6110f39869d6421038a3fe7afdc7d918323249e Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/365142 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* servo_micro: add programmable serial numberNick Sanders2016-05-261-24/+146
| | | | | | | | | | | | | | | | This change provides a console command for setting, and loading a usb serial number from flash. This feature adds CONFIG_USB_SERIALNO, and currently only has a useful implementation when PSTATE is present. BUG=chromium:571477 TEST=serialno set abcdef; serialno load; reboot BRANCH=none Change-Id: I3b24cfa2d52d54118bc3fd54b276e3d95412d245 Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/337359 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Remove superfluous #definesBill Richardson2015-09-251-3/+4
| | | | | | | | | | | | | | | This just removes a couple places where a perfectly good CONFIG macro is simply renamed to something else. BUG=none BRANCH=none TEST=make buildall Change-Id: I97a4abe95736504fe97c468336426d0ecc48d62c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302597 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: Remove redundant FLASH_SIZE CONFIGsShawn Nematbakhsh2015-09-161-2/+1
| | | | | | | | | | | | | | | | | | | | Since there is no more concept of a flash region belonging only to the EC, we only need one FLASH_SIZE config, which represents the actual physical size of flash. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I18a34a943e02c8a029f330f213a8634a2ca418b6 Reviewed-on: https://chromium-review.googlesource.com/297824 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Change meaning of storage offset CONFIGsShawn Nematbakhsh2015-09-161-10/+31
| | | | | | | | | | | | | | | | | | | | | | | In order to support architectures with non-contiguous writable and protected regions, change storage offsets to be relative to writable and protected regions, rather than relative to "the start of the region of storage belonging to the EC". Spec doc available at https://goo.gl/fnzTvr. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I796f8e7305a6336495bd256a78774595cb16a2e4 Reviewed-on: https://chromium-review.googlesource.com/297823 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Remove CDRAM / CODERAM CONFIGsShawn Nematbakhsh2015-09-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | CDRAM / CODERAM configs were previously used for chips which copied code from external SPI to program memory prior to execution, and were used inconsistently between npcx and mec1322. These CONFIGs are now completely redundant given new configs like CONFIG_MAPPED_STORAGE_BASE and CONFIG_EXTERNAL_STORAGE. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I0e054ab4c939f9dcf54abee8e5ebd9b2e42fe9c4 Reviewed-on: https://chromium-review.googlesource.com/297804 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Rename geometry constantsShawn Nematbakhsh2015-09-161-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename and add geometry constants to match spec doc - https://goo.gl/fnzTvr. CONFIG_FLASH_BASE becomes CONFIG_PROGRAM_MEMORY_BASE CONFIG_FLASH_MAPPED becomes CONFIG_MAPPED_STORAGE Add CONFIG_INTERNAL_STORAGE, CONFIG_EXTERNAL_STORAGE and CONFIG_MAPPED_STORAGE_BASE where appropriate. This CL leaves chip/npcx in a broken state -- it's fixed in a follow-up CL. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Change-Id: Idb3c4ed9f7f6edd0a6d49ad11753eba713e67a80 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297484 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* vboot_hash: Abort hash calculation on flash writeDivya Jyothi2015-07-011-2/+18
| | | | | | | | | | | | | | | | | If flash is being written, any pending hash calculation is likely to be invalid. BRANCH=None BUG=chrome-os-partner:38103 TEST=on Cyan, run hundreds of flashrom cycles to make sure there are no read, erase or write errors Change-Id: I915f8db7998c56fc12e7d85173232882fb7ed80d Signed-off-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/282211 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Bernie Thompson <bhthompson@chromium.org> Tested-by: Bernie Thompson <bhthompson@chromium.org>
* cleanup: Use appropriate image geometry CONFIGsShawn Nematbakhsh2015-05-151-13/+7
| | | | | | | | | | | | | | | | - Use CONFIG_*_MEM when dealing with images in program memory. - Use CONFIG_*_STORAGE when dealing with images on storage. - Use CONFIG_WP when dealing with the entire WP RO region. BUG=chrome-os-partner:39741,chrome-os-partner:23796 TEST=Manual on Cyan with subsequent commit. Verify that FMAP matches actual layout of image. Verify flashrom succeeds flashing + verifying EC image using host command interface. BRANCH=None Change-Id: Iadc02daa89fe3bf07b083ed0f7be2e60702a1867 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/270269
* cleanup: Rename image geometry CONFIGsShawn Nematbakhsh2015-05-121-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Rename image geometry configs with a uniform naming scheme to make their purposes more clear. CONFIG_RO_MEM_OFF (was CONFIG_FW_RO_OFF) - RO image offset in program memory CONFIG_RO_STORAGE_OFF (was CONFIG_RO_SPI_OFF) - RO image offset on storage CONFIG_RO_SIZE (was CONFIG_FW_RO_SIZE) - Size of RO image CONFIG_RW_MEM_OFF (was CONFIG_FW_RW_OFF) - RW image offset in program memory CONFIG_RW_STORAGE_OFF (was CONFIG_RW_SPI_OFF) - RW image offset on storage CONFIG_RW_SIZE (was CONFIG_FW_RW_SIZE) - Size of RW image CONFIG_WP_OFF (was CONFIG_FW_WP_RO_OFF) - Offset of WP region on storage CONFIG_WP_SIZE (was CONFIG_FW_WP_RO_SIZE) - Size of WP region on storage BUG=chrome-os-partner:39741,chrome-os-partner:23796 TEST=Set date / version strings to constants then `make buildall -j`. Verify that each ec.bin image is identical pre- and post-change. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I6ea0a4e456dae71c266fa917a309b9f6fa4b50cd Reviewed-on: https://chromium-review.googlesource.com/270189 Reviewed-by: Anton Staaf <robotboy@chromium.org>
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