| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
ocpc_reset() api sets the charger chip voltage limit.
If the battery voltage read is bad, charger voltage set to predefined
battery normal voltage.
Change helps boot DUT by connecting charger alone.
BUG=b:226047299
BRANCH=none
TEST=Boot Nivviks DUT with only charger connected to USBC port1
Change-Id: I662548a85f54b72bf4bbad215eff7e63d8dcf645
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3596379
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Ensure that the desired charge current is valid an at least 0mA.
Otherwise, cause set an incorrect precharge current.
BUG=b:202796060
BRANCH=dedede
TEST=SIT check function is PASS
Change-Id: I3929e8098097960e5a00192f797311f3320c6b94
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3302226
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When linear precharge is enabled, it may affect
the charging behavior from the primary charger IC.
Therefore as a part of the reset process, we need
to disable linear precharge to make sure primary
charger can work normally.
BUG=b:191347747
BRANCH=dedede
TEST=make BOARD=storo pass, and test C0 port can charge normally.
Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Change-Id: I4c186214aead442fbec99ac0e43df891dd98b302
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2972526
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
OCPC was directly querying the desired battery current instead of
honoring the request from the charger task by mistake. This commit
fixes that and makes sure that we don't set our current target from
the desired battery current directly.
BUG=b:180710082
BRANCH=dedede
TEST=Build and flash sasuke, charge from C1, verify that desired
charge profile is adhered to.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I6d59babcad891fd09ab9a4fc5641e6d152223b74
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740572
Tested-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Some of the charger ICs can provide measurements for the charge
voltage and the charge current. This information is needed by the
OCPC module. Previously, the charge_get_current() and
charge_get_voltage() functions were modified to provide this
information. However, those functions are intended to provide the set
voltage and current targets for the charger IC.
This commit adds a new set of APIs, charge_get_actual_current() and
charge_get_actual_voltage() which provides the actual charge current
and voltage if the charger IC is able to provide that information.
BUG=b:182018616
BRANCH=dedede
TEST=Build and flash madoo, verify that `charger` EC console command
shows the set current and voltage targets instead of the measured
values. Check that the `chgstate` command shows the measured values
for use with the OCPC module.
TEST=Verify that charging from the sub board works.
TEST=Verify that resistances are still calculated and seem reasonable.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I82565d18908d9ea0f54934787897937488e280e6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2750866
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
On systems with no battery present (or a battery which has not yet
reported a voltage), skip setting Vsys to the battery voltage.
BRANCH=None
BUG=b:176214112
TEST=on galtic, sysjump with a charger in C1 and verify initial Vsys is
not set to 0
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I790cd69ec948d4f2ccaad8c7963d8a4883564e1c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2738054
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
One of the chargers used in OCPC systems has an ADC resolution of
96mV. This causes an issue when the voltage delta that is used for
the resistance calculation is smaller than this value as this can lead
to a value of 0 resistance. When the battery is charged at a high
enough current, there's enough of a voltage drop such that the delta
exceeds the ADC LSB.
This commit simply raises the threshold at which resistance is
calculated in system to 1666mA such that the voltage delta exceeds the
LSB of the charger IC's LSB.
BUG=b:175063397
BRANCH=dedede
TEST=Build and flash madoo. Charge from sub board, verify that once
charging current exceeds 1666mA, resistance is calculated. Verify
that the calculated system resistance is non-zero.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Idfe5a4858f9915b54ad7b095c2972597909f97a1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2686256
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In order to prevent high current spikes when the OCPC PID loop runs,
this commit sets the initial VSYS voltage to that of the battery.
BUG=b:175334490
BRANCH=dedede
TEST=Build and flash DUT. Using a Type-C breakout board and a current
probe, plug in charger to sub board, verify that no initial current
spike exceeds that of the contract.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Idb6e7d2e51acd0c5279bbb055b75774c6dab6901
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628573
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Previously, some statistics were added to the combined system and
battery resistance OCPC parameter. Namely, calculating the mean and
standard deviation in order to filter out outliers. However, for OCPC
systems which can calculate both resistances separately, similar
statistics should be performed.
This commit expands the resistance statistics to cover the individual
Rsys and Rbatt OCPC parameters.
Additionally, fixes were made to ensure that the resistance could
never become negative.
BUG=b:170974274 b:175063502
BRANCH=dedede
TEST=Build and flash drawcia, charge from the sub board, enable OCPC
debug output and verify that resistance is still calculated, never
negative, and statistics are computed.
TEST=Repeat above test for madoo.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I57a4af0cbbd0fa9f4bc1354a79b4ba97ffbad6d2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2587817
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This commit adds an explicit precharge phase to the OCPC algorithm.
This allows the OCPC module to take advantage of the linear charging
feature available on the supported charger ICs. With linear charging,
the charger IC can control the BFET in the linear region to provide
low precharge currents while maintaining a high VSYS in order to
prevent brownounts in the system.
The precharge phase is active when the battery voltage is less than
the minimum battery voltage, or the voltage is less than the nominal
voltage and the desired charge current is less than or equal to the
defined precharge current.
BUG=b:174683659
BRANCH=dedede
TEST=Build and flash drawcia. Drain battery until DFET is disabled.
Plug in a charger on the sub board, verify that battery is able to be
revived, battery is able to charge at precharge current limits without
exceeding, and battery is able to transition to the fast charge
portion of the charge curve without excessively exceeding the target
current limit.
TEST=Cutoff battyey, plug in charger, verify that battery is able to
be revived from the sub board.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I59b119bac8ed9266889aace63d58d5da63e382f3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2570939
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This commit improves the CV charging phase by setting the target
charge current to the current currently entering the battery as
opposed to simply keeping VSYS as the max voltage and allowing the
current to asymptotically reach the target.
BUG=b:167913892
BRANCH=dedede
TEST=Build and flash drawlat, charge battery to completion, verify
that voltage remains roughly constant in the CV phase.
Change-Id: Ifa5925e6f5e9e5ba83f6265bff16decaa514e762
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2568567
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In order to prevent overshoots, this commit makes the OCPC PID loop
much more conservative by limiting upward transitions of VSYS by 10mV.
A 10mV VSYS increase can equate to a 100mA charging current increase
assuming combined resistance of 100mOhm. Downward transitions still
remain uninhibited in order to correct overshoot quickly.
BUG=b:174167890
BRANCH=dedede
TEST=Build and flash drawlat. Discharge battery to 1%, charge from sub
board, verify that no overshoots are seen up to 7% SOC.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ia5ba76412333d86f9aa9b4868b8e1b85fdec33d3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2568566
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Some charger ICs have the capability to report if the input current
has been reached. Thus far, it seems to be more precise compared to
the values returned via the charger ICs ADCs. This commit has the
OCPC module use that functionality if available. If the feature is
not available, the fallback will be what exists today, which is simply
seeing if the instnantaneous input current limit is 95%+ of the set
input current limit.
BUG=b:174167890
BRANCH=dedede
TEST=Build and flash drawlat. Charge from sub board, verify that
input current is reached prior to that reported from the onboard ADCs.
Change-Id: I3dfb579fd4617b13dfdbed3cb9c7cc2c2f70b93a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2568565
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
We add a bit of hysteresis when determining our error for the OCPC PID
loop equivalent to charger IC's "step" in regulating current. We had
set the band above and below the target for the full step. In order
to reduce overshoot, this commit centers the band around the current
target.
BUG=b:174167890
BRANCH=dedede
TEST=Build and flash drawlat; verify that steady state now settles
around a shorter band and overshoot is reduced.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I8f8c7305c3973fb5cedecdd14e5466f11a0e85a7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567035
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
It's been seen that the resistance calculations can vary quite a bit
during the charging cycle. In order to reduce this variance, this CL
has the OCPC module take the running mean and use that at the combined
resistance value. Additionally, values that are outside of a 6
standard deviation window are discarded.
BUG=b:170974274
BRANCH=None
TEST=Build and flash waddledee, enable OCPC debug logging and plot
combined resistance over time as DUT charges in suspend. Verify that
combined resistance does not vary significantly.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I2ccb9ccbc0b98455e78249d47f8692828f1a15e9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508853
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently our resistance calculations are only made when the system is
charging in S5 or lower. We can perform these calculations when the
system is in suspend as well since the power consumption is low.
Additionally, it's very possible that a user may not charge in G3 for
a very long time if at all.
BUG=b:170975872
BRANCH=None
TEST=Build and flash waddledoo, suspend DUT, charge from sub board,
verify that resistance is being calculated.
Change-Id: I882eae0014f5c7986e5997872f4a9e004f82ee9d
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508851
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This commit fixes a bug in how OCPC determined which portion of the
charge curve that we are in. Upon startup, the phase is uninitialized
and we get a charge_request of 0,0. The code assumed that if the
battery voltage was less than the desired voltage, we'd be in the CV
state. But ignoring a zero desired voltage prevented us from assuming
we're in CV.
BUG=b:168135339
BRANCH=None
TEST=Build and flash drawcia, cutoff the battery, wait 15s, plug in a
charger on C1, verify that the DUT comes out of cutoff.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Id5f36d701c2d4e1608954c898c5bc4f0010dec1d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2431695
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This commit just performs some miscellaneous fixes for OCPC.
Some key fixes are:
- Fix handling of full batteries with respect to CFET status
- Reducing upward transitions
- Restrict system resistance calculations to high current scenarios
only.
BUG=b:168135339
BRANCH=None
TEST=Build and flash waddldee with new PID constants, drain battery,
verify DUT can charge from the sub board port all the way to full,
verify DUT can source out the main board port while charging from the
sub board. Verify that the charging curve is fairly stable.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Id170b1c5dfe56733f4ebcf350bf96d0de59e3ec4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2411467
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When tuning an OCPC system, the OCPC debug output is very useful in
order to examine the behaviour of the system. However, instead of
simply looking at a bunch of changing numbers on the terminal, it's
easier to view a waveform of the current entering the battery. In
lieu of using an oscilloscope with a current probe, this commit adds a
visualization graph which shows the current entering the battery
relative to the target current. Each segment on the graph represents
5% of the target current.
Usage is as follows:
> ocpcdebug enable/viz/all/disable
`enable` will show text debug only.
`viz` will show the visualization graph (output shown below).
`all` will show both the graph and text debug data.
`disable` will show no debug output.
Here is an example of the output
[2665.199505 Act Chg: 1]
[2665.702271 Battery 47% (Display 47.1 %) / ??h:?? to empty]
[2665.703810 charge_request(13050mV, 1800mA)]
[2665.725854 OCPC: Target VSYS: 11979mV]
[----------#----------] (actual)251mA (desired)1880mA
[2666.317342 OCPC: Target VSYS: 12179mV]
[----------|---------o] (actual)879mA (desired)1880mA
[2666.908941 OCPC: Target VSYS: 12274mV]
[----------|-----o----] (actual)1216mA (desired)1880mA
[----------|o---------] (actual)1631mA (desired)1880mA
[2668.090373 OCPC: Target VSYS: 12259mV]
[----------#----------] (actual)1797mA (desired)1880mA
[----------#----------] (actual)1813mA (desired)1880mA
[----------#----------] (actual)1769mA (desired)1880mA
[----------#----------] (actual)1779mA (desired)1880mA
BUG=None
BRANCH=None
TEST=Build and flash waddledee, enable debug command, verify that
visualization graph is shown.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ie271524ce2ce90781b966a77f2a7ef27dc969075
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2410556
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The OCPC algorithm will check to make sure that the battery CFET is
enabled before adjusting VSYS. If it's not, it prints out an error
log message. However, if the battery isn't present, the CFET can't be
enabled therefore this would lead to spammy output.
This commit just changes the log print to be emitted when the battery
is present AND the CFET is disabled.
BUG=none
BRANCH=none
TEST=`make -j buildall`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ib0dcacd7736ca5f73c114c7cfa4446378086c58e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393221
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
If the CFET is disabled, then the charging feedback loop is broken and
any further adjustments of VSYS will have no effect on the charging
current. Therefore, the system should not try to make any VSYS
adjustments while this is occurring.
This commit causes the the OCPC loop to check if the CFET is disabled
before deciding to adjust VSYS or not.
BUG=b:160918663
BRANCH=None
TEST=Build and flash waddledee, charge DUT thru sub board until
battery toggles the CFET, wait until the toggling ceases, verify that
VSYS was not changed during that time.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I7c0e5dce277118600b8f3120a6637938645db6ec
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2370044
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Charger ICs differ in their ability to regulate down to a certain mA,
therefore, the OCPC code should take this ability into account and not
count it as an error if it's within the bounds of what the charger IC
is capable of regulating it to.
BUG=b:147440290
BRANCH=None
TEST=Enable on waddledee, flash, verify that once target current is
within an error bar of what the charger IC is capable of regulating
to, no error is reported.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: If94a9173e27d35be81b86589c530766bfe6431a2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336174
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This commit adds a ocpc_init() function which will also chain off to a
board specific init function as well. Currently, the init function
sets up the initial resistances. The board specific init functions
may set up charger specific parameters.
BUG=b:147440290
BRANCH=None
TEST=Enable on waddledee, build and flash and verify charging still
works. Verify that initial resistances are seeded.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ia25aff9d2032746f42cbf0f7b6c5707d20362203
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2336173
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This commit adds a charger flags member variable to the OCPC data
structure. This allows boards to define certain features that the
chargers that they are using have or don't have. To start, the
attribute of no Isys measurement is added.
BUG=b:155224387
BRANCH=None
TEST=With other CLs, build and flash waddledee, verify that DUT can
calculate combined resistance.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I6b8f0a9501e0d79747e42f3444397d7516f01b2f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335892
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In order to optimize charging from the auxiliary charger, we need to
calculate the system resistance as well as the battery resistance.
This allows some charger ICs to compensate for the losses from their
output node to the battery.
In order to perform this calculation, we must do it when the AP is off
(or in suspend) which provides the condition that nearly all of the
charge current is entering the battery and isn't being largely
consumed by the rest of the system. The combined Rsys+Rbatt
calculation is relatively straightforward as it's the delta between
the VSYS output and the battery voltage divided by the current
entering the battery. In order to separate out the two terms, we can
look at the delta between the VSYS output and the VSYS node that's
connected to the BFET as well as look at the egress current from the
auxiliary charger and the current entering the battery.
This commit adds this system resistance measurements and enables it
for the RAA489000. The resistances are updated in S5/G3 when charging
from the auxiliary charger every ~2.4s.
BUG=b:148980020
BRANCH=None
TEST=Build and flash waddledoo, verify that charging continues to work
in all power states and battery can become full.
TEST=Verify that charge current is still close to the target without
excessively exceeding it.
TEST=Verify charging in constant load via `stressapptest`.
TEST=Verify charging in bursty workload via `stressapptest` with
pauses for power spikes while monitoring charge current with a current
probe.
TEST=Verify charging works out of battery cutoff from the auxiliary
charger.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I1faa3a0b2b3d8f4fd44d72cd1f546226268df0c6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2290058
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Check the runtime charger count to verify whether secondary charger ADCs
should be pulled.
BRANCH=None
BUG=b:155963446
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I18d0c2717fd4db740f25c31a0766a0dfd3aef5aa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277835
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Remove redundancy between the OCPC header and "enum chg_id"
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I4058e2395ec1cbd50ce197775eb07d3bcfad95f3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277834
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Some charger ICs can compensate VSYS for losses across the board when
charging from an auxiliary charger in an OCPC scheme. This commit
adds that support to the common charger and OCPC framework such that
it can be leveraged.
Charger ICs which can dynamically compensate and don't need continuous
adjustments should return EC_SUCCESS as the PID won't be needed.
Other chargers should return EC_ERROR_UNIMPLEMENTED since they require
continuous adjustments.
BUG=b:147440290,b:148980016
BRANCH=None
TEST=With driver changes made for RAA48900, build and flash on
waddledoo, verify that charging from the sub board works on board revs
0 and 1.
TEST=`make -j buildall`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ie6fb27260b2d6e040dbfdc0aaa5b64b52173037c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191298
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
This commit adds the bulk of the work in getting OCPC functional.
Since the secondary charger IC cannot directly sense the current
entering the battery, with OCPC, we recruit the EC to do this work
instead.
Essentially, VSYS needs to be chosen such that we induce the desired
current in the battery while also accounting for losses in the system
between the output of the secondary charger IC and the battery.
To start, a board needs to define the following CONFIG_* option:
CONFIG_OCPC_DEF_RBATT_MOHMS
This should be at least the R_ds(on) resistance of the BFET and the
series sense resistance. The board should also define CONFIG_OCPC.
With the combined system resistance, we can calculate the VSYS
required to induce the desired current. However, we will also use a
PID control loop to help drive our VSYS target to what it should
actually be accounting for our error.
The PID constants were found by tuning on a waddledoo board. It
remains to be seen whether or not these will differ on a board to
board basis.
BUG=b:148980016,b:147440290
BRANCH=None
TEST=Enable on waddledoo, verify that we can charge the battery from
the sub-board.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Icd323546836fe41fa1fcc7c3b6071d822663ed05
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2135964
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
|