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* coil: spi_nor spi_master->spi_controllerMary Ruthven2021-01-101-18/+20
| | | | | | | | | | BUG=b:175244613 TEST=make buildall -j Change-Id: Ia35d0f2c7bf995eae58dfb255167481ec823af58 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2615119 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* Fix smart erase.Barry Twycross2019-11-271-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Smart erase is used by the haven private-CR51 firmware, I don't know if other projects use it. Smart erase attempts to speed up erase by checking if the block to be erased is all ff's, and only erasing it if there is content (not ff's). The bug is that after erasing a block, the code does not wait for completion of the erase before reading ahead to see if the next block is already erased (all ff's). This is contrary to the spec where the only valid operation is a check of the status after issuing the erase. On some eeproms, with some timings, this causes the smart erase to give a flase positive erased block detection. Ie, the eeprom reads back al ff's while it's busy doing the erase. The upshot is that only the first non erased block is erased, and the rest of the eeprom is left untouched. The code before smart erase looked like: do wait for not busy erase block until all erased wait for not busy Smart erase was added by inserting the check for erased at the top of the loop. If instead, it's moved down below the wait for not busy, everything works fine. (Or, the wait for not busy is moved back to top of the loop.) This is the fix used here. TEST= Run without and with patch on a Starcard. Without patch not all of the targeted flash is erased. With patch, all of the targeted flash is erased. BUG=b:144868388 BRANCH=barryt/smart Signed-off-by: barryt@google.com Change-Id: I679ad4d21c3c353252646394f5631abc42782ded Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1931466 Reviewed-by: Jeff Andersen <jeffandersen@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Barry Twycross <barryt@google.com> Commit-Queue: Barry Twycross <barryt@google.com> Tested-by: Barry Twycross <barryt@google.com> Auto-Submit: Barry Twycross <barryt@google.com>
* Add the functions to read and write EAR.Pai Peng2019-07-171-23/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | EAR (extended address register) is used to access addresses above 16MiB when 3-byte address mode is used. These two functions allow to write to and read from EAR to set up what addresses to access in 3-byte mode. For example, for a 64MiB EEPROM: EAR value Addresses to access 0 0x0000000 - 0x0FFFFFF 1 0x1000000 - 0x1FFFFFF 2 0x2000000 - 0x2FFFFFF 3 0x3000000 - 0x3FFFFFF BUG=b:132252340 BRANCH=none TEST=manual Testing: 1. Writing to EAR returns successfully. 2. Writing different values to EAR, verify that accessing EERPOM in 3-byte mode is to the correct address, e.g., when EAR=2, accessing 0x0FFFFFF is actually to 0x2FFFFFF. Change-Id: I2a8bde7fc4b9069afc80a81042fb47359bffa015 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1688150 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Pai Peng <paipeng@google.com> Commit-Queue: Pai Peng <paipeng@google.com>
* common/spi_nor: Differential erase supportNadim Taha2017-02-091-45/+100
| | | | | | | | | | | | | | | | | | | | If CONFIG_SPI_NOR_SMART_ERASE is defined will read the sector/block to be erased first and only initiate the erase operation if not already in an erased state. The read operation (performed in CONFIG_SPI_NOR_MAX_READ_SIZE chunks) is aborted early if a non "0xff" byte is encountered. Reduced erase time of a mostly erased EEPROM from 44s to 20s (16MB Winbond part) / 1m22s to 40s (32MB Macronix part) @24MHz. BUG=None BRANCH=None TEST=Built all targets. Successfully flashed various EEPROM images. Change-Id: I369b1fcf72140663b8dbce5a469ebad27f7571ec Signed-off-by: Nadim Taha <ntaha@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/437988 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* spi_nor.c: Initialize variables to fix GCC warningsMartin Roth2016-12-161-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Looking at these warnings, none of these are real issues, so just initialize the variables to make GCC happy. There might be a way to rewrite the functions to make GCC be less confused, but I haven't figured it out yet, and the solutions I tried generally ended up increasing the binary size. The function spi_nor_read_jedec_id() will initialize the variables or return an error, so there isn't a path where they would be used without initialization. common/spi_nor.c: In function 'command_spi_nor_info': common/spi_nor.c:771:3: error: 'mfn_id' may be used uninitialized in this function [-Werror=maybe-uninitialized] common/spi_nor.c:771:3: error: 'mfn_bank' may be used uninitialized in this function [-Werror=maybe-uninitialized] The function spi_nor_device_discover_sfdp_page_size() will either set these variables or return an error, so these should never actually be uninitialized when they get used. common/spi_nor.c: In function 'spi_nor_init': common/spi_nor.c:449:30: error: 'capacity' may be used uninitialized in this function [-Werror=maybe-uninitialized] common/spi_nor.c:450:31: error: 'page_size' may be used uninitialized in this function [-Werror=maybe-uninitialized] This does not change the size of any ec.*.flat file. BRANCH=none BUG=none TEST=build succeeds under GCC 4.9.2, 5.3, and 6.2 Change-Id: I6bbe73b4acf3dcbbaa03d9cbf1dcdfeb883c0a6d Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/403503 Reviewed-by: Shawn N <shawnn@chromium.org>
* common/spi_nor: Adds RDID and 64KiB erase supportNadim Taha2016-12-071-8/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modified the SPI NOR flash driver to implement and expose a read JEDEC ID command as well as support block (64KiB) erase operations. BUG=None BRANCH=None TEST=Built all targets. Tested on two different EEPROMs. Before: ------------------------------------------- $ ~/haven_updater$ ./read_jedec_ftdi [+] JEDEC_ID=0x1940ef $ ~/haven_updater$ time ./chip_erase_ftdi [+] Success! real 4m0.440s user 0m6.674s sys 0m11.998s ------------------------------------------- $ ~/haven_updater$ ./read_jedec_ftdi [+] JEDEC_ID=0xc21a20c2 $ ~/haven_updater$ time ./chip_erase_ftdi [+] Success! real 5m57.291s user 0m9.964s sys 0m18.363s ------------------------------------------- After: ------------------------------------------- $ ~/haven_updater$ ./read_jedec_ftdi [+] JEDEC_ID=0x1940ef $ ~/haven_updater$ time ./chip_erase_ftdi [+] Success! real 1m33.176s user 0m2.327s sys 0m5.050s ------------------------------------------- $ ~/haven_updater$ ./read_jedec_ftdi [+] JEDEC_ID=0xc21a20c2 $ ~/haven_updater$ time ./chip_erase_ftdi [+] Success! real 2m41.923s user 0m4.191s sys 0m8.576s ------------------------------------------- Change-Id: Ic20372ca9966499977a52a700d6492d3f648d7b2 Signed-off-by: Nadim Taha <ntaha@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/416903 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* Fix various misspellings in commentsMartin Roth2016-11-151-2/+2
| | | | | | | | | | | | | No functional changes. BUG=none BRANCH=none TEST=make buildall passes Change-Id: Ie852feb8e3951975d99dce5a49c17f5f0e8bc791 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/403417 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
* common/spi_nor.c: Don't update capacity or page_size after errorMartin Roth2016-09-011-11/+14
| | | | | | | | | | | | | | | If there was an error getting the capacity or page size, don't update the values with an incorrect/unknown/uninitialized value. BUG=None BRANCH=None TEST=Build all boards successfully. Change-Id: I907f14f219f721ec9e9753a38e4bf998bbc16324 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/370665 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Ewout van Bekkum <ewout@chromium.org>
* cleanup: DECLARE_CONSOLE_COMMAND only needs 4 argsBill Richardson2016-08-241-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since pretty much always, we've declared console commands to take a "longhelp" argument with detailed explanations of what the command does. But since almost as long, we've never actually used that argument for anything - we just silently throw it away in the macro. There's only one command (usbchargemode) that even thinks it defines that argument. We're never going to use this, let's just get rid of it. BUG=none BRANCH=none CQ-DEPEND=CL:*279060 CQ-DEPEND=CL:*279158 CQ-DEPEND=CL:*279037 TEST=make buildall; tested on Cr50 hardware Everything builds. Since we never used this arg anyway, there had better not be any difference in the result. Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/374163 Reviewed-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common: Adds a JEDEC SFDP v1.* based Serial NOR Flash driverEwout van Bekkum2016-01-281-0/+938
Adds a JEDEC SFDP v1.* compatible Serial NOR Flash driver to control multiple Serial NOR Flash devices (NOR EEPROMs, etc.). The SFDP tables are used to discover parts' page sizes and capacities. This driver only supports parts with capacities under 4GiB. If the parts are larger than 16MiB, then the 0xB7 4-Byte addressing mode entry opcode and 0xE9 4-Byte addressing mode exit opcode are required. This driver also assumes that a 4KiB erase opcode of 0x20 is always available. BRANCH=none BUG=none TEST=Tested on cr51 with multiple EEPROMs with various SFDP revs Change-Id: I5c2b757267e23c4f22ac89c6d5048a54b04de0c3 Signed-off-by: Ewout van Bekkum <ewout@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/321922 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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