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* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-1/+2
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* system.c: reset statics for testingCaveh Jalali2019-10-311-0/+7
| | | | | | | | | | | | | | | | | | | | this adds a function to reset the state information generated by system_common_pre_init() for testing scenarios that need to call it multiple times. on the EC, main memory (.data + .bss) is reinitialized across sysjumps, so this happens automatically, but we can't really do that from unit tests. so, add a function to reset the relevant static variables to emulate main memory getting reinitialized. BRANCH=none BUG=b:142031466 TEST=make buildall passes Change-Id: I1f65902c21ab6fc17c32388795cfef19c84d8cc8 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1855644 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* system.c: move jump_data declarations into sysjump.hCaveh Jalali2019-10-231-29/+1
| | | | | | | | | | | | | | | this moves the jump_data related declarations out of system.c into a dedicated sysjump_impl.h header file. this will make it possible to implement unit tests for sysjump. BRANCH=none BUG=b:142031466 TEST=make buildall passes Change-Id: I7df3d24e1f9c0f203656ee8dddc234b64e2dc8c3 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1855647 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Remove uses of %lEvan Green2019-10-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | | This change removes uses of %l from the EC side of the EC codebase. This is done because the semantics of %l within printf have changed, and there are concerns that new calls to printf will be cherry-picked into old firmware branches without the printf changes. So, in preparation for disallowing %l in master, remove occurrences of %l. This change was done by manually fixing up anything found under the EC directory with the following regex: %[0-9*.-]*l[^l] Remember that anything on the host machine is fine as-is, since the host printf never changed. BUG=chromium:984041 TEST=make -j buildall BRANCH=None Change-Id: I2a97433ddab5bfb8a6031ca4ff1d3905289444e2 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834603 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* printf: Fix formatting errorsEvan Green2019-10-051-2/+3
| | | | | | | | | | | | | | | | | | | This change fixes the printf formatting errors found by the compile-time prinf format checker. The errors fall into a few categories: 1. Incorrect size specifier (missing or extra l). 2. Missing or extra arguments. 3. Bad line splitting. BUG=chromium:984041 TEST=make -j buildall BRANCH=none Change-Id: I5618097a581210b9fcbfc81560dec050ae30b61c Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819653 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* host_command: Change host command return value to enum ec_statusTom Hughes2019-10-021-9/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the host command handler callback function returns an int, it's easy to accidentally mix up the enum ec_error_list and enum ec_status types. The host commands always expect an enum ec_status type, so we change the return value to be of that explicit type. Compilation will then fail if you accidentally try to return an enum ec_error_list value. Ran the following commands and then manually fixed up a few remaining instances that were not caught: git grep --name-only 'static int .*(struct host_cmd_handler_args \*args)' |\ xargs sed -i 's#static int \(.*\)(struct host_cmd_handler_args \*args)#\ static enum ec_status \1(struct host_cmd_handler_args \*args)##' git grep --name-only 'int .*(struct host_cmd_handler_args \*args)' |\ xargs sed -i 's#int \(.*\)(struct host_cmd_handler_args \*args)#\ enum ec_status \1(struct host_cmd_handler_args \*args)##' BRANCH=none BUG=chromium:1004831 TEST=make buildall -j Cq-Depend: chrome-internal:1872675 Change-Id: Id93df9387ac53d016a1594dba86c6642babbfd1e Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816865 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* version: Make ver_get_num_commits work for on-flash imagesDaisuke Nojiri2019-09-211-2/+1
| | | | | | | | | | | | | | | | | | | | | | EFS needs to check whether a RW version on flash is equal to or newer for rollback protection before jumping to a RW copy. Currently, ver_get_numcommits works only for the running image. This makes it work for images on flash as well. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:998135 BRANCH=none TEST=Boot Nami. Verify version numbers are read from RAM and flash. Change-Id: I94475e40f89dc4c3173d83cb1d9d4ad38d6fab79 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1450816 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* include: Move RESET_FLAG_* into ec_commands.h as EC_RESET_FLAG_*You-Cheng Syu2019-08-261-8/+9
| | | | | | | | | | | | | | | | | | | | | | | RESET_FLAGS_* are used when setting/reading the field ec_reset_flags of struct ec_response_uptime_info, which is defined in ec_commands.h. So it might be better to put those macros there. To be consistent with the other macros in the file, add "EC_" prefixes to them. BUG=b:109900671,b:118654976 BRANCH=none TEST=make buildall -j Cq-Depend: chrome-internal:1054910, chrome-internal:1054911, chrome-internal:1045539 Change-Id: If72ec25f1b34d8d46b74479fb4cd09252102aafa Signed-off-by: You-Cheng Syu <youcheng@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1520574 Tested-by: Yu-Ping Wu <yupingso@chromium.org> Commit-Ready: Yu-Ping Wu <yupingso@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cleanup: use STATIC_IF for hibernate variablesJack Rosenthal2019-08-201-12/+14
| | | | | | | | | | | | | | | | This is an example usage of STATIC_IF, as a child CL of the STATIC_IF implementation. BUG=chromium:989786 BRANCH=none TEST=buildall Change-Id: I1e69bf85a3daf8aa5f5c0e0b1da9808a8a5f8649 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1731972 Reviewed-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Raul E Rangel <rrangel@chromium.org>
* common/system: refactor some confusing ifdefsJack Rosenthal2019-07-311-24/+21
| | | | | | | | | | | | | | | | | I had a hard time reading this section, so figured I may as well rewrite it to use IS_ENABLED while I was here. Gave CONFIG_{RO,RW}_HEAD_ROOM a default value of zero here, which makes the math work out for boards without it anyway. BUG=none BRANCH=none TEST=buildall Change-Id: I87dc2d73838c350088916b57aa51d5f368c5592f Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1727570 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* cleanup: remove CONFIG_REPLACE_LOADER_WITH_BSS_SLOWJack Rosenthal2019-07-311-32/+0
| | | | | | | | | | | | | | | | | | This option was only used with kunimitsu, which was removed from the EC codebase a long time ago. The EC code won't even compile with this option enabled anymore. Remove it! BUG=chromium:989301 BRANCH=none TEST=buildall Change-Id: I8ede226ec1e7b300ded6bb1769d82e142db1b0aa Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1727569 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: board_[read/write]_serial weak reference cleanupDenis Brockus2019-06-031-22/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | board_read_serial and board_write_serial were prototyped as weak and this made all instances, that included that prototype, weak as well. In order to not lose information from the prototype, default and override functions, I changed to use the override weak marker symbols. These functions defaulted for specific configurations as different functionality and used an #ifdef tree to do this. I made these a single definition for each function and used IS_ENABLED instead of the #ifdef tree. I also added a definition for the case that the configuration would not have produced a function. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Ie41c53f3a17d665358e46eefd3ded3066ee80a7d Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1631583 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* common/i2c_master: Add a subcommand to protect all TCPC portsKarthikeyan Ramasubramanian2019-05-301-31/+0
| | | | | | | | | | | | | | | | | | | | | | | | Currently the I2C tunnels of all TCPC ports are protected implicitly when the system jump is disabled. Depthcharge issues that command after the EC jumps to RW and before the TCPC firmware update is applied. This leads to failure while updating the TCPC firmware and hence a reboot loop. Fix this behavior by adding a sub-command to protect all the I2C tunnels so that depthcharge can issue that command after both EC SW Sync and TCPC Firmware update are done. BUG=b:129545729 BRANCH=None TEST=make -j buildall; Boot to ChromeOS. Force a TCPC FW update and ensure that the reboot loop does not happen. Change-Id: I5dd2314cf82dcfff520dc32ce3ced232326ab3d5 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/1605260 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* USB-PD: Consolidate tcpc_config declarations in usb_pd_tcpm.hDaisuke Nojiri2019-05-211-1/+0
| | | | | | | | | | | | | | | | | | Currently, tcpc_config is declared in two places. This patch consolidates declarations in usb_pd_tcpm.h. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: I4f30d06b1eaeb6a83b664de76116d85d65a9fc97 Reviewed-on: https://chromium-review.googlesource.com/1616007 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* kukui_scp: Enable MPU to protect code RAM and data RAM in RW image.Yilun Lin2019-05-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | kukui_scp is loaded into SRAM. We would like to protect the memory from a modified code RAM content and executing injected code in data RAM. BRANCH=None BUG=b:123269246 TEST=Apply MPU test patch https://crrev.com/c/1530265. Test data ram XN: 1. mpu 0 # disable MPU 2. mpu_test # see it prints 3. mpu 1 # enable MPU 4. mpu_test # memory access violation, and reset. 5. mpu_test # memory access violation, and reset # again. (MPU enabled by default) Test code ram RO: 1. rw 0x8 0x5566 # Write to code RAM and see memory # access violation and reset. 2. mpu 0 # disable MPU 3. rw 0x8 0x5566 # Nothing happended 4. rw 0x8 # Read 0x5566 5. mpu 1 # enable MPU 6. rw 0x8 0x5566 # memory access violation. Change-Id: I6af5029d8c55d795543d4759b2c9168a06eb9ff1 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1530264 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* Common: move for loop initial declarationDiana Z2019-04-181-2/+6
| | | | | | | | | | | | | | | While builds on cros/master allow variables to be initially declared in for loop statements, builds on firmware branches (ex. octopus) may not. BUG=None BRANCH=octopus TEST=builds on master, builds picked to octopus branch Change-Id: I450d8c564b508a5f51a7784ce67b0664ab97d8ba Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1570609 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* util/ectool, common/system: Share sysmbol reset_flag_desc.Yilun Lin2019-04-181-10/+10
| | | | | | | | | | | | | | | | | There were two symbols reset_flag_desc and reset_flag_strings used in two separated places: host binary ectool and device. This CL combines these two symbols to reduce maintance efforts. TEST=make buildall -j BRANCH=None BUG=None Change-Id: I3b5731ab08804f46629d6e43466dce963bd86a69 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1514395 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* USB PD: Re-discover port partner when a contract was in placeDiana Z2019-04-181-0/+5
| | | | | | | | | | | | | | | | | | | | | | When the pd_task starts up with an explicit contract previously in place, re-check the partner's identity. This will happen automatically when we EC reset into RO since pd_chipset_startup sets the flag, but for a RO->RW jump the flag needs to be set again. Additionally, exit DP modes before sysjumping, in order to not confuse the port partner with a second enter mode when it had previously been in that mode. BUG=b:125552060 BRANCH=octopus TEST=on unlocked octopus board, plugged in powered HDMI dongle from hibernate state and confirmed display worked after RO->RW jump. Also turned off software sync and confirmed console "sysjump" worked. Change-Id: Idcde6f04deeb8f409a9b4d0a4b3fc924bdb644c7 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1506434 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* USB PD: Suspend ports when resetting TCPCs during cold rebootDiana Z2019-04-151-1/+9
| | | | | | | | | | | | | | | | | | | Currently, when EC cold reboots run, they reset the board's TCPC chips, but do not communicate this fact to the PD tasks. This may lead to the PD tasks reading register values with are incorrect or not yet initialized. Before resetting the TCPCs, put each port into suspend to prevent this. BUG=b:129092057 BRANCH=octopus TEST=Ran several EC resets as well as EC cold reboots with source and sink partners, verified we successfully maintained connection with the port partner without hitting contract disagreements Change-Id: I6d509c4c6b22400b6250e2740e7927be92373802 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1538751 Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-1/+1
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* clock: define the function clock_enable_module to all EC chipsCHLin2019-03-131-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | The API clock_enable_module(MODULE_FAST_CPU, x) allows common layer code to set the CPU frequency to turbo or normal when it is needed. However, not all of the EC chips support/implement the function. It causes build error if this function is added to the common codes which most of EC chips will use (EX: vboot_hash.) This CL fixes this issue by defining the function as weak by default. This CL also implements the clock_enable_module function for NPCX7 chip. BRANCH=none BUG=b:77608104 TEST=pass "make buildall" TEST=on npcx7_evb/yorp, with follow-up CL, check that security computation becomes faster and the clock goes back to normal frequency after the computation finishes. Change-Id: I731fb38f5fc1a4efa5fb331a59f8c3e2803ca30a Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1475097 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* i2c_master: Protect TCPC I2C tunnels as part of EC_REBOOT_DISABLE_JUMPKarthikeyan Ramasubramanian2019-01-081-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | Currently EC keeps the I2C tunnels open enabling depthcharge to perform firmware update on those ports. Once the firmware update is done, depthcharge triggers a command to protect the I2C tunnels. But not all TCPC ports are registered for firmware update in depthcharge. This causes some I2C tunnels to be left unprotected. Update EC to protect all the TCPC I2C tunnels when depthcharge invokes EC_REBOOT_DISABLE_JUMP command. This usually happens when the EC software sync is complete and the control jumps to OS. Also protect the TCPC I2C tunnels only when the WP is enabled. BUG=b:119130829 BRANCH=octopus TEST=make -j buildall && Boot to ChromeOS and ensure that the TCPC I2C tunnels are protected. Change-Id: Ice681038bbf725b3aa44b13ff71724937c6045e9 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/1390944 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* system: Make system_can_boot_ap return true for AC-only systemsDaisuke Nojiri2018-12-191-16/+14
| | | | | | | | | | | | | | | | | | This patch makes system_can_boot_ap return true for systems which can be powered only by a fixed AC power (e.g. barrel jack AC adapter). Such systems do not need to check a battery percentage or AC power. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: Icd59b508e944c43253d416da78d0f1a87fedb13d Reviewed-on: https://chromium-review.googlesource.com/1301935 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* system: Remember if reset was due to AP watchdog triggeringNicolas Boichat2018-10-291-1/+1
| | | | | | | | | | | | | | | | | On MT8183, when EC detects a watchdog reset, EC needs to reboot itself in preparation for the next boot. This means that AP loses the reset cause (as AP system reset is toggled), and, therefore, we need to save the reset reason in the EC. BRANCH=none BUG=b:109900671 TEST=apshutdown, powerb, see that reset reason is: reset-pin TEST=Use test-wd from bug. Reset reason: reset-pin ap-watchdog Change-Id: I2e30306db5727a22de930f00dc30de40b9695bef Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1295890 Reviewed-by: Jett Rink <jettrink@chromium.org>
* system: Make hibernate console command invoke chipset task if chipset is onFurquan Shaikh2018-08-291-2/+21
| | | | | | | | | | | | | | | | | | | | | Instead of calling system_hibernate directly from hibernate console command, set reboot_at_shutdown and trigger chipset_force_shutdown if chipset is not already off. This allows hibernate to go through the chipset task to allow it to put power rails into proper state before EC hibernates. If chipset is already off, then system_hibernate would be called directly. BUG=b:113132913 BRANCH=None TEST=Verified that system_hibernate is called from chipset task if chipset is up. Change-Id: Id3b4d8597f536c4854714f79bd5bd077a826ad22 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1188517 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* test: host_command_fuzz: fuzzing testNicolas Boichat2018-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Writing fuzzing tests is a little tricky, as clang takes over the main function. Instead, we start the test main function in a thread, and have LLVMFuzzerTestOneInput prepare the host command buffer, and wake the TEST_RUNNER task. To make fuzzing faster, we only send somehow correctly formed requests, with a valid checksum and length (this can be disabled with an option). We also make sure that the emulator does not hibernate, reboot or jump to a different image when fuzzing is enabled. BRANCH=none BUG=chromium:854975 TEST=make buildfuzztests -j ASAN_OPTIONS="log_path=stderr" \ build/host/host_command_fuzz/host_command_fuzz.exe -timeout=5 Change-Id: I27b25e44c405f118dfc1296247479245e15e54b4 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1107523 Reviewed-by: Manoj Gupta <manojgupta@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Jonathan Metzman <metzman@chromium.org>
* ec/google: Add command to fetch keyboard ID from ECparis_yeh2018-06-201-0/+16
| | | | | | | | | | | | | | | | | Sort k-prefix host commands and descriptions in alphabetical order BRANCH=master BUG=b:80168723 TEST=Check 'ectool kbid' on a reworked DUT using keyboard samples Change-Id: If2ad654e5ef269d03365db7c3286c2281aa9d9ef Signed-off-by: paris_yeh <pyeh@google.com> Reviewed-on: https://chromium-review.googlesource.com/1097997 Commit-Ready: Paris Yeh <pyeh@chromium.org> Tested-by: Paris Yeh <pyeh@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Paris Yeh <pyeh@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* system: Enable/Disable low power idle in run timePhilip Chen2018-05-301-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | We have enable_sleep()/disable_sleep() to enable/disable EC deep sleep mode in runtime. Here we introduce similar interfaces to enable/disable EC idle (sleep) mode. BUG=b:78792296 BRANCH=scarlet TEST=Confirm idle mode is enabled/disabled when enable_idle() and disable_idle() are called. Change-Id: I2484f08a066523441064968da99c47de9342ecf0 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1072370 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> (cherry picked from commit c6b6626cdccef04b0ff203aaed0d84dbdcecf8b7) Reviewed-on: https://chromium-review.googlesource.com/1076708 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* cr50: include sleepmask in all imagesMary Ruthven2018-05-181-4/+5
| | | | | | | | | | | | | | | | | | sleepmask is really useful for debugging sleep issues. Add a read only version of sleepmask to non-DBG images. It will only be accessible once the console is unlocked. BUG=none BRANCH=cr50 TEST=make sure sleepmask can be modified in DBG images and can only be read in prod images. Change-Id: I31ef966f6302d4a7602a014cb08c9b972d13f41e Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1062804 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* system: update board version to return an error if encounteredJett Rink2018-04-191-16/+39
| | | | | | | | | | | | | | | | | | | | Now that board version can come from CBI, we can have a real error reading it. We should pass that error to the console or to the AP on the host command and let the AP firmware (or user) decided how to handle that error case Also update the CONFIG_BOARD_VERSION to be derived instead of needed in most cases. BRANCH=none BUG=b:77972120 TEST=Error reported on EC console and AP console when CBI is invalid on yorp Change-Id: Ib8d80f610ea226265a61e68b61965150cdc9bb04 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1015776 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* chgstv2: Check charger power in prevent_power_on.Aseda Aboagye2018-04-101-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | charge_prevent_power_on() had sections which were gated on the following CONFIG_* option: CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT However, the block of code that this gated didn't even take the battery percentage into account and made it very confusing as to why. This commit simply changes the CONFIG_* option used to gate to be the following: CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON This better reflects the checks that were actually being made. Additionally, this CONFIG_* option is defined by default for boards that have a chipset task and is initialized to 15W, which is the power that indicates that the charger is likely to speak USB PD. BUG=b:76174140 BRANCH=None TEST=make -j buildall Change-Id: Ic9158dd7109ce6082c6d00157ff266842363b295 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/977431 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* system: Log PC and task id on watchdogPhilip Chen2017-12-111-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | For debug, in common code let's log the watchdog PC and task id as our SW panic params. BUG=chromium:790006 BRANCH=none TEST=manually test scarlet rev2 from a1-a3, b1-b2: (a1) Add 'while(1);' in button ISR (a2) Boot and press the button (a3) When watchdog is triggeried, check with 'panicinfo' that saved R5 is the PC for button ISR. (b1) 'crash watchdog' in EC console (b2) Check with 'panicinfo' that CONSOLE task id is saved in EXCEPTION and PC is saved in R5. Change-Id: I64d2fcf594dd24b0951e002ab8e80ebcac2d1def Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/803618 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* system: Allow hibernate to clear AP_OFF flagDaisuke Nojiri2017-12-051-0/+7
| | | | | | | | | | | | | | | | | | | After firmware update, cr50 toggles the EC's reset line, expecting the system will boot. This isn't the case for Chromebox because it sets AP_OFF flag on a clean shutdown (to restore the previous power state after power loss & restore). This patch adds EC_REBOOT_HIBERNATE_CLEAR_AP_OFF to EC reboot command. It makes EC first clear AP_OFF then hibernate. BUG=b:69721737 BRANCH=none TEST=Verify Fizz reboot after cr50 update. Change-Id: If3207d7284f244ca1adf0d516ef744dbc739a9c1 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/802632 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* system: Add wait-ext option to ec reboot commandScott Collyer2017-11-151-2/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | EC_IN_RW signal is used to determine if the switch to dev mode can be safely made. However, EC_IN_RW needs the EC_RST_L line driven low in order to be reset. In faft tests that utilize crosEcSoftrecPower method, EC_RST_L is not being driven by servo to fix other test failures related to keeping EC and AC reboots in sync. This CL adds a new argument 'wait-ext' to the EC reboot command. When this option is used, instead of the EC generating a reset via it's system watchdog, it will wait 10 seconds for EC_RST_L to be driven. BUG=b:64603944 BRANCH=coral CQ-DEPEND=I086687c3dd7591460099267880d56ab8265d2e4b TEST=Ran "/usr/bin/test_that --board=coral <ip addr> firmware_DevMode" mutliple times and verified that it passes. Previoulsy, this test always fails when the EC is in RW before it starts. Also tested platform_ServoPowerStateController_USBPluggedin and verified it passed. Change-Id: I614f9156066d5719601ee43e29c7a064f9bba6e2 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/737524 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cortex-m: mpu: Support unaligned regions and protect code RAMShawn Nematbakhsh2017-11-141-11/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support protection of regions that aren't aligned to a power of 2 by using two MPU entries, and taking advantage of the sub-region feature. Also protect code RAM from being overwritten, on parts that use external storage. BUG=chromium:782244 BRANCH=None TEST=On kevin, call: mpu_protect_data_ram(); mpu_protect_code_ram(); mpu_enable(); Verify that first call results in the following update_region params: addr: 0x200c2000 size: 0xc01d Decoded: Protect 24K region Verify that second call results in the following params: addr: 0x100a8000 size: 0xc021 Decoded: Protect 96K region addr: 0x100c0000 size: 0xf01b Decoded: Protect remaining 8K region Also verify that writes to beginning and end of code ram region trigger data access violation after enabling protection. Also verify that sysjump fails. Change-Id: Ieb7a4ec3a089e8a2d29f231e1e3acf2e78e560a1 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/757721 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* EFS: Sysjump to active copyDaisuke Nojiri2017-10-171-1/+1
| | | | | | | | | | | | | In EFS, EC needs to sysjump to the active copy, which is hashed and validated by the AP. BUG=b:67748602 BRANCH=none TEST=Verify Depthcharge makes EC jump to RW. Change-Id: I2ca893f7691ad776a791f2044dd7a0983d06e3c5 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/717676
* EFS: Allow EC to switch slot on rebootDaisuke Nojiri2017-09-211-1/+11
| | | | | | | | | | | | | | | | | | | | | Chromebox ECs performs EFS: verifying firmware before the AP boots. This patch updates host commands which are required for the EFS. When EC_REBOOT_FLAG_SWITCH_RW_SLOT is specified, EC_CMD_REBOOT_EC changes the active slot before it reboots the system. BUG=b:65264494 BRANCH=none TEST=On Fizz, verify: 1. RW_B is old and updated by soft sync. RW_B is activated and executed after reboot. System continues to boot to OS. 2. RW_A is old and updated by soft sync. RW_A is activated and executed after reboot. System continues to boot to OS. Change-Id: I08050c985ce0b27b30cb842e6b5b4660f32e5211 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/648450 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* EFS: Switch active slot when current slot is invalidDaisuke Nojiri2017-09-211-26/+38
| | | | | | | | | | | | | | | | | | | | | | | When EFS finds the active slot is invalid, it tries the other slot. This patch makes the other slot active so that the following boots will try the other slot first. This patch also replaces enum flash_rw_slot with system_image_copy_t. The new APIs are therefore renamed from *_slot to *_copy. Basically, this makes vboot see slots as a conceptual place instead of physical spaces bound to flash storage. BUG=b:65028930 BRANCH=none TEST=On Fizz, verify: 1. RW_B is old and updated by soft sync. RW_B is activated and executed after reboot. System continues to boot to OS. 2. RW_A is old and updated by soft sync. RW_A is activated and executed after reboot. System continues to boot to OS. Change-Id: Icf97da13e651e7a931b9d507052b9422566eb16c Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/648449
* EFS: Add support for early firmware selectionDaisuke Nojiri2017-09-121-6/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chromebox ECs performs EFS: verifying firmware before the AP boots. This patch updates host commands which are required for the EFS. The change includes: * Update EC_CMD_FLASH_REGION_INFO to accept EC_FLASH_REGION_UPDATE * Update EC_CMD_VBOOT_HASH to accept EC_VBOOT_HASH_OFFSET_UPDATE When EC_FLASHS_REGION_UPDATE is specified, EC_CMD_FLASH_REGION_INFO returns the slot which currently is not hosting a running RW copy. When EC_VBOOT_HASH_OFFSET_UPDATE is specified, EC_CMD_VBOOT_HASH computs the hash of the update slot. This hash covers the entire region, including the signature at the end. This patch undefines CONFIG_CMD_USBMUX and CONFIG_CMD_TYPEC for gru to create space. BUG=b:65028930 BRANCH=none CQ-DEPEND=CL:648071 TEST=On Fizz, verify: 1. RW_B is old and updated by soft sync. RW_B is activated and executed after reboot. System continues to boot to OS. 2. RW_A is old and updated by soft sync. RW_A is activated and executed after reboot. System continues to boot to OS. Change-Id: I9ece907b764d07ce94054ba27996e048c665a80a Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/648448
* common: add host command to push AP SKU ID to ecDevin Lu2017-09-111-1/+56
| | | | | | | | | | | | | add host command to set AP SKU ID to ec. BUG=b:65359225 BRANCH=reef TEST=make buildall -j Change-Id: I76ffa4485be4de996b001097fa3f5a371f3a92ce Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/650277 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Treat SYSTEM_IMAGE_RW_B also as RW copyDaisuke Nojiri2017-09-091-2/+12
| | | | | | | | | | | | | | SYSTEM_IMAGE_RW_B hasn't been globally treated as a RW copy. This change makes EC treat it also as a RW copy. BUG=none BRANCH=none TEST=make buildall Change-Id: Iae5a9090cdf30f980014daca44cdf8f2a65ea1f2 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/656337 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* coral: Add host command to fetch SKU IDPatrick Georgi2017-08-151-0/+15
| | | | | | | | | | | | | | BUG=b:64468585 BRANCH=none TEST=with the other sku-id related patches applied, coreboot obtains the right SKU ID from EC Change-Id: Ibf307c6e46152b4b09e94d8dca6d49ae863cb3ad Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/608370 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Add OTP supportGwendal Grignou2017-07-281-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One Time Programmable memory can be used to store permanent data like serial numbers. Reorganize the code to support writing serial number to OTP, in addition to pstate (if using its own memory bank) or autogenerate from unique id (hammer). + Add CONFIG_OTP to enable OTP code + Add CONFIG_SERIALNO_LEN to indicate the size of the serial number string. Currently set to 28, when USB serial number is needed. + Expose flash_read|write_pstate_serial and add otp_read|write_serail, remove more generic flash_read|write_serial. + Make board_read|write_serial generic, declared outside of USB subsystem. Priority order to read|write serial string: - board definition (like hammer) - pstate location, if stored in its private memory bank - otp area If none of these methods are available, a compilation error is raised. BUG=chromium:746471 BRANCH=none TEST=compile Change-Id: I3d16125a6c0f424fb30e38123e63cf074b3cb2d3 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/580289 Reviewed-by: Nick Sanders <nsanders@chromium.org>
* vboot: Jump to RW earlyDaisuke Nojiri2017-07-141-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change makes EC run vboot in the HOOK task. The vboot routine requires battery and charger info. It waits in a deferred call loop until the charge manager is initialized. BUG=b:63586051 BRANCH=none TEST=Verify the following cases: A. Hardware reboot (type-c/BJ) 1. Unplug AC in S0 then plug in AC: BOOT/BOOT 2. Unplug AC in S5 then plug in AC: S5/S5 3. Unplug AC after A.2 then plug in AC: S5/S5 4. Press PB in S5: BOOT/BOOT B. Software reboot (type-c/BJ) 1. Run EC reboot command in S0: BOOT/BOOT 2. Run EC reboot command in S5: BOOT/BOOT 3. Run EC reboot ap-off command in S0: S5/S5 4. Run EC reboot ap-off command in S5: S5/S5 5. Run host reboot command: BOOT/BOOT 6. Run host shutdown command: S5/S5 C. Recovery tests 1. Press RB and PB in S0: FAIL(*1)/PASS 2. Press RB and PB in S5: FAIL(*1)/PASS(*2) 3. Unplug AC in S0 then press RB and plug in AC: PASS/PASS 4. Unplug AC in S5 then press RB and plug in AC: PASS(*2)/PASS(*2) *1: b:63668669 *2: b:63669512. Requires one more PB press. Change-Id: I28f37fdad7f83d0d44570b9003e8c6a4b83b832f Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/568699 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* system: Allow sysjump command to jump to RW_BDaisuke Nojiri2017-07-051-3/+8
| | | | | | | | | | | | | | This patch also removes an extra newline character from the printf in system_can_boot_ap. BUG=none BRANCH=none TEST=make buildall Change-Id: I4143a687e0643328583ebf6cb14fc303da7f6a40 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/558211 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Add system_can_boot_ap APIDaisuke Nojiri2017-06-191-0/+30
| | | | | | | | | | | | | This API checks battery charge level and current power supply to determine whether the AP has enough power to boot or not. BUG=b:38462249 BRANCH=none TEST=make buildall Change-Id: I489f7ea92f230701b8f18c94d3e698aad90b4a03 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/517272
* g: show RW headers' Board ID fields in 'version' outputVadim Bendebury2017-06-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The contents of the board ID fields of the Cr50 image headers is an important piece of information which determines if an image can run on a particular H1 chip. This patch adds this information to the output of the 'version' command, printing both the contents of the fields of the RW images and if the image would run with the current INFO1 board ID contents (Yes or NO). The board_id feature is in fact g chipset specific, this is why board_id support files are being moved from the cr50 board scope to the g chip scope. BRANCH=cr50 BUG=b:35587387,b:35587053 TEST=observed expected output in the version command: > bid Board ID: 000000fa, flags 000000ff > vers Chip: g cr50 B2-C Board: 0 RO_A: * 0.0.10/29d77172 RO_B: 0.0.10/c2a3f8f9 RW_A: * 0.0.20/DBG/cr50_v1.1.6542-856c3aff4 RW_B: 0.0.20/DBG/cr50_v1.1.6543-2c68a2630+ BID A: 00000000:00000000:00000000 Yes BID B: 000000ea:0000fffc:000000ff No Build: 0.0.20/DBG/cr50_v1.1.6542-856c3aff4 tpm2:v0.0.289-cb2de5a cryptoc:v0.0.8-6283eee 2017-06-09 15:34:19 vbendeb@eskimo.mtv.corp.google.com > Change-Id: I5b283abf304a7408ca8f424407044fca238185e1 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/530033 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Revert "system: Shutdown AP before entering hibernate mode"Duncan Laurie2017-04-211-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 20c439be209a9cc0bb949ad21f289c453126395f. Reason for revert: This breaks hibernate on skylake boards and needs to be tested on more than just kevin before submitting. BUG=chromium:702451 BRANCH=none TEST=power down and successfully hibernate on Eve Original change's description: > system: Shutdown AP before entering hibernate mode > > BUG=chromium:702451 > BRANCH=none > TEST=manually test on gru: confirm > 'Alt+VolUp+h' puts gru in hibernate mode and > AC plug-in wakes it up. > > Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096 > Reviewed-on: https://chromium-review.googlesource.com/470787 > Commit-Ready: Philip Chen <philipchen@chromium.org> > Tested-by: Philip Chen <philipchen@chromium.org> > Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> > TBR=rspangler@chromium.org,aaboagye@chromium.org,philipchen@chromium.org # Not skipping CQ checks because original CL landed > 1 day ago. BUG=chromium:702451 Change-Id: Ie847a5e3efb28256b00ddc6534d8ae6bbbba7121 Reviewed-on: https://chromium-review.googlesource.com/482989 Commit-Ready: Duncan Laurie <dlaurie@chromium.org> Tested-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* system: Shutdown AP before entering hibernate modePhilip Chen2017-04-141-0/+18
| | | | | | | | | | | | | | BUG=chromium:702451 BRANCH=none TEST=manually test on gru: confirm 'Alt+VolUp+h' puts gru in hibernate mode and AC plug-in wakes it up. Change-Id: I3e1134b866dea5d3cc61f9b3dad31c3ff0bd9096 Reviewed-on: https://chromium-review.googlesource.com/470787 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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