| Commit message (Collapse) | Author | Age | Files | Lines |
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If the port partner is not PD 3.0 or higher, do not consider it to
support USB4/Enter_USB. If the AP requests USB4 entry, disregard the
request and consider mode entry complete. Avoid repeatedly sending
Enter_USB to a PD 2.0 partner.
BUG=b:279421317
TEST=twister -s drivers/drivers.usbc_usb4_mode
Change-Id: I3e82738f816e6dd5af24d627b6cd971a34d74586
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4533369
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
Tested-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Jameson Thies <jthies@google.com>
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Sort all includes in common with the clang-format rules used by
the zephyr project.
BRANCH=None
BUG=b:247100970
TEST=zmake build -a
TEST=./twister --clobber -v -i
TEST=make -j72 buildall_only runtests
TEST=zmake compare-builds -a
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I70c2ed7bb2ce50c968f3e2dbdc274de3a455129a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4049889
Auto-Submit: Jeremy Bettis <jbettis@chromium.org>
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Tomasz Michalec <tmichalec@google.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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This CL adds a type-c state machine framework for the Device Policy
Manager (dpm) layer of USB-PD. This CL is focused just on adding the
state machine policy and minimizing any changes in the existing DPM
support functions.
Because the DPM is no longer being called directly from the PE layer,
an interlock mechanism is used to control when the DPM state machine
will take any actions.
This CL also renames include/usb_pd_dpm.h to include/usb_pd_dpm_sm.h
to be consistent with include file naming for the other TCPMv2 layer
state machine include files.
BUG=b:194504052
BRANCH=none
TEST=Verified that mode entry/exit is successful for DP, TBT, and
USB4 on Voxel.
ectool typeccontrol <port> 0 -> exit mode
ectool typeccontrol <port> 2 0 -> DP
ectool typeccontrol <port> 2 1 -> TBT
ectool typeccontrol <port> 2 2 -> USB4
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I196d342b031b96874d354610182be79eac613d00
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3922467
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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No-op refactor: Move code implementing Thunderbolt alt mode and USB4
mode from usb_pd_alt_mode_dfp.c to tbt_alt_mode.c and usb_mode.c. Guard
usages of this code so that only boards with Thunderbolt or USB4 enabled
call it.
Somewhat reduce code size and coverable lines for non-Thunderbolt,
not-USB4 boards.
LOW_COVERAGE_REASON=This commit only moves existing code. The bulk of
the uncovered delta supports USB4 entry. b:236868055 blocks coverage of
this code.
BUG=b:244467636
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I5aaa60d276c7b44305a238bbfba30cf092063564
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3887967
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Normally we don't do this, but enough changes have accumulated that
we're doing a tree-wide one-off update of the name & style.
BRANCH=none
BUG=chromium:1098010
TEST=`repo upload` works
Change-Id: Icd3a1723c20595356af83d190b2c6a9078b3013b
Signed-off-by: Mike Frysinger <vapier@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3891203
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I652cada425489a8b03ea95cd568ed2dc1ff337b5
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3729783
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Abstract the TCPM control logic to support various combinations
of TCPC chips that support built in PPC and OCP.
BUG=none
BRANCH=none
TEST=make buildall -j, zmake testall
Change-Id: I614797829d1d8f230439a70c1822c918f9fea1f3
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3661521
Reviewed-by: Diana Z <dzigterman@chromium.org>
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For boards using USB mux tasks, mux sets will be running in a task
parallel to the PD task. This means we need to restructure any mux sets
which have required PD sequencing, such as setting USB safe state before
mode entry and DP configure. Restructure the DPM and associated code to
account for the mux set taking some amount of time before VDMs may
proceed.
For the TBT module, align the module states to always indicate the
message the state is sending (ex. enter SOP will only send from
TBT_ENTER_SOP now).
This includes a couple of functional changes for boards:
- All boards will now set safe state before configuring DP pins, even if
their board functions previously did not
- TBT mode exit will now set safe state once before SOP exit, rather
than bouncing between safe state and USB mode after each exit ACK, which
matches more closely with how mode entry is currently working.
- USB4 exit will leave safe state set for TBT cable exit if active
BRANCH=None
BUG=b:172222942,b:186777984
TEST=on voxel with no mux task, pass tast typec.Mode*.manual
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I9d9fb6087199fba04084f57cefb31f3cb45c28e5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078417
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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API pd_get_am_discovery() sets the lock (task access bit) to keep track
of EC tasks accessing the pd port discovery data. If any of the task
access bits are set,EC host task typec discovery handler will return
EC_RES_BUSY to host, indicating discovery data is modified while copying
port discovery data to the host. Hence the lock/task access bit should
be set only when the port discovery data is modified by any tasks.
Setting of lock/task access is removed from pd_get_am_discovery() and
implemented new api pd_get_am_discovery_and_notify_access() for this.
pd_get_am_discovery() proto type is changed to return 'constant pointer'
which forces developers to use pd_get_am_discovery_and_notify_access()
when they intend to access and modify discovery data.
summary of changes implemented.
- Remove setting of task access bit from pd_get_am_discovery().
- modify pd_get_am_discovery() prototype to return constant pointer.
- implement new api pd_get_am_discovery_and_notify_access()
- Replace calls to pd_get_am_discovery() with new api
wherever discovery data is accessed and modified.
BRANCH=none
BUG=b:197466819 b:190390784
TEST=Verified 50 cold boot cycling with TBT device attached.
Device detected in every cycle.
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
Change-Id: I5b6f1f2b91d92ddbe58f3bf994f684abee948c02
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139858
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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enter_usb_cable_is_capable() doesn't handle non-Emark cable case.
If cable is neither passive cable nor active cable, return false.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: I82c9df842d05fb78535c8d6d310bf6d1913c25b8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3153356
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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As a followup to CL:3104290, give the TCPCI TRANSMIT and
RX_BUF_FRAME_TYPE types more consistent names. Most of them can be used
for receiving, not just transmitting. Fix lint errors thus revealed.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I399ec479eacc18622fc4d3f55f8bdabf4560fcff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3125995
Reviewed-by: Keith Short <keithshort@chromium.org>
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Rename tcpm_transmit_type to tcpm_sop_type to reflect that it can be
used for Rx as well. Describe it in comments. This prepares to
consolidate enum pd_msg_type into this enum.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Ife97d4ad51c48f2e832b94e007954919e236a309
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104290
Reviewed-by: Keith Short <keithshort@chromium.org>
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Before sending Enter Mode/Enter USB to the cable plug (SOP' and SOP'')
the usb mux and retimer should be configured to safe mode
BUG=b:183781477
BRANCH=None
TEST=TBT/USB4 device enumerates fine on coldboot, warmboot and hotplug
with MBR and passive cables.
Change-Id: Ia8fe95d9183f7febdb118bca51ea9a137870832c
Signed-off-by: Madhusudanarao Amara <madhusudanarao.amara@intel.corp-partner.google.com>
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2786883
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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When exiting out of USB4 mode, reset the USB4 state machine and
set the retimer and the mux to disconnect state followed by
USB mode.
BUG=b:181286325
BRANCH=None
TEST=Able to re-enter into USB4 mode on warm reboot
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: Icdc520aa221a9276466fafb885a6d86e893b7284
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2727628
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
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This header file is used from quite a few files, relying on the EC
build system to find includes in the driver/tcpm directory. For Zephyr
we don't want to add that as an include.
It makes more sense for header files to be in an include directory, so
move it and fix up the users.
BUG=b:175434113
BRANCH=none
TEST=build Zephyr and ECOS on volteer
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I5851914b1a7d3fdc1ba911c0fbe9046afbaf6f5d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597985
Reviewed-by: Keith Short <keithshort@chromium.org>
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Commit 7dec638eb577aaa3a00d0551d73c276b94ebacb2 introduced two polarity
modes POLARITY_CC1_DTS, POLARITY_CC2_DTS in enum tcpc_cc_polarity, but
in many places there was an assumption that value other than 0 means
that cable is inverted, the most notable example is usb_mux_set(). As a
result kernel sometimes was not reporting SuperSpeed depending on if
cable was inverted or not.
This patch adds mapping from polarity with DTS to polarity without DTS
where necessary.
BUG=b:162254118
BRANCH=none
TEST=Connect ServoV4 to eve and run servod. Make sure that USB-C muxer
is connects USB3.0 lines (servod should set it).
Flash EC ToT on eve. Boot ChromeOS and go to Developer Console.
Run 'dmesg -w', check if device (eg. ethernet adapter) is attached as
SuperSpeed device. Unplug cable, invert and plug again. Kernel
should report that device is attached as SuperSpeed.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I354ef7047240cc8b5db01936b3780fae7387edb5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2555157
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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The linear re-driver cables enumerate as passive cables in the Discover
mode SOP' response from the cable. But they have Active/Passive bit
(B25) in the discover mode SOP' response set. Hence, if the cable is
LRD, the port enters Thunderbolt mode SOP' before entering USB and
it also sets the cable as active in the mux and retimer setting.
USB4 PD flow for LRD cables:
Is Discover mode SOP'
B25? ----- N ----- Enter USB4 SOP with Gen 2 cable speed
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y
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Enter TBT SOP'
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Enter USB4 SOP as per cable speed.
TBT PD flow for LRD cables:
Is Discover mode SOP'
B25? ----- N ----- Enter TBT SOP
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y
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Enter TBT SOP'
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Enter TBT SOP
This CL also updates the retimer setting and Enter USB Data object for
USB4 according to the type of cable detected (LRD/Active/passive)
BUG=b:156749387
BRANCH=None
TEST=With Linear re-driver cable,
1. Able to enter USB4 mode
2. Able to enter Thunderbolt mode
3. Able to exit and re-enter USB4 on reboot
4. Able to exit and re-enter Thunderbolt mode on reboot
Change-Id: Ie5258f792e13a205dea71fc9f06b1d8987ec9194
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2470209
Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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USB4 PD flow for active cables:
Structured
VDM version
(cable revision)-- <2.0 -------->|
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>=2.0 |
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VDO version---- <1.3 -------> Modal op? -- N --|
(B21:23 of | |
Discover ID SOP'- y |
Active cable VDO1) | |
| TBT SVID? -- N --|
>=1.3 | |
| y |
Cable USB4 support? - N | |
| | Gen4 cable? - N - Skip USB4 mode entry
y Skip USB4 |
| mode entry |
Enter USB4 y
(SOP',SOP'',SOP) |
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|<---- NAK ----- Enter mode TBT SOP'<---|
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| ACK |
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|<---- NAK ----- Enter mode TBT SOP'' |
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Exit TBT mode SOP ACK |
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ACK/NAK Enter USB4 mode |
| SOP |
Exit TBT mode SOP'' |
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ACK/NAK |
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Exit TBT mode SOP' |
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ACK/NAK |
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|--------Retry done? ---- N ------------|
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y
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Skip USB4 mode entry
The CL also checks if the port is VCONN source before sending Enter USB
SOP' and SOP'' messages and requests for a vconn swap is it isn't
In case of reboot, the port sends exit Thunderbolt mode SOP' and SOP''
and skips sending exit Thunderbolt mode for SOP, since it didn't enter
Thunderbolt mode SOP prior to reboot.
Note:
1. This is only applicable when the port enters USB4 mode SOP and
Thunderbolt mode with the cable plug.
2. It is a temporary behaviour until data reset feature is in place
(b/141363146)
BUG=b:156749387
BRANCH=None
TEST=1.Able to enter into USB4 with active cable.
2.Able to exit Thunderbolt mode SOP' and SOP'' on reboot and
re-enter into USB4 mode with active cable.
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Change-Id: I828c7ca0fd9b7b1025f13bcc86c511692b9f9895
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432868
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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USB4 mode:
Added a function to check if the USB4 entry is completed
Thunderbolt mode:
Added 2 flags TBT_RETRY_DONE, TBT_EXIT_DONE to track the
Thunderbolt mode's exit and if retry is needed and a new function
to check if if the Thunderbolt mode entry is completed
DisplayPort mode:
Added a function to check if the DisplayPort entry is completed
BUG=b:169169804
BRANCH=None
TEST=1. Able to enter alternate mode on hotplug and reboot
2. Able to exit the alternate mode on chipset transition and on
DPM's exit mode request.
Change-Id: I09662449143ad8d94b30ae102ed5ce79db852687
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2421425
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Move usb_mux_set_safe_mode() definition into usb_common.c so it's
available to the test framework.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I789a470468ae441e366afbf94ce3c29db526dfd8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2370409
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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To support USB4 mode on TCPMV2 this commit:
1. Checks if the port, port partner and cable is USB4 capable and if so
enters into USB4 mode
2. Adds a new state PE_ENTER_USB to the PE state machine which sends the
data message to enter into USB4 mode and on receiving an ACK from the
port partner, sets the mux to USB4.
BUG=b:156749387
BRANCH=None
TEST=Tested on Volteer, able to enter into USB4 mode
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Change-Id: I3dac12a204a724037681037f98eaf797d4e02f20
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277827
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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