| Commit message (Collapse) | Author | Age | Files | Lines |
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In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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When detaching from a port partner, we clear out all alternate mode
information, but currently we're not clearing out the mux state
reliably. There is a mux state clear in Unattached.SNK, but it should
be called any time we're forcibly detaching a port (due to unplug, error
recovery, or suspend).
BRANCH=None
BUG=b:198204468
TEST=on guybrush, suspend a port with a monitor plugged in and verify
the mux state goes to None while suspended
on voxel, pass tast typec.Mode*.manual
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I894d8b9358b357300848c063a0db6f5f22caf12a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3180267
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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API pd_get_am_discovery() sets the lock (task access bit) to keep track
of EC tasks accessing the pd port discovery data. If any of the task
access bits are set,EC host task typec discovery handler will return
EC_RES_BUSY to host, indicating discovery data is modified while copying
port discovery data to the host. Hence the lock/task access bit should
be set only when the port discovery data is modified by any tasks.
Setting of lock/task access is removed from pd_get_am_discovery() and
implemented new api pd_get_am_discovery_and_notify_access() for this.
pd_get_am_discovery() proto type is changed to return 'constant pointer'
which forces developers to use pd_get_am_discovery_and_notify_access()
when they intend to access and modify discovery data.
summary of changes implemented.
- Remove setting of task access bit from pd_get_am_discovery().
- modify pd_get_am_discovery() prototype to return constant pointer.
- implement new api pd_get_am_discovery_and_notify_access()
- Replace calls to pd_get_am_discovery() with new api
wherever discovery data is accessed and modified.
BRANCH=none
BUG=b:197466819 b:190390784
TEST=Verified 50 cold boot cycling with TBT device attached.
Device detected in every cycle.
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
Change-Id: I5b6f1f2b91d92ddbe58f3bf994f684abee948c02
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139858
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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Many Chromebooks will stop sourcing Vconn in G3, and don't have
sufficient notice during chipset transitions to properly swap Vconn back
to the partner before it is dropped. For these cases, send a hard reset
in order to move the role of Vconn supplier back to the source.
Note that some boards use GPIO checks to verify whether they can source
Vconn, and these could take some amount of time after G3 entry to
settle.
BRANCH=None
BUG=b:199044441
TEST=on guybrush, attach a charger which will not swap Vconn and observe
no hard resets are sent in G3. Attach charger which does Vconn swap and
observe a hard reset is sent, and the cable is probed once the system is
powered on again.
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ia1c9533c36c6c7a650109182c5adf8444ffde43a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3161320
Tested-by: Li Feng <li1.feng@intel.com>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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enter_usb_cable_is_capable() doesn't handle non-Emark cable case.
If cable is neither passive cable nor active cable, return false.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: I82c9df842d05fb78535c8d6d310bf6d1913c25b8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3153356
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Don't clear discovery data when resetting active modes during mode exit.
BUG=b:141363146
TEST=make buildall
BRANCH=firmware-volteer-13672.B-main
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I8052641bb850ce8486eb9c82641b41880cb97d65
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3123837
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Connect TBT/USB4 device to PD port in G3 state, port discovery requests
to be vconn source even the PP5000_A rail is turned off in G3, as a
result system won't be able to source vconn and cable discovery fails.
Port discovery should check if sourcing vconn is possible at board
level before it requests swap vconn so to prevent this failure.
BUG=b:198226223
BRANCH=none
TEST=Boot up ADL RVP, put system in G3 by "shutdown -h now", plug in
Gatkex board to port 0, confirmed EC does not request vconn swap in
G3 if 5V is not available. Wake up system by "powerbtn" on EC console,
cable discovery is successful.
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: Ic94c21dbfe0c910b6c9826302b8658eeeff44b72
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3131408
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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Support dynamic PDO selection CONFIG_USB_PD_DPS.
This config controls the charging voltage and power according to the
input power and battery configuration.
DPS would continuously evaluate the system load and current charging
voltage, and decide a new one by below:
1. If the PDO can fulfill system desired power.
2. If the PDO is efficient for the battery configuration.
To detect if the system load cannot be fulfilled by the current PDO,
it checks:
1. if the input current closes to the PDO current limit.
2. if the input power closes to the PDO maximum power.
To detect if the system load can be fulfilled by a more efficient PDO,
it checks:
- if the voltage of a new PDO is closer to the battery voltage than the
current PDO, and the power is able fulfill the system load.
BUG=b:169532537
TEST=1. tested on asurada, the charging voltage is able to switch to
different PDOs under different system loads
2. tested that the DPS is able to switch charge port
(e.g. C1 12V -> C0 9V) based on the provided PDOs.
BRANCH=asurada
Change-Id: I7c7706b331dc0d4f8ac68569dc7ed852fc9308e3
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897064
Tested-by: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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As a followup to CL:3104290, give the TCPCI TRANSMIT and
RX_BUF_FRAME_TYPE types more consistent names. Most of them can be used
for receiving, not just transmitting. Fix lint errors thus revealed.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I399ec479eacc18622fc4d3f55f8bdabf4560fcff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3125995
Reviewed-by: Keith Short <keithshort@chromium.org>
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The get_cc function call is slow (2 i2c transactions in tcpci
implementation) and redundant in FRS path.
Use short-circuiting to remove the function call.
This saves ~2ms on Cherry.
BUG=b:190348051
TEST=Combined with other CLs in the chain, verify FRS workable on Tomato
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I4161bc3a5ba17eb4983d85dd78465c2e623f46dc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3109707
Reviewed-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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This reverts commit 55f40b89d7f7b6cc3005e0d6fa755345d514a578.
Reason for revert: type-C port with IT83XX can not detect plugged in device since the dual role CC1/CC2 voltages keep at 3V other than toggling for device.
Original change's description:
> TCPMv2: Fix LPM for non-dual role auto toggle chips
>
> If the "dual role" is enabled and the TCPC chip does not support
> "Dual role auto toggle mode" then the PD state remains in
> PD_DRP_TOGGLE_ON state in active state of the AP. Hence check for CC
> line open state to decide to enter low power mode for such devices.
>
> BUG=b:195406641
> BRANCH=none
> TEST=Tested on ADL RVP, FUSB302 & IT83XX can enter LPM
> > pd 0 state
> Port C0 CC1, Disable - Role: SRC-UFP TC State: LowPowerMode,
> Flags: 0x0010 PE State: , Flags: 0x0001
>
> Change-Id: Ic70c6bfcd2ffd0721fdcaf6e61c68736971e037b
> Signed-off-by: Poornima Tom <poornima.tom@intel.com>
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088161
> Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
> Commit-Queue: Vijay Hiremath <vijay.p.hiremath@intel.com>
Bug: b:195406641
Change-Id: I9a2deed330b0169be220e9b0a83125eb6a6e0faa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3109275
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
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Convert usages of this enum to tcpm_sop_type.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I5fed273d72e7ad0e191db0cb0d121b70bdd9ecdb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104291
Reviewed-by: Keith Short <keithshort@chromium.org>
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Rename tcpm_transmit_type to tcpm_sop_type to reflect that it can be
used for Rx as well. Describe it in comments. This prepares to
consolidate enum pd_msg_type into this enum.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Ife97d4ad51c48f2e832b94e007954919e236a309
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104290
Reviewed-by: Keith Short <keithshort@chromium.org>
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If the "dual role" is enabled and the TCPC chip does not support
"Dual role auto toggle mode" then the PD state remains in
PD_DRP_TOGGLE_ON state in active state of the AP. Hence check for CC
line open state to decide to enter low power mode for such devices.
BUG=b:195406641
BRANCH=none
TEST=Tested on ADL RVP, FUSB302 & IT83XX can enter LPM
> pd 0 state
Port C0 CC1, Disable - Role: SRC-UFP TC State: LowPowerMode,
Flags: 0x0010 PE State: , Flags: 0x0001
Change-Id: Ic70c6bfcd2ffd0721fdcaf6e61c68736971e037b
Signed-off-by: Poornima Tom <poornima.tom@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088161
Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Vijay Hiremath <vijay.p.hiremath@intel.com>
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Per the TCPCI spec figures, we should be setting the CC lines and
enabling Auto Discharge Disconnect before attempting to source Vbus.
Doing these things out of order may cause Vbus sourcing to appear to
fail when a TCPC is waiting for ADD to set before enabling Vbus.
BRANCH=None
BUG=b:195966013
TEST=on guybrush, verify both C0 and C1 successfully detect that they
are sourcing Vbus with an unpowered Apple 3-in-1 dongle
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Icb0bd221a7d8eb069b74327c27894e5d92e95329
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088003
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Retimer firmware update operations as below should be handled when PD
task is suspended. Move those operations from tc_run() to
TC state TC_DISABLED tc_disabled_run().
USB_RETIMER_FW_UPDATE_SET_USB
USB_RETIMER_FW_UPDATE_SET_SAFE
USB_RETIMER_FW_UPDATE_SET_TBT
USB_RETIMER_FW_UPDATE_DISCONNECT
BUG=b:193685562
BRANCH=none
TEST=Voxel DVT, retimer firmware update Chromium solution,
CPFE 13892 OS/Coreboot, PD port 1 NDA, successfully scan retimers.
TEST=Voxel DVT, retimer firmware update upstream solution,
coreboot includes patches supporting upstream kernel solution,
PD port 1 no device attached, successfully scan retimers.
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: I4dd0fcfafed362be90182fc8f1ef656495cdc8e3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3055670
Tested-by: Kevin DeRossett <kevin.l.derossett@intel.corp-partner.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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When TCPC low power mode is enabled, PD ports will enter TC state
TC_LOW_POWER_MODE if no device is attached, so tc_low_power_mode_run()
pauses PD task during PD task running.
Meanwhile, retimer firmware update is operated on NDA port, this will
start the paused PD task to run in low power mode.
The result of one place pauses task and one place starts task is
unpredictable. This causes retimer firmware update failure from time
to time.
Thus task_wake() is used instead of tc_start_event_loop().
BUG=b:193685562
BRANCH=none
TEST=Voxel DVT, retimer firmware update Chromium solution,
CPFE 13892 OS/Coreboot, PD port 1 NDA, successfully scan retimers.
TEST=Voxel DVT, retimer firmware update upstream solution,
coreboot includes patches supporting upstream kernel solution,
PD port 1 no device attached, successfully scan retimers.
/sys/bus/thunderbolt/devices/0-0/usb4_port3 # echo 1 > offline
/sys/bus/thunderbolt/devices/0-0/usb4_port3 # echo 1 > rescan
/sys/bus/thunderbolt/devices/0-0/usb4_port3 # ls
0-0:3.1 firmware_node link offline power rescan uevent
/sys/bus/thunderbolt/devices/0-0/usb4_port3 # echo 0 > offline
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: Ia5c6af0dc8dbace1f0391ed2891ac464d07d9cc0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3029662
Reviewed-by: Diana Z <dzigterman@chromium.org>
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When an attempt to gather source capabilities fails, we should avoid
probing for them again by internally tracking the number of capabilities
as -1. This saves us traffic on resets with partners that have no
source capabilities, and also prevents looping with buggy partners who
reply with an unexpected message.
BRANCH=None
BUG=b:191229962
TEST=on guybrush, ensure we only query a sink-only dongle once
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Iea56619d7aca5df7d1b38d8f0d6a69cac4a825a9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3025865
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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The PE stores internal state (ex. capabilities, identity responses)
which should be cleared out between unit test runs.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I77b3faefd3f887a68ca9593a7398ae9c3ffb2f17
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3025864
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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During retimer firmware update, EC passes mux value to Coreboot/kernel.
Coreboot/kernel checks mux value to know if PD port is NDA, or if port
connection is set to what retimer firmware update sequence expects.
Some bits of mux value are not used by Coreboot/kernel. This patch
clears unused bits; and keeps alternate mode bits and safe mode bit in
the mux value.
BUG=none
BRANCH=none
TEST=On ADL RVP, verified NDA port retimer firmware update working.
TEST=On Voxel DVT, verified NDA port retimer firmware update working
with both Chromium solution and upstream solution.
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: I1becc09a0f5c5d4e1fb845c5fe33fa748d44bd4f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3010482
Reviewed-by: Keith Short <keithshort@chromium.org>
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Some ifs check for CC polarity not taking DTS enums into account.
This can cause that POLARITY_CC1_DTS will be treated as POLARITY_CC2.
BUG=b:192652859
BRANCH=main
TEST=Build firmware for servo_v4p1 and lazor
to check if modified files compile correctly
Change-Id: I230fafbf751c7f28545860c648655630150f7597
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001273
Reviewed-by: Brian Nemec <bnemec@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL adds a new variable to the hpd state that enables the pd
policy layer to inform the hpd->DP_ATTENTION converter that at least
one DP_CONFIG message has been received. This control is used to make
sure that DP_ATTENTION messages aren't sent prior the DFP_D being
configured for DP port mode. Some port partners may get confused if
DP_ATTENTION is sent prior to either DP_CONFIG or DP_STATUS.
BRANCH=quiche
BUG=b:192051705
TEST=verifed on kasumi (grunt) that the display is extended correctly
following usbc hotplug events. Previously, this case was failing 1 out
of 3-4 times.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I80d576de7fc0075be2b1a838d1ed764ae7828e8e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3035785
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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Some TCPCs require time to return correct status of CC lines after
changing ROLE_CONTROL register. If no delay is applied, these TCPCs
can incorrectly report CC lines as open which result in changing
state to Unattached.Src. This makes power swap not working.
For lazor board it takes about 8ms to detect correct values on CC
lines, where maximum time from specification is 20ms.
Considering this, value of 15ms was set as delay.
BUG=b:192353324
BRANCH=main
TEST=Running PD FAFTs on lazor gives positive results
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Change-Id: I25937fcd996d5a67b4acb1833b07c80c395e66b8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3024268
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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This fixes a typo in usb_pd_dpm.
BRANCH=none
BUG=none
TEST=buildall passes
Change-Id: I0b3edf8765110dae88bd49ec5e9371f3147997be
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3024851
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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There are a number of features that may cause a board to need sink
capabilities (3.0 A port balancing, FRS, or AP host commands). However,
other boards may not need these and the added traffic can increase the
liklihood of collisions on PD 2.0 connections.
BRANCH=None
BUG=b:192051705
TEST=connect honeybuns to TCPMv1 DUT and verify DP alternate mode can be
reliably entered
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I70e2f360a9a45eee85ed555cb0165937c01a661a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3016407
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This CL addes a new overridable function
typec_get_default_current_limit_rp() which is used in place of
CONFIG_USB_PD_PULLUP to retrieve the correct Rp value to reflect the
current limit. This functionality is required for boards which are not
per port symmetric.
Unless this function if overridden in a board/basebard specific file,
there is no change in functionality from present design.
BUG=b:191793195
BRANCH=quiche
TEST=verfied on Gingerbread that Rp = 3.0A is selected for C0 and Rp =
1.5A is selected for port C1.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I9ec9daa563f6b4f551b4890ae7a56767f7c26764
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2980435
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Send a notification that the port has been disconnected when the TC
triggers HOOK_USB_PD_DISCONNECT.
BRANCH=None
BUG=b:188330043
TEST=on storo, verify that disconnect quickly registers in the UI power
status menu
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I758ca918ccd199e3ca2f69aec67323065b48add7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2983992
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This fixes the initialization of flag_bit_names[] and event_bit_names[]
when DEBUG_PRINT_FLAG_AND_EVENT_NAMES is defined.
BRANCH=none
BUG=none
TEST=buildall passes (all files compile, but some boards fail to link
due to image size with DEBUG_PRINT_FLAG_AND_EVENT_NAMES enabled
manually)
Change-Id: I606e7b3f45db1ecbdd597276166cd5c88c201fde
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2986845
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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This adds a check to make sure the TC_LOW_POWER_MODE event loop is
enabled when scheduling the TC_TIMER_LOW_POWER_TIME timer.
BRANCH=none
BUG=b:191531291
TEST=buildall passes
Change-Id: I966ec4ca57bc39b75ebe35430e968d86008dffce
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2986600
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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The SenderResponseTimer shall be used by the sender's policy engine to
ensure that a message requesting a response is responded to within a
bounded time. Which is 24Msec to 30 Msec. However, delays associated
TCPC I2C, PE, and PRL layers make hard reset response time greater 30Msec.
This CL address the delay associated with TCPC. When TCPC transmit
success is reported by TCPC upon receiving the GoodCRC, time stamp is
recorded. Another time stamp is recorded just before starting
SenderResponseTimer and offsetting PD_T_SENDER_RESPONSE.
BUG=b:182439366
BRANCH=none
TEST=checked with GRL compliance tester. Noted that total response time
is in the middle of the expected time of 24ms to 30ms. This fix achieved
response time about 27.675ms
Signed-off-by: udaykiran <udaykiran@google.com>
Change-Id: Id2ddcdd90eed8b3d66ade3d16877004871a21de8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2971078
Reviewed-by: Diana Z <dzigterman@chromium.org>
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In PD 3.0, the Not_Supported message allows a port partner to let us
know it cannot source Vconn, and therefore we may take over as Vconn
source. This implements the spec state PE_VCS_Force_Vconn for that
scenario.
BRANCH=None
BUG=b:189630178
TEST=on guybrush, connect a charger which doesn't support sourcing Vconn
and observe we probe the cable
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If7e48db45def602d0989473a84cb2271c03bfe30
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965845
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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The charge manager may request a PR swap when it is no longer charging
from a port that is DRP and configured as sink. This can prevent us
from depleting a tablet when there's a better charger available, for
example.
However, when the DRP partner has already initiated a PR swap this may
lead to the chromebook inadvertently becoming the sink of the connection
again. Ignore PR swap requests while we're in a state where our PR role
doesn't match what it's expected to be shortly in order to prevent this.
BRANCH=None
BUG=b:174334068
TEST=on storo, connect guybrush and enable charging alternately from
both DUTs. Then, when charging from the other DUT, connect a charger
and ensure that storo swaps to sourcing the other system.
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I1908f4ee726d49ca89f6f0c8f75bdfdf0fb12a47
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2964920
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This adds support for a board specific function to determine if a
particular port supports DTS (Debug and Test System) - more commonly
known as the CCD port. Typically, only one port supports CCD and we
should not enter debug accessory mode on non-CCD ports.
The default implementation simply returns true which is equivalent to
the original behavior. Boards can override board_is_dts_port() to limit
entering debug accessory mode to specific ports.
BRANCH=none
BUG=b:188851792
TEST=buildall passes
Change-Id: I10ad3cbed68478b23379b5f7ec6eff6ebae11084
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954196
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Some port partners may offer a very low initial source capbility (ex. 5V
at 100mA) and then very quickly follow with full source capabilities.
When this happens, cancel any queued PR swap requests since we now wish
to charge from this port partner.
BRANCH=None
BUG=b:190506779
TEST=on guybrush, ensure Apple 3-in-1 connects without any unnecessary
PR swaps
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ia51efc8e17d950a0abb818b7da0f99d598affbe3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2947622
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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Clarify the function name by changing it to "can charge from" since
"source from" isn't a generally common phrase in PD terms.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Id7a40ac9d8d4c0007e8ff6cb25c2e8c2d006df0c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923239
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Since Vconn is make before break, it makes no sense to delay
transitioning back to ready since Vconn isn't discharging. Waiting
extra time in the state translates to taking more time to process the
next messages after a Vconn swap.
BRANCH=None
BUG=b:181087216
TEST=on storo, confirm that we don't miss replying to PR swap following
a Vconn swap connected to another DUT
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I0d551d0cac34f8157c7fe2b272c2450d6da3ca17
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2937108
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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Don't enable USB superspeed signals until the PD capability is known.
This fixes an issue where platforms that enable the virtual USB mux
violate the tSenderResponse timeout when the attached SRC sends the
Source Capabilities message.
BUG=b:187796705
BRANCH=none
TEST=Volteer - connect PD charger, obsserve no hard reset
TEST=Connect non-PD USB device, verify USB mode is enabled
TEST=Connect USB+DP monitor, verify DP mode entry and USB mode enabled
TEST=Connect USB4 dock, verify USB4 entry
TEST=faft_pd test suite passes on Voxel
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I4be08874178d1e225cf41939b9626a81b0da0524
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895424
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: caveh jalali <caveh@chromium.org>
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`pd state` and `pd dualrole` command outputs are non-atomic and even
have function calls in the middle of lines. This caused the output to
be mixed with non-related prints, and FAFT is sometimes failing to
parse the needed lines. Wrapping those commands with `cflush` reduces
output corruption.
BRANCH=none
BUG=b:188881690
TEST=running FAFT PD
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Change-Id: I0750df0b1ce0bb52b96718769626ca8e2e1b55c6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2932456
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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If a Vconn swap is interrupted before we receive a PS_RDY from the
partner, re-enable SOP' transition. Note this doesn't matter for the
case of no PS_RDY received as we'll proceed to hard reset which will
also reset our Vconn role. This is primarily applicable if the
interruption is for an unexpected message, which interrupts the swap and
leaves us the Vconn source.
BRANCH=volteer
BUG=b:186886218
TEST=on drobit, ensure cable entry doesn't fail after failed Vconn swap
with dock
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I952c04535ae9527f07cb203c403a51182c67cba7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2881020
Tested-by: Benson Leung <bleung@google.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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If a port doesn't clear the PR swap in progress flag while switching
from a source to a sink, the port can end up permanently stuck in
Attached.SRC even when the port partner is unplugged.
This removes the check to the PR swap in progress flag when Open is
detected on the CC lines. This follows the type-c spec's exit
conditions, and we would not expect to see CC open during a PR swap
since the source sets Rd before the new source will set Rp.
BRANCH=None
BUG=b:158613480
TEST=on mancomb, unplugging after failed PR swap with dock
allows port to go unattached again. Normal PR swap process is able to
complete with dock plus servo_v4 and Apple 3-in-1
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Idc4c193597c6b4a791d18e38bc5111d0342e512c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2256465
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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This CL fixes an issue related to PE_FLAGS_INTERRUPTIBLE_AMS which was
being set in pe_handle_custom_vdm_request_entry whether the custom VDM
request is supported or not. This would result in
PE_FLAGS_INTERRUPTIBLE_AMS remaining set and ignoring of subsequent VDM
messages, which in turn prevents ALT-DP entry for UFP case.
BUG=b:189293176
BRANCH=quiche
TEST=Verfied that with this fix, ALT-DP mode is entered
consistently. Without this CL, ALT-DP mode is not entered correctly.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I7a52a6028ea656d9a1970fea0b42f582f1aaff5c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2677707
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Drive CCD_MODE_ODL from EC when EC sees DTS connected to CCD port.
This will fix some cases where the Cr50 is not able to detect that
a CCD debug cable has been connected.
BUG=b:175056327
TEST=Connect/disconnect SuzyQ cable, see assert/unassert in log
Check gpioget on CR50 and ec, confirm CCD_MODE_ODL is correct
Connect/disconnect charger, do not see assert/unassert in log
Repeat with ServoV4
BRANCH=None
Change-Id: I411e75a47f2e1303ddbd9caa63a9417630c99b46
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2659282
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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If there is a pending VDM send during the processing of
DPM_REQUEST_PORT_DISCOVERY, then the VDM send and ACK may leave the DP
module in an inconsistent state. Avoid this state by clearing any
pending VDM sends at this time.
BRANCH=None
BUG=b:182237701
TEST=on mancomb, plug in a dock in G3 and power up to S0 repeatedly,
ensuring that we can enter DP mode every time
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I2223ed431df97821a177e9a030b53f6310a1faf8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2912114
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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When EC reboots, the TCPMv2 stack initializes the Type-C supplier in
either staying in Unattached.SNK (debounced that nothing is attached
to the connector) or transition to Attached.SNK (exclude the PRS
case), in order to seed the charge manager.
However, if the state transits to Attached.SRC from Unattached.SNK
via Try.SRC. The charge manger has never been seeded. It happens when
a DRP (like a Type-C hub) is attached during reboot. It may then
transit to Attached.SNK through a Power-Role-Swap. However, the PRS
case is excluded to seed the charge manger.
This CL initializes the Type-C supplier to 0 in the Attached.SRC state.
It seeds the charge manger. So all cases (Unattached.SNK, Attached.SNK,
Attached.SRC) are covered.
BRANCH=None
BUG=b:188532782
TEST=Attach a powered Type-C hub; reboot EC; the charge manger is
seeded; the charge port is selected; the power sink path is enabled.
Change-Id: I8fbfc1c4ffc5c9a9a8a49fcc36d67da93d01c403
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2904562
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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When a PR swap is interrupted, send a hard reset. Since Vbus is turning
off, a soft reset wouldn't restore our Vbus and connection state for
this protocol error.
BRANCH=zork
BUG=b:184764468
TEST=on jelboz, connect problematic dock which interrupts PR swap and
ensure connection can recover successfully
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I901c5a99af3f8cfae038d447bac8e0f37fedc9c2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2880811
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Do not ignore a requested VCONN Swap if VDM setup is done. Use a DPM
request flag (which is always handled in the ready state) instead of the
VCONN Swap PE flag (which is only handled if mode entry hasn't
completed).
BUG=b:187861138
TEST=make buildall
BRANCH=firmware-volteer-13672.B-main
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I32ebb7c50e9abc47351398f229a2b464605f634d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895425
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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In PD 3.0, a DUT must reply with Not_Supported when a SVDM isn't
supported. Note that PD 2.0 is still perfectly welcome to send a NAK
reply for this case.
BRANCH=None
BUG=b:181194535
TEST=with follow-on CL, verify TD.PD.VNDI3.E3 VDM Identity passes
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ie3b554cca017494b86342df1e9149b4452c83852
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2881028
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Both DP Status and DP Attention messages contain a MF bit which allows
the UFP-D to signal to the DPF-D its multi-function
preference. Chromeos host machines only act on this bit in the DP
Status message. However, other host machines may also use this bit in
the DP Attention message.
This CL adds a call to a board specific policy function so that the MF
bit can be set correctly in both the DP Status and DP Attention
message.
BUG=b:186632734
BRANCH=quiche
TEST=ODM partner verifed that with this bit set in both DP Status and
DP Attention, the host machine will select pin configuraiton
D. Previously, the host machine was selecting pin configuration C.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I0242d2a5ad056ec210d7364b606528e4a54858c1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2856290
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Before retimer firmware update, check power, if battery is not present,
or battery level is low (<5%), not allow PD suspend/performing
retimer firmware update process.
BUG=b:185320314
BRANCH=none
TEST=On Voxel DVT, AC only, no battery, boot up system and confirm
NDA PD port is not suspended, and retimer firmware update is not performed.
DA port has correct device functions.
TEST=On Voxel DVT, battery is low (< 5%), boot up system and
confirmed NDA PD ports is not suspended, and retimer firmware update is not
performed; DA port has correct device functions.
TEST=On Voxel DVT, when battery level >=5%, confirmed NDA PD port can be
suspended and retimer is scanned. DA port has correct device functions; device
tested are DP dongle, TBT dock and USB4 device.
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: I1c5b2bc54b2f6307503f82112f28bbc8d6b0591a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2858283
Reviewed-by: Keith Short <keithshort@chromium.org>
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When a contract is invalidated, it's important we advertise our current
limit Rp rather than a residual collision avoidance Rp. However, we
should not attempt to set CC's when we're in a disconnected state. This
may cause us to set an unexpected CC selection, such as Ra if the TC
layer hasn't set the first termination yet.
BRANCH=None
BUG=b:183182447
TEST=on guybrush, boot with i2c tracing enabled and ensure Ra is never
set during init. Perform PR swaps and hard resets as source to ensure
correct Rp is set.
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I8fbe06685e4b4a6493dfbf55270ce3bda8cfbdfd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2845013
Reviewed-by: Edward Hill <ecgh@chromium.org>
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