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* TCPM: Add OCP moduleDiana Z2020-11-171-101/+0
| | | | | | | | | | | | | | | | | | | | Currently, the overcurrent protection is tracked in the PPC code. However, as different chips are able to report overcurrent move this code into a generic module. Logic for not sourcing Vbus or Vconn on latched ports moves into the TC layer, and an overridable board overcurrent function is provided for boards which have no special actions to take. BRANCH=None BUG=b:171501161 TEST=make -j buildall; TCPMv2 tested with following drawcia patch Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I75919e345a5b0bce4a0b67432a13515e7716cf6a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2532676 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* tree: Use new atomic_* implementationDawid Niedzwiecki2020-10-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | It is done as a part of porting to Zephyr. Since the implementation of atomic functions is done for all architectures use atomic_* instead of deprecated_atomic_*. Sometimes there was a compilation error "discards 'volatile' qualifier" due to dropping "volatile" in the argument of the functions, thus some pointers casts need to be made. It shouldn't cause any issues, because we are sure about generated asm (store operation will be performed). BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949 Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* usbc_ppc: inform the PPC of the power role of the connected deviceEric Yilun Lin2020-10-081-8/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On some of the PPC (e.g. syv682) that support manually force discharge function doesn't automatically turn off discharge FET when VBUS meets vSafe0V. The original flow is disabling discharge on pd_set_power_supply_ready and enabling discharge on pd_power_supply_reset, and since there is no automatic turning off the discharge circuit, the FET will still be on when a SNK device connected. We fix this by informing the PPC on a device is connected or disconnected so that PPC can control the FET by requests. BUG=b:160548079, b:148870148, b:163143427 TEST=make buildall TEST=TCPMv2: on asurada C0/C1(syv682) and volteer C0(sn5s330)/C1(syv682) port, and enable force discharge mode (CL:2423665), plug sink and source device and ensure Vconn and Vbus are off within tVconnOff and tVBusOff respectively. Plug a DRP hub and then plug adapter in it, and it meets tVconnOff and tVbusOff. TEST=TCPMv1: tested the same steps as above on Asurada. BRANCH=NONE Change-Id: I8ed0e18fce2d402ff24fce6bab393cc618dfac09 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434590 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Tested-by: Eric Herrmann <eherrmann@chromium.org>
* core: rename atomic_clear to atomic_clear_bitsDawid Niedzwiecki2020-10-061-2/+2
| | | | | | | | | | | | | | | | | | Change the name of atomic_clear to atomic_clear_bits to make to name more clear - the function clears only selected bits, but the name may suggest that it clears the whole variable. It is done as a part of porting to Zephyr, where atomic_clear zeros the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943 Reviewed-by: Jett Rink <jettrink@chromium.org>
* tree: rename atomic_* functions to deprecated_atomic_*Jack Rosenthal2020-09-291-3/+3
| | | | | | | | | | | | | | | | We will move to an API compatible with Zephyr's API. See the bug for complete rationale and plan. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb_ppc: Fix broken tests buildAbe Levkoy2020-07-161-5/+11
| | | | | | | | | | | | | | | Define ppc_prints and ppc_err_prints (to do nothing) for test builds. BUG=none TEST=make tests BOARD=ampton BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ief446c4eb15def6b95173a846c634ceb5f40948f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2299417 Tested-by: Patryk Duda <pdk@semihalf.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* ppc: Fix return values of ppc_is_* to be booleanEdward Hill2020-07-111-5/+5
| | | | | | | | | | | | | | | The return values for ppc_is_sourcing_vbus(), ppc_is_port_latched_off(), ppc_is_vbus_present() are boolean, so EC_ERROR_UNIMPLEMENTED and EC_ERROR_INVAL cannot be returned. BUG=none BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ic56fd5ac75e5f0ad6e21c803feb929983f08aaf3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2290664 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* usbc: only try to use ppc_set_frs_enable if it existsPeter Marheine2020-07-061-2/+2
| | | | | | | | | | | | | | | | The driver function to set FRS enable only exists if CONFIG_USB_PD_FRS_PPC is enabled, so we must also make its callers conditional in the same way. For consistency, also revise the TCPC FRS code paths to be conditional. BUG=b:146393213 BRANCH=None TEST=make buildall Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I3fb14c711dd2abdf6ef77d469b2103f37daac182 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276125 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* ppc: string de-duplicationKeith Short2020-07-021-4/+16
| | | | | | | | | | | | | | | De-duplicate strings in PPC drivers. Saves 312 bytes on Volteer. Average flash increase of 211 bytes. BUG=b:158572770 BRANCH=none TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I5ca5c935f974b04216ce4d90e6f6d6b9103e8b75 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278586 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: Add pathway to enable FRS from PPC driverEric Herrmann2020-06-181-0/+20
| | | | | | | | | | | | | | | Some PPCs have integrated CC line detection to trigger FRS faster, but this needs to be enabled from the USBC policy engine only after the sink capabilities have been exchanged. BUG=b:148144711 TEST=make buildall BRANCH=none Change-Id: Iaa64f64845c5ffdd32fa66a3eb6f6251abb7c157 Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056493 Reviewed-by: Keith Short <keithshort@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-1/+1
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* ppc: cleanup ppcDenis Brockus2019-10-061-37/+147
| | | | | | | | | | | | | | Allow limited PPC chips to default to EC_ERROR_UNIMPLEMENTED for functions in the driver that are not needed. BUG=b:138599218 BRANCH=none TEST=make buildall -j Change-Id: I5242ef285eb277c06d516ab09f7a74f76d7d34b2 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1829405 Reviewed-by: Edward Hill <ecgh@chromium.org>
* common/usbc_ppc: Fix potential illegal memory access.Tim Wawrzynczak2019-04-191-1/+3
| | | | | | | | | | | | | | | Recent coverity scan indicated a potential illegal memory access in ppc_enter_low_power_mode(). This patch fixes it. BUG=none BRANCH=none TEST=Compiled Change-Id: I0df1ca23340cd4466f8e71349b89ca1ab68aadbf Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1574099 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-1/+1
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* sn5s330: Add support for SBU FET control.Aseda Aboagye2019-03-261-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 has FETs for the SBU lines which need to be controlled by the TCPM. This commit adds a function to control the SBU FETs and enables them when configuring the USB mux. This commit also fixes a bug with the external VBUS current limit setting by setting it appropriately to a min of ~3A. BUG=b:114340064 BRANCH=firmware-nocturne-10984.B TEST=Flash nocturne; plug in hoho; verify that external display is shown. Bounce thru S5, verify that external display still works. TEST=Repeat above with superspeed hub instead. Change-Id: I931f7a47d4eb28e8d9e3cb188601ce0889a44f8d Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1244382 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1530125 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* USB PD: PPC: Add overcurrent handling.Aseda Aboagye2019-01-171-1/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Type-C Power Path Controllers provide overcurrent protection. This commit adds support into the USB PD task for overcurrent events while we are in source role. The USB PD 3.0 spec recommends that ports issue a hard reset when an overcurrent condition occurs on a port. Additionally, we'll allow a source port to overcurrent 3 times before latching off VBUS from the port entirely. The source path will be re-enabled after ~1s after each overcurrent event. BUG=b:69935262,b:114680657 BRANCH=None TEST=Boot to ChromeOS in grabbiter. No overcurrent events reported when the sink is drawing <= 3.20 A. Overcurrent events are reported when the sink is drawing > 3.25 A. After 3 reports, the port is latched off and power delivery is stopped. The port is re-enabled only after the sink is disconnected. Also when the sink is drawing current at 3.24 A, there is one report of overcurrent. The port gets disabled in response to that event. But the port is re-enabled after 1 second since overcurrent event is reported only once. After the port is re-enabled, the sink is able to draw the set current. When the overcurrent event is reported, I can see in the kernel logs that the overcurrent condition is detected by the kernel. EC Logs: [3391.984462 C1: PPC detected Vbus overcurrent!] [3391.984953 C1: overcurrent!] [3392.044935 C1: PPC detected Vbus overcurrent!] [3392.045425 C1: overcurrent!] [3392.061404 C1: PPC detected Vbus overcurrent!] [3392.061894 C1: overcurrent!] [3392.062142 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.077226 C1: PPC detected Vbus overcurrent!] [3392.077532 C1: overcurrent!] [3392.077891 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.092660 C1: PPC detected Vbus overcurrent!] [3392.092966 C1: overcurrent!] [3392.093213 C1: OC event limit reached! Source path disabled until physical disconnect.] Kernel Logs: [ 3356.560456] usb usb2-port1: over-current condition [ 3356.768434] usb usb2-port2: over-current condition [ 3356.976446] usb usb2-port4: over-current condition [ 3357.184441] usb usb2-port5: over-current condition [ 3357.392445] usb usb2-port6: over-current condition Change-Id: Ib070f261e98264cd88725ebce7d10e0798267e3b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1286300 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/807633 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* sn5s330: add low power modeJett Rink2018-08-231-0/+13
| | | | | | | | | | | | | | | | Add a low power mode method for PPCs behind a new config. Implement the low power method for SN5S330 based off of TI AE recommendation. BRANCH=none BUG=b:111520593,b:111006203 TEST=CL stack produce lower power during bip hibernate Change-Id: Icd22f88a8f65c2cd5ab1c95b0750b1eb61e91923 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1166183 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* ppc: Add driver for NX20P3483Scott Collyer2018-03-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The NX20P3483 is a USB PD and Type C high voltage sink/source combo switch. This CL adds support for this PPC variant. Unlike the TI SN5S330, the NX20P3483 does not support VCONN and does not need to be informed of CC polarity by the TCPM. To account for these differences, 2 new PPC config options are added and the driver for the TI SN5S330 was modified to include these new options. The SNK/SRC switch mode for the NX20P3483 is controlled by 2 GPIO signals which may be connected the EC or directly to the TCPC. To handle both cases, the ppc_chips structure was modified with a flags, snk_gpio, and src_gpio elements. BUG=b:74206647 BRANCH=none TEST=make -j buildall and verified there are no build errors. Change-Id: Ic4415ab7571b80e7661ea673434eaf4cf1f1fd2d Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/966926 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* ppc: Add Vconn and CC polarity settings.Aseda Aboagye2018-02-011-0/+16
| | | | | | | | | | | | | | | BUG=b:72292985 BRANCH=None TEST=Flash meowth; Verify with twinkie that Vconn is provided for a sink that requires it. Change-Id: I8168d2e4c46e04810dcf5c2898b2c337424eefec Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/888224 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* sn5s330: Enable VBUS interruptsEdward Hill2018-01-311-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | If the sn5s330 PPC is being used to detect VBUS presence (CONFIG_USB_PD_VBUS_DETECT_PPC), then enable interrupts and call usb_charger_vbus_change when VBUS_GOOD changes. BUG=b:72007153,b:72007492 BRANCH=none TEST=Connect 3A and 1A USB-A chargers to each of Grunt's USB-C ports, check that BC1.2 detection is working: With 1A: > chgsup port=0/1, type=7, cur=500mA, vtg=5000mV, lsm=1 With 3A: > chgsup port=0/1, type=7, cur=2400mA, vtg=5000mV, lsm=1 TEST=Boot Grunt to OS, then connect USB2 mouse or USB3 flash drive to each of Grunt's USB-C ports. Devices do not work due to b:71772180, but gpioget shows EC is setting USB_C0/1_BC12_VBUS_ON_L correctly. Change-Id: Iffc352105a321997adb364b9fbb8bafef248c224 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/887938 Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb pd: Adding PPC vbus discharge pathJett Rink2018-01-311-0/+8
| | | | | | | | | | | | | | Boards with a PPC will use the PPC to discharge the VBUS line instead of the TCPC or GPIO discharge path. BRANCH=none BUG=b:72179253 TEST=Fall time after device removal on grunt within spec now Change-Id: I822923a1cedb32a20efc3610cce4437ade3387f0 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/886563 Reviewed-by: Edward Hill <ecgh@chromium.org>
* usbc: Moving PPC init after setting TCPC resistors.Jett Rink2018-01-251-14/+16
| | | | | | | | | | | | | | | | | | | | | | | | We don't want the PPC to connect the CC lines from the TCPC to the USB connector until the TCPC resistors are set in a valid state (SINK initially). If we connect the CC lines (happens in the ppc_init) before setting the resistor values, some TCPC will be toggling the CC line between Rp/Rd since it doesn't detect a cable yet. In the dead battery charging case, connecting the toggling CC lines to the charger can rail the CC lines to 3.3 V signaling to the charger to disconnect Vbus, thus browning out the board. BRANCH=none BUG=b:71865251 TEST=Grunt powers on via usbc p0 with and without USB hub. Change-Id: I8e78aa2af42075398fab89a2dccef5e7df27b260 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/882305 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* ppc: Add API to set Vbus source ILIM.Aseda Aboagye2017-12-131-0/+8
| | | | | | | | | | | | | | | | | | | | The PPC needs to update its Vbus source current limits whenever our policy changes on the PD ports. This commit simply adds and API to do so. BUG=None BRANCH=None TEST=With some extra code to enable 3A out, flash zoombini; Plug in a PD device to a port, verify that it gets 5V @ 3A. Plug in a second device, verify that we re-send new source caps of 5V @ 1.5A. TEST=Repeat above for meowth. Change-Id: Ifa4bc8b7df87f7730f2bcded842906d43171394b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/818335 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* sn5s330: Add support for Vbus detection.Aseda Aboagye2017-12-061-0/+10
| | | | | | | | | | | | | | | | | | | The SN5S330 has support for detecting when Vbus is present on a port. This commit simply adds an API to query the PPC. BUG=None BRANCH=None TEST=`make -j buildall`. TEST=Flash a board with the SN5S330, with some extra code, verify that Vbus can be detected with this API. Change-Id: I45bf7ff24bcdc447efe12932f51f8094108e29d5 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/791502 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ppc: Create generic PPC driver framework.Aseda Aboagye2017-12-061-0/+76
This commit introduces a driver framework for power path controllers. It provides some common PPC APIs as well as allowing a board to use multiple different PPCs drivers/parts. This should make it easier to add PPC drivers in the future. BUG=None BRANCH=None TEST=`make -j buildall` TEST=Flash zoombini; verify PPC works as expected. TEST=Flash meowth; verify PPC works as expected. Change-Id: Icfb99f384610590b431456cfd28d4aff18442cb2 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/807630 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
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