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* rollback: Ensure rollback_update writes blocks of correct sizeNicolas Boichat2018-07-101-11/+22
| | | | | | | | | | | | | | | flash_write (rightfully) fails if the size of not a multiple of CONFIG_FLASH_WRITE_SIZE. BRANCH=none BUG=b:111190988 TEST=rollbackupdate works on both whiskers and nocturne_fp Change-Id: I8e0b1f59b06d33f4171b6e09af94a5b7a60acc61 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1127803 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Louis Collard <louiscollard@chromium.org>
* rollback: Fix compile warning when local entropy is disabled.Nicolas Boichat2018-07-101-0/+2
| | | | | | | | | | | BRANCH=none BUG=b:111190988 TEST=make buildall -j Change-Id: I9cea8ce0270ca8a3f4fd33663d78d7d7c5b93643 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1128784 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* fpsensor: put the sensor in low power mode when not usedVincent Palatin2018-07-101-0/+4
| | | | | | | | | | | | | | | | | | | | Ensure we always put back the sensor in its lowest power mode when we are no longer waiting for an event from it (e.g. finger detection). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=poppy BUG=b:110498334 TEST=On ZerbleBarn, measure the power consumption with 'dut-control pp1800_fpc_ma' and verify it stays even after running fpcapture/fpenroll/fpmatch console or host commands. TEST=On Meowth, verify that enrollment and unlock-on-match still work. Change-Id: Iad2950d7ed15c536b9f2adff3e1f3df6b92c8d2c Reviewed-on: https://chromium-review.googlesource.com/1125062 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* fan: Don't enable or disable thermal control on resumeDaisuke Nojiri2018-07-061-5/+4
| | | | | | | | | | | | | | | | | | | We don't need to enable or disable thermal control on the resume path. It should be already enabled by pwm_fan_init on cold boot or by pwm_fan_S3_S5 on warm reboot. If it needs to be disabled, DPTF and host command will do so Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=Verify fan spins as expected on Nami and Fizz. Change-Id: If6e4ecdf328b24cc5ba86dbc3bc2824610fcd340 Reviewed-on: https://chromium-review.googlesource.com/1110485 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* USB PD: Don't restore the default power state.Aseda Aboagye2018-07-041-2/+4
| | | | | | | | | | | | | | | | | | | | | | | Now, the PD state machine will try and issue a Soft Reset if the port was previously in an explicit contract prior to the EC resetting. However, there was a bug where the state machine would actually restore the default power role instead of the actual power role that was stored in in battery-backed RAM. This commit fixes that bug by simply setting the default power role if and only if it hasn't been set already by going down the Soft Reset code path. BUG=None BRANCH=None TEST=flash nocturne, verify that soft reset path works. Change-Id: Ia2baeda2674c6febf4c8c04496a131698099dcdc Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1117368 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* USB PD: Initialize CC polarity during init.Aseda Aboagye2018-07-041-9/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, explicit PD contracts were not maintained after a reset, but that has recently changed. Now, if a PD contract is in place, a SoftReset is sent to the port partner to renogotiate the contract without dropping VBUS. However, the CC polarity was not initialized in this code path. On a system with external TCPCs, we may have been lucky and depending upon the orientation, the right CC line may have been used. This was actually breaking boards that did lose their TCPC state after reset. This commit simply initializes the CC polarity before potentially sending any PD messages. BUG=b:111114159 BRANCH=whichever take the new SoftReset after reset patches. TEST=Flash servo_v4; Plug in PD source to CHG port, reboot, verify that PD communication still works with the source following a reboot. TEST=Flash scarlet; Plug in a charge through hub with a charger and USB storage devices plugged in, reboot, verify that PD communication still works with the source following a reboot. Repeat the test in the other orientation. Change-Id: I85a16dd8982747a66883579bb8cf3673dbdd95d8 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1094264 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* sensor: Add flag for tight timestampingGwendal Grignou2018-07-031-0/+3
| | | | | | | | | | | | | | | | | | | Kernel needs to be aware of the the new timestamp code to apply proper filtering/spreading. This flag set means that timestamps are always after every sensor sample, and both timestamps (sensor sample and fifo info) are recorded with minimal latency and jitter. TEST=Add 'dev_err(dev, "feature 36 = %d\n", cros_ec_check_features(ec, 36));' in kernel/drivers/platform/chrome/cros_ec_dev.c See the bit set (16, not 0) in dmesg. BUG=b/111079027, b/109786990 Change-Id: Ia71703e035d7a6eac1e0a483caa62b7c75e5cb2a Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1123218
* common/bootblock: Pack bootblock in EC image.Yilun Lin2018-07-021-0/+24
| | | | | | | | | | | | | | | | | | | Packs a bootblock into EC image. The bootblock content will be firstly tranlated to eMMC emulated data, and then been packed to the RO image. Getting idear from: CL:1039105(which generates eMMC data as a header file). BRANCH=none BUG=b:80159522 TEST=BOOTBLOCK=xyz make BOARD=kukui -j BOOTBLOCK=xyz make BOARD=kukui -j # check it doesn't repack. BOOTBLOCK=abc make BOARD=kukui -j # check it repacks the bootblock. Change-Id: Ia1564d6c54aed7a91fc42210d6247bdecfd82f4e Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1075907 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* host_command: fix the memmap fixVincent Palatin2018-06-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The newly added size check must be performed against args->response_max (aka the size of the response buffer) rather than args->response_size (the actual size of the response which is always 0 when the handler is called). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chromium:855972 TEST=make buildfuzztests -j echo AwcAAAAAeg== | base64 -d > crash ASAN_OPTIONS="log_path=stderr" \ build/host/host_command_fuzz/host_command_fuzz.exe ./crash TEST=On Nocturne, run 'ectool --name=cros_fp version', no longer see a spurious 'EC result 3 (INVALID_PARAM)' Change-Id: I798d1dad2424398561d240a3b8190e4d0219339d Reviewed-on: https://chromium-review.googlesource.com/1120251 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* motion_sense: Provide option to defer resume actions.Jonathan Brandmeyer2018-06-281-2/+3
| | | | | | | | | | | | | | | | | | | See also crrev.com/c/433338. Grunt requires a delay on startup to account for the slew rate on the sensor power rails. Similar to the delay option for suspend actions, also provide a delay option for resume actions. BUG=b:79159777, b:35550738 TEST=KX022 init on S5->S3->S0 succeeds on both grunt clamshell and grunt convertible SKUs. BRANCH=none Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Change-Id: I061c4c148c5c31c09b8d0c1d40aef1ba1e3d344b Reviewed-on: https://chromium-review.googlesource.com/1091211 Commit-Ready: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* host_command: Fix response_size to match data that was copiedNicolas Boichat2018-06-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both host_command_read_test and host_command_test_protocol write back an incorrect response_size, that does not match the number of bytes that were actually copied. This is easily noticed when fuzzing with verbose host command printing, as host_command_debug_request attempts to print the whole response, reading the response buffer out of bounds. BRANCH=none BUG=chromium:854975 TEST= #define FUZZ_HOSTCMD_VERBOSE in test/test_config.h echo AwoAAAAALADvDAE= | base64 -d > crash Request: cmd=0013 data=03df1300007f0b000000007f00007f7f7f7f06 or echo AwMAAEpK | base64 -d > crash Request: cmd=0003 data=03650300004a01004a make buildfuzztests -j ASAN_OPTIONS="log_path=stderr" \ build/host/host_command_fuzz/host_command_fuzz.exe crash Change-Id: Ibc8fe958cf6fae38fbfecec558c37ed3d676a51b Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1116199 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ec: Make it possible to build tests using clangNicolas Boichat2018-06-285-19/+14
| | | | | | | | | | | | | | | | | | We might want to try out address sanitizer/fuzzer on some host tests: make it possible to build host tests using clang. Board builds are broken, and there is no intention to fix them, at least for now. BRANCH=none BUG=chromium:854924 TEST=make buildall -j TEST=make CC=clang runtests -j Change-Id: Id49a1b8537bc403d53437a2245f4fab6ceae89ac Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1107522 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* common/printf: snprintf: Return number of bytes on successNicolas Boichat2018-06-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | As indicated in the man page: """ Upon successful return, these functions return the number of characters printed (excluding the null byte used to end output to strings). """ There are no users of the return value currently in the EC code, but this matters when doing fuzzing, as libFuzzer calls std::to_string, which expects the correct return value. BRANCH=none BUG=chromium:854975 TEST=make buildfuzztests -j && ASAN_OPTIONS="log_path=stderr" \ build/host/usb_pd_fuzz/usb_pd_fuzz.exe -jobs=10 actually creates 10 output files. TEST=make run-utils_str -j Change-Id: If6a040f690dd847f4c88c3b8566554afdfbabc32 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1116625 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* host_command: read_test/memmap: Fix response buffer overflowNicolas Boichat2018-06-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | host_command_read_test/memmap expect to have at least 128 bytes available in response buffer, _after_ ec_host_response header. However, in the fuzzing test, we only use a 128 bytes response buffer, and set response_max to 128, correctly. host_packet_receive correctly computes the response payload size (i.e. 120 bytes): args0.response_max = pkt->response_max - sizeof(struct ec_host_response); But then host_command_read_test/memmap ignore response_max, and overflows that response buffer. BRANCH=none BUG=chromium:855972 TEST=make buildfuzztests -j echo AwMAAAMLxv0AgA== | base64 -d > crash ASAN_OPTIONS="log_path=stderr" \ build/host/host_command_fuzz/host_command_fuzz.exe ./crash echo AwcAAAAAeg== | base64 -d > crash Call fuzzer again. Change-Id: I1344842764a07f09546f3b0533b3ce154eff2732 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1116200 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* flash: Fix flash_range_okNicolas Boichat2018-06-271-0/+2
| | | | | | | | | | | | | | | | | | With parameter offset=0x7f000000 size_req=7f7f0000, flash_range_ok fails to notice that the offset/size is invalid, as offset+size overflows and becomes negative. BRANCH=none BUG=chromium:855951 TEST=make buildfuzztests -j echo AxMAAH8AAAB/AAB/f39/Bg== | base64 -d > crash ASAN_OPTIONS="log_path=stderr" \ build/host/host_command_fuzz/host_command_fuzz.exe ./crash Change-Id: I9e4c752bee2695a87e69c2ff8494af4e9bffc9a4 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1116198 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* led_pwm: Add CONFIG_LED_PWM_ACTIVE_CHARGE_PORT_ONLY.Aseda Aboagye2018-06-271-26/+90
| | | | | | | | | | | | | | | | | | This commit adds support for a feature for the common PWM controlled LED behaviour to only show the charge state instead of including chipset state and low battery state as well. Additionally, this feature will only illuminate the LED of the active charge port. BUG=b:69138917 BRANCH=None TEST=Enable option on nocturne and verify behavior is as expected. Change-Id: Ie6a767084c9102ff9b7bdad9288fcebf2ed9706f Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1109032 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* Nami: Set fan speed to CONFIG_FAN_INIT_SPEED on resumeDaisuke Nojiri2018-06-221-1/+3
| | | | | | | | | | | | | | | | | | This patch sets the target RPM to CONFIG_FAN_INIT_SPEED on chipset resume. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:80152440 BRANCH=none TEST=Verify target RPM is set to the value derived from CONFIG_FAN_INIT_SPEED in recovery mode on Akali. Change-Id: Ide0d6b8a0c895479af8afff0ba40a7b502bbbbbf Reviewed-on: https://chromium-review.googlesource.com/1110349 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* nvmem_vars: Make sure tuple structure is within boundsNicolas Boichat2018-06-221-4/+9
| | | | | | | | | | | | | | | The code uses a 0-byte to mark the end of the nvmem variables (which corresponds to tuple->key_len), check for that explicitly, then check if struct tuple fits within the nvmem. BRANCH=none BUG=chromium:854924 TEST=make TEST_ASAN=y run-nvmem_vars -j Change-Id: I7a974c64dec26c72de955f673d69a0712b023cb2 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1109616 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cr50: Disabling TPM or enabling TPM.Namyoon Woo2018-06-212-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a new firmware status, TPM mode along with a new TPM vendor command VENDOR_CC_TPM_MODE. TPM mode indicates whether TPM is enabled or disabled. Initially, this value shall be TPM_MODE_ENABLED_TENTATIVE, which means TPM is enabled but can be changed. VENDOR_CC_TPM_MODE changes this value either as TPM_MODE_ENABLED or TPM_MODE_DISABLED. This is for one time use only until next TPM reset event. Once TPM is disabled, any subsequent TPM commands shall fail. TPM_MODE_TPM_MODE command may be issued with input size as zero, which would not change TPM mode value. Either with the valid input value or without any input value, it returns the current TPM mode value in uint8_t type. This adds 160 bytes in binary. BUG=b:77543596 BRANCH=cr50 TEST=manually (chroot) ./extra/usb_updater/gsctool -h Usage: gsctool [options] [<binary image>] Options: -m,--tpm_mode [enable|disable] Query or control tpm mode (dut) gsctool -a -i Board ID space: XXXXXXXX:XXXXXXXX:XXXXXXXX (chroot) ./extra/usb_updater/gsctool -m enable (dut) gsctool -a -i Board ID space: XXXXXXXX:XXXXXXXX:XXXXXXXX (chroot) gsctool -m enable Error 7 in enabling TPM. (dut) gsctool -a -i Board ID space: XXXXXXXX:XXXXXXXX:XXXXXXXX (dut) reboot (chroot) ./extra/usb_updater/gsctool -m disable (dut) gsctool -a -i Problems reading from TPM, got 10 bytes Error: Failed to send vendor command 25 (dut) tpm_version [ERROR:... TRUNKS_RC_WRITE_ERROR (dut) tpm-manager [INFO:tpm_manager_v2.cc(51)] Initializing TPM. [tpm_manager.TakeOwnershipReply] { status:STATUS_NOT_AVAILABLE } (dut) reboot (chroot) ./extra/usb_updater/gsctool -m TPM Mode: enabled (0) (dut) gsctool -a -i Board ID space: XXXXXXXX:XXXXXXXX:XXXXXXXX (dut) tpm_version TPM2.0 Version Info: ... (dut) tpm-manager [INFO:tpm_manager_v2.cc(51)] Initializing TPM. [INFO:tpm_manager_v2.cc(66)] TPM initialization successful (21 ms). Change-Id: I1453d1a8d03f13cc7fc203863cbc50bf84c9dd8c Signed-off-by: Namyoon Woo <namyoon@google.com> Reviewed-on: https://chromium-review.googlesource.com/1105614 Commit-Ready: Namyoon Woo <namyoon@chromium.org> Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* ec/google: Add command to fetch keyboard ID from ECparis_yeh2018-06-202-0/+37
| | | | | | | | | | | | | | | | | Sort k-prefix host commands and descriptions in alphabetical order BRANCH=master BUG=b:80168723 TEST=Check 'ectool kbid' on a reworked DUT using keyboard samples Change-Id: If2ad654e5ef269d03365db7c3286c2281aa9d9ef Signed-off-by: paris_yeh <pyeh@google.com> Reviewed-on: https://chromium-review.googlesource.com/1097997 Commit-Ready: Paris Yeh <pyeh@chromium.org> Tested-by: Paris Yeh <pyeh@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Paris Yeh <pyeh@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* grunt: Enable tablet mode for convertible SKUs.Jonathan Brandmeyer2018-06-181-1/+1
| | | | | | | | | | | | | BUG=b:79159777 BRANCH=none TEST=EC functional test 1.2.18 on grunt convertible. Verified that a grunt clamshell wthat does not have a populated lid accelerometer works as expected. Change-Id: Ic9059d7d8f4f353475517ad3b8ef049ed653e9e4 Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1093255 Reviewed-by: Edward Hill <ecgh@chromium.org>
* FIXUP: motion_sense: Check presence of {set,get}_{range,offset}Gwendal Grignou2018-06-151-6/+12
| | | | | | | | | | | | | | | | | Allow get_ operation, even if set_ operation is not defined. Some device (magnetometer) have a fixed range, but the range is needed by the driver to calculate real value. BUG=b:110143516 BRANCH=none TEST=Check that a sensor where the range can not be changed (magnetometer) that we can read the range, but write to it returns "Invalid argument". Check bias are still accessible on all sensors. Change-Id: I38470eae624393fd93d9fff7a26d026b4a7984b8 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1101549
* battery: Move presence checks out of commonEdward Hill2018-06-141-62/+0
| | | | | | | | | | | | | | | | | | Undo some of CL:1072637 so that battery_is_present() and battery_hw_present() move back to baseboard. battery_fuel_gauge.c now only includes code which is directly involved with the fuel gauge. BUG=b:109894491,b:80299100 BRANCH=none TEST=make -j buildall Change-Id: I8fc5be3856564601019d94514dcfc8ffb3071c2e Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1097954 Commit-Ready: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* gpio: extend flags size to accommodate GPIO_ flagsJett Rink2018-06-111-29/+22
| | | | | | | | | | | | | | | | | | | Widen the flags field from 16-bit to 32-bit to fit all of the current GPIO_flags. Also reorder fields within struct to allow arm compiler to use 16-bit instructions instead of 32-bit instructions when accessing fields (which is important for kevin board, otherwise it runs out of space) Lastly, re-tool macros to all reordering of gpio_alt_func struct fields. BRANCH=none BUG=b:109884927 TEST=builds on all boards Change-Id: I20b136c94a607c19031a88bddd255cc34cc57bbd Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1096018 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* i2c: preserve 1.8V flag during raw i2c gpio accessJett Rink2018-06-081-2/+8
| | | | | | | | | | | | | | | | | | When we try to unwedge an i2c port, we change the pin type into a manually GPIO ODR. When we do that we should also carry over the 1.8V flag if it exists on the original GPIO definition. BRANCH=none BUG=b:109884927 TEST=verified with manually-created EC console command that low voltage register is not set when going into raw mode before this change and correctly sets the low voltage register after this change (when going into raw mode). Change-Id: I87515d53cc68ace3f69ea1058b83a378ef9a281c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1093011 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* keyboard_scan: Add "ksstate force" to always scan KB matrixNicolas Boichat2018-06-081-3/+9
| | | | | | | | | | | | | | | | | | | | For early bringup, or failure analysis, it is sometimes useful to be able to force enable the keyboard matrix scanning, even though other signals (lid close, usb off) would normally disable it. The only way to disable the scanning again is to wait for an lid/USB event, or reboot the board, which is ok as this is for debugging purpose only. BRANCH=none BUG=b:109743721 TEST=Provide power to whiskers via servo only. ksstate force => key presses are shown Change-Id: I3eaa9552ea52f7e3df45fdb6c8d0aa88c7b164b3 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1090350 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cr50: prepare for supporting both x25519 and p256 test keysVadim Bendebury2018-06-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | The signer script is checking the elf files for presence of test RMA keys, currently hardcoded to be x25519 keys. The algorithm (x25519 vs p256) is going to become a compile time option, the script should be prepared to determine the type of the key at run time, because the script could be used for signing images from different branches, compiled with different config options. The prod p256 key does not yet exist. BRANCH=none BUG=b:73296606 TEST=verified that prod signing images including x25519 keys is still working as expected. Change-Id: Icf48845279912ecc9ccdecec1764fcb5f85d22bd Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1079698 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* motion_sense: Remove unnecessary includeGwendal Grignou2018-06-071-1/+0
| | | | | | | | | | | | | | | accel_kionix is not needed directly. BUG=none BRANCH=none TEST=compile Change-Id: I0b8bf9885afeaa605dc3fd6672befdc77a9ba8cd Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1089452 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Gwendal Grignou <gwendal@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* charge_manager: Pass struct charge_port_info as constDaisuke Nojiri2018-06-071-2/+2
| | | | | | | | | | | | | | | | | This patch changes the prototype of charge_manager_update_charge to mark 'struct charge_port_info *' as const. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: I36211e75a51009d7f507897be85745f4ffbe797e Reviewed-on: https://chromium-review.googlesource.com/1089570 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb_charger: Always update VBUS charge supplierEdward Hill2018-06-071-11/+8
| | | | | | | | | | | | | | | | | | | | | | usb_charger_init() did not call charge_manager_update_charge() if we are sourcing VBUS. This means we can get stuck with charge_manager_is_seeded() never returning true, and so charging never starts, and power-on is prevented. Change update_vbus_supplier() so it always calls charge_manager_update_charge(), but with current = 0 when we are sourcing VBUS. BUG=b:80203727 BRANCH=none TEST=Reboot Grunt EC while one USB-C port is VBUS source. Change-Id: I24c29dc6b9ad9c50254181614a6440d2d055cd5a Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1086113 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* whiskers: Expose a switch for tablet modeNicolas Boichat2018-06-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | With this, whiskers exposes a tablet mode switch to inform the lid when the base is flipped around. We take this opportunity to clean up a bit whiskers/keyboard code: - Use tablet mode switch instead of lid switch - Refactor usb_hid_keyboard.c to accept either assistant key or tablet mode switch, or both. - Remove bit-field usage in HID report struct, and instead, generalize with an "extra" field that can be used for additional key/switches. BRANCH=none BUG=b:73133611 TEST=Flash whiskers, see that tablet mode events are sent when a magnet approaches the hall sensor. Change-Id: Ibf43bb04fdc867d18d9f318388d1ebd17b49d47f Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1077915 Reviewed-by: Wei-Han Chen <stimim@chromium.org>
* stm32: use D-cache on STM32H7Vincent Palatin2018-06-042-4/+5
| | | | | | | | | | | | | | | | | | | | Enable the D-cache on STM32H7. Use the ahb4 RAM region as uncached memory for DMA buffers. Mark the serial, SPI and fingerprint DMA buffers as uncached for proper operations. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=poppy BUG=b:78535052, b:75068419 TEST=On ZerbleBarn, run fingerprint match. CQ-DEPEND=CL:*616448 Change-Id: Ia33496ebde3508d3427e522cc7ba060829f8f3fd Reviewed-on: https://chromium-review.googlesource.com/1065822 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* chgstv2: Fix manual control via EC console.Aseda Aboagye2018-06-012-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | There was a recent change to save the manual setting of charge current and voltage, however it was done so assuming that the parameters were set via the host command interface. (CL:922069) However, there are times where the charge voltage/current would like to be manipulated without booting the AP. This commit simply makes the EC console command work again. BUG=None BRANCH=None TEST=make -j buildall TEST=Flash nocturne, `chgstate idle on; charger current 256; charger voltage 7400`; verify that the charge voltage and current is actually changed. Change-Id: Id250d9704f8509162518495556603950248fb267 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1081120 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* battery: Move fuel gauge code to commonEdward Hill2018-06-012-0/+227
| | | | | | | | | | | | | | | | | Move fuel gauge code to common to avoid duplication in octopus and grunt baseboards. BUG=b:79704826,b:74018100 BRANCH=none TEST=make -j buildall Change-Id: I58a615c9ed7906cb19b49c2baa36aaa619838cf1 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1072637 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cr50: add command for factory resetMary Ruthven2018-05-311-0/+5
| | | | | | | | | | | | | | | | | | | | | | | The factory reset command can be used to enable ccd factory mode. The command can open ccd if write protect is removed and ccd hasn't been restricted. Right now we check FWMP and the ccd password before allowing factory reset. Factory reset cannot be used to get around anything that disables ccd. This adds 72 bytes. BUG=b:77543904 BRANCH=cr50 TEST=Try enabling factory mode using factory reset. Verify setting write protect, setting the FWMP disable ccd bit, or setting a ccd password prevents factory reset from enabling factory mode. Change-Id: I6e203bf6068250f009881aa95c13bc56cb2aa9e7 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1069369 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* console: Do not flush the console in console_initNicolas Boichat2018-05-311-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, console_init calls cflush() twice, once before "Console is enabled" string is printed, once afterwards. The reason is that firmware_ECBootTime looks for that string, and it may get corrupted/interleaved with others if the EC is busy during initialization. The problem here is that the CONSOLE task may have higher priority than other tasks (for good reasons), but, on boot, there are other more critical tasks that need to run (e.g. RW image verification), rather than busy-looping waiting for the console to be flushed. By fixing firmware_ECBootTime to not look for the string anymore, we do not need those 2 console flush. BRANCH=poppy BUG=b:35647963 BUG=chromium:687228 CQ-DEPEND=CL:1075832 TEST=Flash staff, see that RW verification starts at 0.001037 instead of 0.028087 (=> 27 ms faster). TEST=test_that -b $BOARD $IP firmware_ECBootTime Change-Id: I794e48eb69cc647c4595fd80265adee4a434d566 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1073180 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* console_output: make chan a safe commandMary Ruthven2018-05-311-3/+3
| | | | | | | | | | | | | | | | | | We need to control the console channels for cr50 testing, so we need access to chan even if the console is restricted. Make chan a safe command so it is always accessible. BUG=b:80319784 BRANCH=cr50 TEST=on cr50 make sure the command is accessible no matter the console state Change-Id: Ia392f32c319c1acf9bb97b97d7f72c7e56427ce3 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1079452 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cr50: refactor rma mode into factory modeMary Ruthven2018-05-304-92/+113
| | | | | | | | | | | | | | | | | | | | | | | | We're doing a bit of refactoring to break out factory mode into its own file. Now factory reset and rma reset will be two methods of entering factory mode. Factory mode can be disabled with the disable_factory vendor command. Factory mode means all ccd capabilities are set to Always and WP is permanently disabled. When factory mode is disabled, all capabilities are reset to Default and WP is reset to follow battery presence. This adds 56 bytes. BUG=none BRANCH=cr50 TEST=verify rma reset will enable factory mode. Change-Id: I21c6f7b4341e3a18e213e438bbd17c67739b85fa Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1069789 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cr50: move RMA challenge-response to P256Vadim Bendebury2018-05-302-36/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the p256 curve is beneficial, because RMA feature is currently the only user of the x25519 curve in Cr50, whereas p256 support is required by other subsystems and its implementation is based on dcrypto. The p256 public key is 65 bytes in size, appropriate adjustments are being made for the structure storing the server public key and the key ID. The compact representation of the p256 public key requires 33 bytes, including the X coordinate and one extra byte used to communicate if the omitted Y coordinate is odd or even. The challenge structure communicated to the RMA server allows exactly 32 bytes for the public key. To comply, the generated ephemeral public key is used in compressed form (only the X coordinate is used). For the server to properly uncompress the public key one extra bit is required, to indicate if the original key's Y coordinate is odd or even. Since there is no room for the extra bit in the challenge structure, a convention is used where the generated ephemeral public key is guaranteed to have an odd Y coordinate. When generating the ephemeral key, the Y coordinate is checked, and if it is even, generation attempt is repeated. Some clean up is also included: even with debug enabled, generated challenge is displayed only once as a long string, convenient for copying and pasting. The new feature is not yet enabled, p256 support on the RMA server side is not yet available. Enabling p256 curve for RMA authentication saves 5336 bytes of the flash space. BRANCH=cr50, cr50-mp BUG=b:73296606 TEST=enabled CONFIG_RMA_AUTH_USE_P256 in board.h, generated challenge and verified matching auth code generated by the rma_reset utility. Change-Id: I857543c89a7c33c6fc2dc00e142fe9fa6fc642cf Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1074743 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* keyboard_scan: Add option to support keyboards with language IDparis_yeh2018-05-301-0/+37
| | | | | | | | | | | | | | | | | | | | | | | ID pins are considered additional KSOs while keycode scanning works for the existing KSI0 ~ KSI7. While diriving ID pins, the state of interconnection between ID pins and KSI pins could be used for identifiers to tell keyboard itself. (e.g. US, Japan,and UK keyboard) BRANCH=master BUG=b:80168723 TEST="make -j buildall" TEST=Verified 5 distinct keyboard samples w/ different Language ID values on the same reworked Coral, which VOL_UP and VOL_DOWN were reworked for ID pins. crrev.com/c/1053617 is my experimental patch on top of this for further verification Change-Id: I1d6e647df74c50d60bc1264c045b2587d0bf23d8 Signed-off-by: paris_yeh <pyeh@google.com> Reviewed-on: https://chromium-review.googlesource.com/1068951 Commit-Ready: Paris Yeh <pyeh@chromium.org> Tested-by: Paris Yeh <pyeh@chromium.org> Reviewed-by: Paris Yeh <pyeh@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* cr50: add support for enabling factory mode on bootMary Ruthven2018-05-301-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have determined the checks to run for board_is_first_factory_boot. This change updates cr50 to check for those conditions and enable ccd when the system determines that it is first boot in the factory. This will check that the board id is erased and the inactive image is a GUC image. The factory updates Cr50 from the GUC image, because those GUC images don't have support for everything they need to do in the factory. To determine that cr50 just recovered from that factory update, it will check that the GUC image is still in the inactive region and no board id is set. There are 2 images installed in GUC 0.0.13 and 0.0.22, so cr50 will check these versions. Future GUC images will have a field in the header declaring that they are a GUC image. I still need to create the GUC field in the header and check that in inactive_image_is_guc_image. Factory mode can't be enabled on deep sleep resume. It is only enabled after power-on reset or hard reset. This change also moves factory stuff into a factory_mode file instead of keeping it in board.c This adds 200 bytes. BUG=b:77543904 BRANCH=cr50 TEST=Verify factory mode is only enabled when cr50 recovered from reboot not deep sleep resume, 0.0.13 or 0.0.22 are in the inactive region, and the board id is erased. Change-Id: Ibece878049658493e8ad159121ada63d7a6f6b79 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1059864 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* charge_state_v2: Add a hysteresis for under-voltage throttlingPhilip Chen2018-05-301-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | There is a potential loop: (1) We throttle AP when we see under-voltage. (2) VBAT bumps because throttling starts. From our experiment, AP throttling saves ~1A, and thus VBAT increases by ~80mV. (3) VBAT hasn't hit BAT_LOW_VOLTAGE_THRESH for BAT_UVP_TIMEOUT_US, so we stop throttling. (4) VBAT again drops below BAT_LOW_VOLTAGE_THRESH. (5) Go back to (1). So let's introduce a hysteresis to under-voltage throttling. We stop throttling only when we are confident that even if we stop throttling, the battery voltage will stay above BAT_LOW_VOLTAGE_THRESH. BUG=b:73050145, chromium:838754 BRANCH=scarlet TEST=manually test on scarlet Change-Id: Ic0c17a7d37d5d6ee38c7b19f9b65d17421e55cbc Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1070568 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* system: Enable/Disable low power idle in run timePhilip Chen2018-05-301-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | We have enable_sleep()/disable_sleep() to enable/disable EC deep sleep mode in runtime. Here we introduce similar interfaces to enable/disable EC idle (sleep) mode. BUG=b:78792296 BRANCH=scarlet TEST=Confirm idle mode is enabled/disabled when enable_idle() and disable_idle() are called. Change-Id: I2484f08a066523441064968da99c47de9342ecf0 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/1072370 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> (cherry picked from commit c6b6626cdccef04b0ff203aaed0d84dbdcecf8b7) Reviewed-on: https://chromium-review.googlesource.com/1076708 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* acpi: Add map for controlling USB port powerEmil Lundmark2018-05-291-0/+55
| | | | | | | | | | | | | | | | | | | Some devices have GPIO pins that control USB port power connected to the EC, so they cannot be toggled by ACPI. This patch adds a memory map between the EC and ACPI that can be used on such devices. It can hold the power state of up to 8 USB ports. Currently, only dumb power ports are supported. BUG=chromium:833436 BRANCH=fizz TEST=On a fizz that runs BIOS with EC_ACPI_MEM_USB_PORT_POWER mapped, check that both reads and writes are propagated. Change-Id: I413defcb9e4d234fea7f54d46b6b8a1a10efa31e Signed-off-by: Emil Lundmark <lndmrk@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1069273 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* rsa: Further optimization of multiplications for Cortex-M0Nicolas Boichat2018-05-291-3/+3
| | | | | | | | | | | | | | | | | | | | In RSA, we often need to actually compute (a*b)+c+d: provide some assembly optimized functions for that. With -O3, 3072-bit exponent, lower verification time from 104 ms to 88 ms on STM32F072 @48Mhz. BRANCH=poppy BUG=b:35647963 BUG=b:77608104 TEST=On staff, flash, verification successful TEST=make test-rsa, make test-rsa3 TEST=make BOARD=hammer test-utils test-rsa3, test on board Change-Id: I80e8a7258d091e4f6adea11797729ac657dfd85d Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1071411 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb_port_power: Use same name for mode set functionEmil Lundmark2018-05-291-2/+2
| | | | | | | | | | | | | | | | | | | | | Dumb USB ports do not have the same notion of charge mode as smart ports. However, the header common/usb_charge.h declares a function for changing charge mode that the dumb USB port power implementation does not define. Instead, it defines a similar function with a different name, albeit with other allowed values for its second parameter. This patch makes the names the same so the function can be used by simply including the aforementioned header file. BUG=none BRANCH=fizz TEST=emerge-fizz chromeos-ec Change-Id: I87863f87f32f538cc1c723d9299afcc7353e1852 Signed-off-by: Emil Lundmark <lndmrk@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1069272 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb_pd_protocol: Only print TCPC info if availableNicolas Boichat2018-05-281-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | tcpm_get_chip_info does not modify the parameter info if the function is not implemented on the given chip. This has a interesting side effect on Kevin, where, for whatever reason, info's value ends up being 1, and causes unaligned access exception: [0.039 TCPC p0 init ready] === PROCESS EXCEPTION: 06 ====== xPSR: 61000000 === r0 :00000000 r1 :28000000 r2 :00000001 r3 :00000000 r4 :00000000 r5 :00000000 r6 :00000000 r7 :00000000 r8 :200c60f4 r9 :00000000 r10:100c0c3c r11:00000000 r12:200c52ed sp :200c5320 lr :100a9c71 pc :100abd5a Unaligned mmfs = 1000000, shcsr = 70008, hfsr = 0, dfsr = 0 BRANCH=none BUG=none TEST=On ToT make BOARD=kevin -j; flash, kevin boots Change-Id: Ie7e758d5fb8c31180f36b073b635e54cc720a8a0 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1073179 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* rsa: Optimization of multiplications for Cortex-M0Nicolas Boichat2018-05-281-6/+6
| | | | | | | | | | | | | | | | | | | | | | | We multiply 2 32-bit numbers (and not 64-bit numbers), and then add another 32-bit number, which makes it possible to optimize the assembly and save a few instructions. With -O3, 3072-bit exponent, lower verification time from 122 ms to 104 ms on STM32F072 @48Mhz. Optimized mac function from Dmitry Grinberg <dmitrygr@google.com>. BRANCH=poppy BUG=b:35647963 BUG=b:77608104 TEST=On staff, flash, verification successful TEST=make test-rsa, make test-rsa3 TEST=Flash test-utils and test-rsa to hammer => pass Change-Id: I584c54c631a3f59f691849a279b308e8d4b4b22d Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/449024 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* console_channel.inc: Add more ifdef to reduce number of channelsNicolas Boichat2018-05-261-2/+2
| | | | | | | | | | | | | | | There are still more ifdef than can be added: this just takes out the low hanging fruits. BRANCH=poppy BUG=b:35647963 TEST=make buildall -j, see that we gain from 0 to 64 bytes on many boards. Change-Id: Ibe85b8bfa5d5c22c160e4a6656104256067beee9 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1070948 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ccd_config: Simplify open and passwordRandall Spangler2018-05-251-108/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow setting password from the AP, but not from USB. Remove the old password control logic, which is no longer needed. Allow open if: - Not explicitly blocked - Not blocked via FWMP - One of the following is true: - A password is set - Battery is removed (also doesn't require physical presence) - Dev mode is on, and request came from the AP Reduces cr50 binary by 152 bytes. BUG=b:79983505 BRANCH=cr50 TEST=manual, with a CR50_DEV=1 build ccd oops ccd lock ccd unlock -> fails gsctool -U -> fails from host gsctool -t -U -> fails from AP ccd oops ccd password foo -> fails from console gsctool -P -> fails from host gsctool -t -P -> works from AP ccd get -> confirms password set ccd lock ccd unlock foo -> works ccd lock gsctool -U -> works from host, if correct password supplied ccd lock gsctool -t -U -> works from AP, if correct password supplied ccd open foo -> works ccd lock gsctool -O -> works from host, if correct password supplied ccd lock gsctool -t -O -> works from AP, if correct password supplied ccd oops ccd lock (remove battery) ccd open -> works without physical presence (reattach battery) ccd lock gsctool -O -> works from host ccd lock gsctool -t -O -> works from AP, if dev mode is enabled Change-Id: I364b322d03db250e7dd140767d7a22dbb3ac1eef Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1072957 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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