| Commit message (Collapse) | Author | Age | Files | Lines |
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For entering into Thunderbolt-Compatible mode with active
cable, the port sends Enter mode command for SOP', SOP''
(if the cable has a SOP'' controller) and SOP respectively.
If the port doesn't receive GoodCRC from Enter Mode SOP'',
the port resets the cable characteristic and exits the
Thunderbolt-Compatible mode discovery.
This CL enables SOP'' communication with the cable plug
and adds support to enter into Thunderbolt-compatible mode
with active cables.
BUG=b:140643923
BRANCH=None
TEST=Able to enter into Thunderbolt-Compatible mode for
active cables.
Change-Id: Iea0c652043933047e0158265c911775d4afe5758
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2001938
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The original set_offset() and get_offset() codes in the
driver/accelgyro_bmi160 use simple divisions to write the data.
The more times the set_offset() and get_offset() is used, the
data will get closer to 0.
Fixing it by replacing simple division to round_divide(), division
that round to nearest, in the common/math_util.c.
BRANCH=octopus
BUG=b:146823505
TEST=Testing on octopus:ampton on branch [firmware-octopus-11297.B].
Checking the data did not rounding to 0.
Change-Id: Ide9df9e32fc501e63d6f952cb8254df7662afd23
Signed-off-by: Ching-Kang Yen <chingkang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2002998
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
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This patch allows the ec to manage two fans. Currently common/thermal.c
cannot monitor more than 1 fan at the same time. This CL implements a
board-specific thermal policy with multiple fans.
BUG=b:141259174
BRANCH=hatch
TEST=thermal team verified thermal policy is expected.
Change-Id: I6ababcb0795408e8062b7605bc749e23b8bde45a
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1936077
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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This patchset enables storage of MessageId counter received from the
cable plug.
Since SOP*(Cable) communication and SOP(Port Partner) have separate
MessageID counters, it is necessary to store separate messageIDs to
avoid the the incoming packets from getting dropped.
BUG=b:148481858
BRANCH=None
TEST=Tested on Volteer, able to maintain separate MessageId count for
SOP and SOP' communication.
Change-Id: Iac2dc616f99a9e19914588e59441df8b09068afa
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2026650
Reviewed-by: Keith Short <keithshort@chromium.org>
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USB4 is based on the Thunderbolt 3 protocol specification. It
supports 40 Gbit/s throughput, is compatible with Thunderbolt 3,
and backwards compatible with USB 3.2, USB 2.0.
USB4.0 PD Flow:
Ref: USB Type-C Cable and Connector Specification 2.0
Figure 5-1 USB4 Discovery and Entry Flow Model
USB PD Explicit Contract
Discover ID SOP -------- USB4 compatible?
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-------------yes------------|------No----- Exit USB4 Discovery
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Discover ID SOP' --------- Product type
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Passive cable----------|----Active Cable---USB4?
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| (Not implemented in this CL)
USB Signaling -----------------------
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| USB4 with USB4 active cable Exit USB4
| Discovery
---------------------------------------------
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USB4 Gen3 USB3.2 Gen2 USB3.2 Gen1 USB2.0
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Enter USB4 with | Enter USB4 with Exit USB4 Discovery
USB4 Gen3 | USB4 Gen1
Passive cable | Passive cable
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DFP Gen3 capable?
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------yes---- |---------No--------
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Discover SVID SOP Enter USB4 with USB3.2 Gen2 Passive Cable
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Discover SVID SOP'
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Discover Mode SOP
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Discover Mode SOP' --------Is TBT3?
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-----yes----|-----No----
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Enter USB4 with TBT3 Enter USB4 with TBT
Gen3 passive cable Gen2 passive cable
BUG=b:140819518
BRANCH=None
TEST=With Gatkex creek 3 device, TGLRVP can enter to USB4.0 mode
Change-Id: Id861661c66c53a0a32679388bb7e2e81aae3ceb5
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1926382
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Fix ioex_is_valid_interrupt_signal() and IOEX_INT() to account for
IOEX_SIGNAL_START correctly.
BUG=none
BRANCH=none
TEST=ioex_enable_interrupt() returns success
Change-Id: I8f13fa8f2d645aae565ac1062eab4a4d0968c4bc
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031649
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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If the last message ID received was a 0, then executing "pd N soft"
on the EC shell would incorrectly mark the next message received as
a repeat message. This change resets the last received message ID
to the invalid value before executing the soft reset.
BUG=b:146811519
BRANCH=firmware-hatch-12672.B
TEST=Executing
"pd 0 swap power
pd 0 soft"
while connected as a SNK to a servo V4 no longer results in a loop
because the message was not marked as a repeat any more.
Change-Id: I754d1d3ed9f7a4a5163b0f3cd4bb844f47e0ccc7
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2028359
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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When we have SNK_DTS polarity, we still want to drive both CC
lines with the appropriate pull. SRC_DTS should not show as
having a polarity. Non-DTS should show the correct polarity.
We were only handling the last sentence of that.
BUG=b:147754772
BRANCH=none
TEST=verify SuzyQ works on zork
Change-Id: I013f9d881427d6d97b655f88cfb3a94e3ed10c61
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2022914
Tested-by: David Schneider <dnschneid@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Iadb75b9b187a0444c445c2641ec71d592cf4ac92
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2013228
Reviewed-by: Keith Short <keithshort@chromium.org>
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When refusing a PR_Swap, DR_Swap, or VCONN_Swap the Reject control message
needs to be used rather than Not_supported.
BRANCH=None
BUG=b:64411727
TEST=tested with a PD 3.0 hub which always requests a DR_swap upon
connection. Previously, it would leave its cc line at NG upon receiving
the unexpected Not_supported response and it now leaves the line at OK.
Change-Id: Ifafbadece5c45e51f4100be5e3590c07fcb27346
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1250023
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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When an explicit contract is in place for PD 3.0, the source shall
control the Rp value in order to facilitate collision avoidance. When
the value is set to 1.5 A, the sink can only respond to an existing AMS,
and not start a new one.
An Atomic Message Sequence (AMS) is defined as "a Message sequence that
starts and/or ends in either the PE_SRC_Ready, PE_SNK_Ready or
PE_CBL_Ready
states." This means any given PD message may be starting an AMS
(requiring the source to set Rp, and sink to check the CC level) or it
may be a response within an AMS (in which case, sink may send regardless
of CC levels).
This change adjusts the pd_transmit() calls to indicate whether any
given PD message is the beginning of an AMS. There are many AMS's
defined, which may be found in section 8.3.2 of the PD 3.0 spec.
Anytime the source returns to its ready state, it will reset Rp to
reflect that the sink may start an AMS.
Additionally, this removes the buffer for sending PD messages. If an
AMS cannot be started, then it's better to fail the send so the pd_task
state machine can handle the unsent message.
BRANCH=None
BUG=b:64411727, b:147476471
TEST=Tested with bip board with PD 3.0 config using 2 different PD 3.0
hubs. Monitored Twinkie output with hubs acting as source, sink, and
power swapping to source. Also turned off PD 3.0 to ensure PD 2.0
behavior with the hubs was unaffected.
TEST=Tested on volteer board with PD 3.0 config using Thunderbolt
capable dock.
Change-Id: Ib02670add1a125217a981a846e6e2c31681de169
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1246273
Tested-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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BUG=b:148114593
BRANCH=none
TEST=tested on Volteer, able to get correct TBT control flags
Change-Id: If673d4a194d3cc6b9579f0f32511c6363f2614f3
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2013825
Reviewed-by: Keith Short <keithshort@chromium.org>
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BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: I70625ee9ffe9a3d5c6de73bd80eb5530db39bca7
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2025769
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: I0b9cb76adbc5e385cb20256f693bd2b0687b30de
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2024428
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Ia2ad22669a908e9b9c23c4b73e97872399049e75
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2024427
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Add convinience functions for initializing, adding, and subtracting
vec3.
BUG=None
BRANCH=None
TEST=buildall
Change-Id: I594db350863a8199eade15a38deb6c223e2ae1ac
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1869729
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
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Update magnetometer calibration algorithm to leverage
the new kasa standalone code.
BUG=b:138303429,chromium:1023858
TEST=added unit test
BRANCH=None
Change-Id: I5c0403b66d9fe7c2925b2ec6244cf9e32ad5ea5f
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1931464
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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The other driver structure members return an ec_error_list value and
fill in parameters to return data. This commit changes the
get_vbus_voltage call to follow that model.
BRANCH=None
BUG=b:147672225
TEST=builds
Change-Id: I7308502a9734274dd308b830762493c4d70d147a
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2015340
Reviewed-by: Jett Rink <jettrink@chromium.org>
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With upcoming boards which use multiple charger chips, the EC codebase
needs to be changed to assume chargers may have different I2C ports.
This commit creates the driver structure and wrapper functions, which
for now are hard-coded to chip 0 for equivalent behavior with previous
code. A general charger config is created for all boards in charger.c
for now, which uses the build information to fill in the structure.
All boards will default to defining CONFIG_CHARGER_SINGLE_CHIP, which in
turn defines a CHARGER_SOLO which can be used by drivers which have code
that needs to determine charger numbers. For boards which have multiple
chips, they may undefine this config and should generate build errors if
their driver is still using the hardcoded charger reference of
CHARGER_SOLO. Older drivers may continue using CHARGER_SOLO in
non-static functions until they're needed in a multiple charger board.
For boards which may be supporting different I2C configurations for the
charger over board versions, they may define
CONFIG_CHARGER_RUNTIME_CONFIG to fill in these fields after boot.
BRANCH=none
BUG=b:147672225
TEST=builds, chargers on hatch and octopus work
Change-Id: I390ede494226252e512595c48099fa1288ffe93e
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008451
Reviewed-by: Jett Rink <jettrink@chromium.org>
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When tcpm_init() runs (ex. during a phy layer reset), it will cache an
Open state for the CC pull. This can cause Open to be presented on the
CC lines during the next call to set polarity. The Attached.SNK state
already ensures Rd is set by calling set_cc explicitly, and this change
adds an explicit set to Rd for Debug Accessory.SNK as well.
BRANCH=None
BUG=b:147316570
TEST=loaded on waddledoo, ensured CC lines weren't set to Open when
suzy-q was plugged in
Change-Id: I17ea735632e10c666691c04d56057c57688dcbd6
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2023240
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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BUG=b:145796172
BRANCH=none
TEST=make buildall -j
Change-Id: Ie4ffaf208745764262931501f0dff77b525a4e59
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2017569
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: If9d902ef77da7d56a123c0c78b1ebbcd0d95bc3b
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008301
Reviewed-by: Keith Short <keithshort@chromium.org>
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BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Id5cb4475a4bdf37947a6b1484441dadb7aa2d214
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008300
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Ia858db061811c58a14b2525d17d6abdc35ea6fa7
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008299
Reviewed-by: Keith Short <keithshort@chromium.org>
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BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Ibcf7b23c9b4c166a59c00b4805d1fbad5e79e5f1
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008298
Reviewed-by: Keith Short <keithshort@chromium.org>
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uart_put_raw sends byte stream without translating '\n' to '\r\n'.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/119329144,chromium:998135
BRANCH=none
TEST=Boot Nami
Change-Id: Iaac4244d45231bf5904d917f2f446f87e8e10c50
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1757273
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
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Commit 9f392b0d6 gave unique values to IO signals implemented on an IO
expander, but last_val_changed was not updated to remove the newly added
offset before indexing the array that tracks changes between `ioexget`
invocations.
Remove the offset and add an assertion to ensure the array index is
valid.
BUG=None
BRANCH=None
TEST=`ioexget` doesn't assert or stomp on memory
Signed-off-by: Michael Auchter <michael.auchter@ni.com>
Change-Id: If06d300abaeed2905939d9724a1152d4da10035b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2012448
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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This host command is used to report the static capabilities of a USB-PD
port, including its power role, Try power role, data role, and its
physical port location on the device. This will be used to expose the
information in ACPI, via the EC object.
BUG=b:146506369
BRANCH=none
TEST=Along with coreboot changes, dump the SSDT, and verify
that the object looks as expected.
Change-Id: Ie1975a8b391eba6e924b0552ba9b0973fd2c63f3
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2015825
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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There is a console command to log the panic info data to the UART
console. This change modifies it so after printing data to UART,
it will also pass it to the USB console so the data can be easily
logged by servod.
BUG=chromium:1018008
BRANCH=servo
TEST=Manual testing on Sweetberry, ServoV4, and ServoMicro
1) Unplug device to clean panic info, plug device in to USB
2) Request 'panicinfo' from the console interface
3) Response 'No saved panic data available.'
4) Trigger crash using commands like 'sysjump 0x100' or 'crash assert'
5) Reconnect console
6) Request 'panicinfo'. Fault registers are returned over USB console
and UART console. The values match the correct addresses which is
easily verified in the sysjump case.
Change-Id: I5b0bb102296f5fcc967519bb3a59af49644e6f4b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1880579
Tested-by: Brian Nemec <bnemec@chromium.org>
Commit-Queue: Brian Nemec <bnemec@chromium.org>
Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
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Passive cables without Intel SVID can nack to the Discover SVID SOP'.
For these cables, limit the speed of TBT device to cables speed or TBT
Passive Gen2 cable speed whichever is lowest.
Ref: USB Type-C Cable and Connector Specification 2.0
Figure F-1 TBT3 Discovery Flow
BUG=b:147732811
BRANCH=none
TEST=Manually tested on Volteer.
Using Rev2 Gen1 cable device can enter into TBT mode
Change-Id: I654056f434501898e60152c52f6d85f81ae35a78
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2003506
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Without this change, sometimes the comparison to PWM_LED_NO_CHANNEL
would fail causing a panic by attempting to use a non-existent PWM
channel.
BUG=None
BRANCH=None
TEST=build and flash waddledoo, verify that EC doesn't panic anymore.
Change-Id: I0d496eaea6d7bdbc7c655796a4df12a0f9f7cf0b
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2004268
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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With low power mode disabled, TCPMv2 was failing to build. Making these
changes allowed it to build.
BUG=None
BRANCH=None
TEST=`make -j BOARD=waddledoo`
Change-Id: I5bed5d7ca7ceab77d5b764e97853c1d6bc51eb3d
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2001128
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Add an implementation of the kasa sphere fit algorithm
adapted from AOSP.
BUG=b:138303429,chromium:1023858
TEST=Added unit tests
BRANCH=None
Change-Id: I8194bfaddbb7c57a2b20a1917c91f7c78707e685
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1867226
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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BUG=b:142911453
BRANCH=none
TEST=make buildall -j
Change-Id: Ibdd840efd79dbba1e2836f990ec86515ae08c919
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2008297
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add a i2c_set_freq function and let chip drivers add their underlying
implementation.
Also implemented on stm32f0.
BUG=b:143677811,b:78189419
TEST=1) make
2) On kodama, call i2c_set_freq(1, 100) during init.
verify the bus is configured to 100kbps in kodama rev 1
BRANCH=kukui
Change-Id: Iebb5baacf098b3e5649a4bd8ca14acf097d39693
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1969245
Reviewed-by: Matthew Blecker <matthewb@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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some of the usages of this static variable were used in
overridable functions and they also had their own static
variable for this same purpose. Since it is not required
to override all of the functions, this left two variables
out of sync with one another. So made them the same variable.
BUG=b:147535104
BRANCH=none
TEST=make buildall -j
Change-Id: Ic560d3a2a2e129450e918e0cb6dfff75fd1222a2
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2002953
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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When TBT or USB4 mode is enabled, by default all the ports are assumed to
be supporting TBT or USB4. However, not all the ports may support TBT &
USB4 due to dependency on retimer and platform level Aux/LSx muxing.
This board level function can override the TBT & USB4 logic based on board
design.
Ref: TGL PDG
5.2 USB-C* Sub-System:
a. otherboard should have re-timer for all USB-C connectors that
supports TBT.
b. Aux/LSx platform level muxing is required.
BUG=b:147658946
BRANCH=none
TEST=Manually tested on Volteer
TBT & USB4 mode detection and entry is allowed only on Port-1
Change-Id: I07b339023a4da6bd69382420f3aa11ed82379179
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2001221
Reviewed-by: Keith Short <keithshort@chromium.org>
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From the TGL PDG, MAX TBT signals routing length can be 205mm prior to
connection to re-timer. Orthogonal routing with such length would results
in adverse effect to channel margin, as described in Fiberweave White
Paper. Hence, added overridable function to override the TBT cable speed
based on the board design.
BUG=b:147498371
BRANCH=none
TEST=Able to detect TBT3 devices on Volteer
Change-Id: I4490bc507c2c12b26372ed86e485c0491f1a9f21
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1998544
Reviewed-by: Keith Short <keithshort@chromium.org>
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This patch allows chargen to print output to USB instead of UART,
which is chosen by command parameter.
If USB console is not supported, then the parameter will be ignored,
and output shall go to UART port.
The patch increases flash usage by 48 bytes if CONFIG_CMD_CHARGEN
is defined.
BUG=chromium:992607
BRANCH=None
TEST=manually ran on fleex.
for BOARD in {cr50, fleex}
1. Define CONFIG_CMD_CHARGEN in board/cr50/board.h,
and baseboard/octopus/baseboard.h.
2. Build binaries, and program them.
3. Connect CCD to Octopus Fleex.
4. Open terminal to Cr50 and EC consoles, and run chargen
(cr50) chargen 1 4
> // no output, because they went to UART.
(cr50) chargen 1 4 usb
0000
>
(ec) chargen 1 4
0000
>
(ec) chargen 1 4 usb // usb parameter gets ignored.
0000
>
Change-Id: I5810421fef56548e0bd667488e853e724f699a31
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1769386
Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
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Before sending SOP' requests to cable plug, the port checks if
the port is the Vconn source. If the port isn't the Vconn source,
it can't talk to the cable.
From USB PD spec 1.3 sections 2.6.1 and 2.6.2, during an explicit
contract, after the data and power role swaps, if any, source/sink
can initiate or receive a request for exchanging the Vconn source.
Hence, adding support for the port to request Vconn swap, if it
hasn't already been swapped.
BUG=b:147209888
BRANCH=None
TEST=Checked on volteer, able to communicate with the cable plug
Change-Id: I36d896eda6319970b1a0a9bd7cc4efcbc381c8b1
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1988234
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL fixes an issue where USB PD would not allow the max request
when there is currently no charge port. This was causing issues
following the jump to RW when the PD contract gets
reestablished. There is a race condition between the PD contract
negotiation and the charage manager being updated from the first 5V/3A
state. This race condition results in selection of the vSafe5V PDO and
this can cause problems with external adapters resulting in a hard
reset. Note that this problem only occurs when no battery is present
since otherwise there wouldn't have had a pd contract negotiated when
the EC is executing from RO.
BUG=b:145783611
BRANCH=firmware-hatch-12672.B
TEST=On Kohaku using the kohaku provided external adapter, verified
that kohaku can boot to the OS when SW sync is enabled and no battery
is present.
In addition, connected two kohaku chargers simultaneously (via power
strip on button) and verified that only one port negotiates VBUS at 20V.
Change-Id: I68b21f2a86634d4bae91a5b812f2a61b302b0ef3
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1993914
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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BUG=b:147249926, b:146623068
BRANCH=none
TEST=make buildall -j
Change-Id: Ibb24bdad4e9ec24b02106c05ca5fe51269efcb1c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1990425
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Forgot to change odr_event_required in the console command accelrate.
Fixup of crrev.com/c/1470772
BUG=b:111422556,chromium:562245,b:124085261
BRANCH=none
TEST=Using accelrate ID ODR 1 change the ODR on sensor ID.
Change-Id: I62b5d4b120e212ad74c976923270f29176266870
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1992840
Reviewed-by: Yuval Peress <peress@chromium.org>
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Memset() initialize structure pointer fx member point to
code address 0 in pd_dfp_pe_init(). When we receive ack of
discover mode, we will input svid 0 to pd_dfp_enter_mode(),
and if the value of code address 0 and 1 is also same as 0x0000.
It means that we will get the both match mode index value 0
in allocate_mode(), but now the pe[].amodes[].fx point to
NULL, and later executing enter VDM mode results in EC reset.
So in order to get the right mode index, we need check if
the pointer is NULL or not when we compare with SVID in
get_mode_idx().
BUG=none
BRANCH=none
TEST=check logs via UART and Lecroy on reef_it8320, ampton,
PD EVB with risc-v core:
1.connect to adapter: state to SNK_READY
2.connect to dongle: state to SRC_READY, and done VDM
enumeration.
Change-Id: I709efc71f4e64540f1526967dca41e8c2bf34a02
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966822
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Assuming online calibration is enabled, and the driver implements
the get_temp function. When a driver stages data, if this is the
first staged sample, read the current internal sensor temperature
and cache it (will later be used in commit_data()).
BUG=b:138303429,chromium:1023858
BRANCH=None
TEST=buildall
Change-Id: I8e5404e628d3e8ded7c2d75b1b5cbac8166e97aa
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1867225
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Ref: USB Type-C Cable and Connector Specification 2.0
F.2 TBT3 Discovery and Entry Flow
- Corrected the TBT3 Discovery flow
- Corrected the TBT3 Entry Flow
- Enabled the Active cable TBT3 mode entry
- Refactored TBT & Cable VDO code on TCPMv1 so that same VDO
structures can be used for TCPMv2
- Corrected getting the cable version
- Cleaned up the code for super speed cable detection
BUG=b:146006708, b:140643923, b:147134610
BRANCH=none
TEST=Make buildall -j
Able to detect Thunderbolt-compatible devices on TGLRVP
Change-Id: I65f82e241d0cc2187050913e7d16942fdaa0ebd4
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1981276
Reviewed-by: Diana Z <dzigterman@chromium.org>
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the tc versions were doing the same thing as the pd version
so removed the duplication
BUG=b:147290482,b:147314832
BRANCH=none
TEST=make buildall -j
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Change-Id: Iaa48dcd65e3a6c325b0ae2cca33e629fec6e33c9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1993861
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Modified the USB MUX common driver to correctly configure the
retimer data based on the current USB MUX info.
BUG=b:145943811
BRANCH=none
TEST=DP works on Volteer
Change-Id: I5f37bcc0647f07b94fd9ee33913610cf6ae70c80
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1992842
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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When testing on nucleo board (not host attached), MKBP is not
compiled in. Be sure sensor code is not using any code from MKBP.
BUG=none
BRANCH=none
TEST=board nucleo-f072rb_iks01a2 compile.
Change-Id: Ic1e1a277affa3d0798e62171d4d477e2cb17366b
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1992799
Reviewed-by: Yuval Peress <peress@chromium.org>
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The optimization was not working as expected on some
hardware. So for safety reasons, just removing the
don't write optimization
BUG=b:147338240
BRANCH=none
TEST=verify I2C works properly on USB-C
Change-Id: I0c65e52c83f787c05ae8e26b37c086d24fb33cc6
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1992851
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org>
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