| Commit message (Collapse) | Author | Age | Files | Lines |
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BRANCH=none
BUG=b:178648877
TEST=view in gitiles
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I0ac5581ba7bc512234d40dbf34222422afa9c725
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2650551
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Rather than passing in the port and iterating over the global
spi_devices variable, pass in the specific spi_device that is being
enabled/disabled. The spi_device_t struct has the port.
This change makes the functions in spi.h more consistent since they now
all take a spi_device_t*. This change is the first step in making the
SPI configuration more dynamic.
BRANCH=none
BUG=b:177908650
TEST=git grep 'spi_enable(CONFIG' => no results
TEST=make buildall
TEST=Flash dragonclaw v0.2 and view console to verify FP sensor ID
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I64124e0ebcf898e88496acb77703b5f59ae931c2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2654081
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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CL:2644843 modified the TC state machine to prevent changing the USB mux
state from the CHIPSET task. However, that change also caused
transitions to and from suspend states to update the mux, clearing any
althernate mode information (DP, TBT, and USB4).
Update the TC so that only chipset startup and shutdown transitions
update the USB mux.
BUG=none
BRANCH=volteer
TEST=make buildall
TEST=Connect USB4 partner, verify USB4 entered. Force AP into S0ix and
resume, verify USB4 mode is still active.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: If6e9c3a5f017918a985f78a09873f02ccd7121fd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2653339
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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On EC chips that support CONFIG_CHIP_DATA_IN_INIT_ROM, the code
execution RAM is smaller than flash, leaving some flash unused.
The CONFIG_CHIP_DATA_IN_INIT_ROM moves the .data section into the unused
flash area, where it is copied directly into data RAM at startup.
Add a new attribute __const_data that allows constant data objects to
link into the .data section instead of .rodata.
This saves 1600 bytes of RO and RW flash space on boards that enable
CONFIG_CHIP_DATA_IN_INIT_ROM.
delbin_npcx796fc
eldrid_npcx796fc
halvor
lindar
lingcod
magolor_legacy
malefor
metaknight_legacy
terrador
todor
trondo
voema
volteer_apmodeentry
volteer
waddledoo
BUG=none
BRANCH=none
TEST=make buildall
TEST=boot Volteer and verify USB-PD operation
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ibb97a499442bbab8185b1d07f8867a7af1e793f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2651208
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Correct the binary search interval for small x.
The range should be at least [0, sqrt(2 ** 31)] ~= [0, 46341].
Also fixed some corner cases and added unit test for it.
BUG=b:177384512
TEST=1)`watch -n 0.3 ectool motionsense lid_angle`
verify the angle looks reasonable.
2) TEST_LIST_HOST=fp make runhosttests
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I394fe3a59ac51ec4491a24399848f179c1074b95
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2646041
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Yilin Yang (kerker) <kerker@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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Add basic panic implementation for Zephyr. Not using any fancy shared
or always-on memory for now ... need to resolve how that will be
handled later.
BUG=b:178011288
BRANCH=none
TEST=run various crash commands on volteer, observe output
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ia1ce386f738283a2a2b9b60ef7e0bf97f8317837
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2645687
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Add MKBP support to zephyr.
BUG=b:173507858
BRANCH=none
TEST=make buildall -j8
build volteer on zephyr
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com>
Change-Id: I9b7d979241b0df5dc0fa5d9741f05dc9875189ab
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639854
Reviewed-by: Keith Short <keithshort@chromium.org>
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During power contract negotiation, after sending Accept, wait for
tSrcTransition before transitioning the supply and sending PS_RDY. See
PD r3.0, v2.0, Table 7-22.
BUG=b:173023378
TEST=Pass TDA.2.1.2.2 using MQP compliance tester (or at least don't
fail due to sending PS_RDY too early).
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I76e31ff5df6bfd71f78642bda25e1e8f9f590f9c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644179
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: JC Huang <j.c.huang@quanta.corp-partner.google.com>
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If the Type-C devices are connected in S0 and when DUT enters S3/S0ix,
if the type-C devices are disconnected and re-connected, Kernel won't
receive the disconnected state from EC once DUT boots to S0 as EC moves
on and updates the new connected state to Kernel Mux driver.
This leads to failure of Type-C device detection on resuming to S0
from S3/S0iX. To overcome this scenario, adding an explicit condition
to send previous disconnect state to Kernel Mux driver once initial mux
request is received upon resuming from S3/S0iX.
Missing Disconnect mode Patch Details:
Set disconnect latch flag for the init and disconnect requests
For AP to EC PD command: EC_CMD_USB_PD_CONTROL
-Check disconnect latch flag if it is true set pd.enabled = 0
For AP to EC mux command: EC_CMD_USB_PD_MUX_INFO
-Check the disconnect latch flag if it is true then send disconnect mode
-Reset the disconnect latch flag
-Send host event EC_HOST_EVENT_USB_MUX for configuring the virtual mux
with the latest Mux configuration
BUG=b:176604380
BRANCH=None
TEST=Type C devices in s0ix disconnect/connect or
swapping across the ports scenarios tested
Change-Id: Ic38d3632cb0fadb29393405e13ed3606a740c81e
Signed-off-by: Madhusudanarao Amara <madhusudanarao.amara@intel.corp-partner.google.com>
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2632551
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This patch makes pchg task disable the interrupt on shutdown and
initialize pchg chips on start-up.
Tested as follows:
1. Run dut-control power_state:on -> off -> on.
2. Run dut-control power_state:reset.
Do 1 and 2 with and without a stylus attached and verify pchg task
remains under control.
BUG=b:176725734, b:173235954
BRANCH=trogdor
TEST=CoachZ
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I0b1b5501975ad6c8a89041639d3fa90a71b4e9b5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643586
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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If the cables has been queried with PD 3.0, but the port partner
supports PD 2.0, re-discover the cable capabilities.
BUG=b:178077239
BRANCH=None
TEST=Tested with PD2.0 dock and PD3.0 cable, able to enter Thunderbolt
mode.
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: I559f57a64a525a7ee0ae8744f88ec347688fe880
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643580
Reviewed-by: Keith Short <keithshort@chromium.org>
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When the device has a USB superspeed UFP (which is uncommon, this is
either servo v4.1 or a laptop port in SS device-mode), if we connect as
a sink *before* trying PD communication, we should connect the SS mux
without waiting for the partner PD comm capability as we might never be
able to communicate with it over PD.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=b:150614702
BRANCH=servo
TEST=use the sink mode enabled by 'cc pdsnk', connect to a USB-C
Chromebook, try both video output on USB-C->mini-DP and USB 3.0.
Change-Id: Iea0409fce2cb7aca089814ae406a7c05848dd8e4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2637647
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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This CL changes the revision field in the pdcable console command
to check the PD revision instead of checking the VDM version.
BUG=None
BRANCH=None
TEST=Able to get the 'Cable Rev' field as 3.0 for PD 3.0 cables
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: I7e10b2e352bc78c23c8578361b577d04a9491e7a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643576
Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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The USB mux code does not provide any mutex protection. In addition the
virtual USB mux code must be run from the PD task to handle
synchronization of the EC_CMD_USB_PD_MUX_ACK host command.
Move the USB mux updates into the common power state handler for the
type-C state machine.
BUG=b:178186846
BRANCH=volteer
TEST=make buildall
TEST=Connect Gatkex to Voxel, execute EC reboot and verify assertion is
fixed.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I0a18d0f5c51eedb4ecb0c275ea1235f7838246a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2644843
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Tested-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.corp-partner.google.com>
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Add the options for this along with the the host command that presses it
into service.
BUG=b:178104134
BRANCH=none
TEST=build for zephyr
See that host command 121 is processed without error now:
21-01-21 12:14:50.829 [7.981900 HC 0x121]
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I63b8586a6e2065cbfba8de81d3690cd2f7082c9a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643617
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Add support for motion sense in zephyr. This change adds basic functions
for motion sense task to do meaningful work.
sensor_map.h included by board.h will be used to get board specific sensor
configuration.
BUG=b:173507858
BRANCH=none
TEST=make buildall -j8
build volteer on zephyr
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com>
Change-Id: I906316d2e97428cf46b9a15071666c8e3b039b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638909
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
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CL:2325764 modified the common flash support to allow the host to
program up to CONFIG_WP_STORAGE_SIZE bytes for the RO image and
CONFIG_EC_WRITABLE_STORAGE_SIZE bytes for the RW image.
The host always erases the full size reported by the region so the
checks of CONFIG_RO_SIZE and CONFIG_RW_SIZE are no longer needed.
BUG=b:175115527
BRANCH=volteer
TEST=make buildall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I446ecf2094e158073354766706d4f486acef1bd1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643578
Reviewed-by: caveh jalali <caveh@chromium.org>
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Add the required Kconfig options to allow this code to be built for
Zephyr. Update the mutex since Zephyr needs this to be inited.
BUG=b:173787365
BRANCH=none
TEST=make BOARD=volteer
build zephyr on volteer
Change-Id: Ib25808faf82b3f1b2f426ad5f09acb37f1b79d65
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2631100
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Currently, pchg task sends a host event unconditionally after each
run. This causes pchg task to interrupt the host when there is no
event in a queue or in a chip.
This patch makes pchg task avoid notifying the host for false events.
BUG=b:173235954
BRANCH=trogdor
TEST=CoachZ
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I1abea1f5b2c6571c6880260e6607d0219f2e3248
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2643585
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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When a DP-related VDM sequence fails, the alt mode implementation
returns to an inactive state. If this happens while the port is
configured in DP alt mode, return the port to USB mode.
BUG=b:176795458
TEST=Receive Exit Mode NAK on AP shutdown; re-enter DP mode after boot
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Ifa564cfb874297f40a8eecd2dd113e2b3c2ea389
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638886
Reviewed-by: Keith Short <keithshort@chromium.org>
Tested-by: Madhusudanarao Amara <madhusudanarao.amara@intel.corp-partner.google.com>
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On TCPMv2 stack voltage is limited by setting target voltage and
sending DPM_REQUEST_NEW_POWER_LEVEL to Policy Engine. This causes state
transition from PE_SNK_Ready to PE_SNK_Select_Capability and finally
to PE_SNK_Transition_Sink. When leaving PE_SNK_Transition_Sink charge
manager is notified about currently requested voltage.
Charge manager detects voltage change and sends new power level request
to PD stack which will trigger process of selecting capability once
again. Actually we already requested appropriate voltage and current
from charger so there is no need to trigger process of selecting
capability.
Above situation was fixed by checking if new voltage and current for
updated port is different than last voltage and current requested by
PD stack.
BUG=b:161775827
BRANCH=none
TEST=Flash EC ToT on casta. Set 5V limit. Observe if there is only one
transition to PE_SNK_Select_Capability before receiving
capabilities from ServoV4.
NOTE: ServoV4 will send capabilities to DUT as a result of voltage
transition (requested by ServoV4).
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Ic2ce76a8efaa1321a70a4dab2628855634430160
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2592498
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This patch adds functions responsible for providing voltage and current
requested from charger.
This patch doesn't introduce any logical changes.
BUG=b:161775827
BRANCH=none
TEST=make -j buildall
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Ib86285e4c4e6f2da3f922a8a4389e78706f1de96
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2592497
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This
is the approximate result of the following command, run from
platform/ec:
find . -type f -\( -name '*.c' -o -name '*.h' -\) | \
xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g'
Fix some latent formatting errors in usb_pd_protocol.c, because they
were preventing pre-upload hooks from passing.
BUG=b:144165680
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Building zephyr generates a warning on init.rom section.
This change removes init.rom section declaration in Zephyr build.
The change also added third_party into include folders so files in
third_party now can be included in Zephyr build.
BUG=b:173508071
BRANCH=none
TEST=make BOARD=volteer -j8
build volteer on zephyr
Change-Id: Ic86866e41d87d83c00a06a207a352a25fe57054b
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638135
Reviewed-by: Keith Short <keithshort@chromium.org>
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After the first BIST Test Data packet, enable BIST Test Mode if the TCPC
supports it (currently just TCPCI). While in BIST Test Mode, mask
ALERT.ReceivedSOP*MessageStatus. Unmask it when the test ends, due to
Hard Reset or to detach.
BUG=b:173023378,b:169385081,b:172709198,b:173028832,b:173028791
BUG=b:173141941,b:173142113
TEST=Complete TDA.2.1.2.2 BMC PHY RX INT REJ on volteer without running
out of Rx buffer space or watchdog timeout (still fail though)
BRANCH=firmware-volteer-13521.B-master
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I03bbc4cfacceebd0334aa814e11a16e09177a322
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2545667
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Allow tests to use a mock charge_manager. Do not build the real charge
manager when this is used.
BUG=b:173023378,b:169385081,b:172709198,b:173028832,b:173028791
BUG=b:173141941,b:173142113
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I49caccafd024515833880d7251092b77623d4a71
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639584
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Ignore BIST messages when not operating at vSafe5V. Ignore unsupported
BIST modes.
BUG=b:169385081
TEST=make buildall
BRANCH=firmware-volteer-13672.B-main
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Ia7504cf0f7cf16273aa641edb364eef7e666a3ff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2602720
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Allow other modules to get the current VBUS voltage.
BUG=b:169385081
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I1c4a22fff0d7e44ef47c2d8a3ff6e25e1a6ded1e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639583
Reviewed-by: Diana Z <dzigterman@chromium.org>
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At present the hooks declaration in Zephyr doesn't use const but does
use static. This makes it incompatible with ECOS, even if it might be
more strictly correct.
Update the hook to fix this so that we can build the missing USB code.
Typically Zephyr would put const data in the rodata section but that is
write-protected with native_posix. So force it into .data instead.
BUG=b:175434113
BRANCH=none
TEST=make BOARD=volteer
build zephyr on volteer
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2611895
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I470c9a6b2f905be9f512b0d555f33f0998412975
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2617377
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Increased the event loop while waiting for the
response in PE_SRC_Send_Capabilities in order
to respond with the HardReset in the correct
window of time.
BUG=b:173025780
BRANCH=zork
TEST=make run-usb_tcpmv2_compliance
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ia108b3d4d4f18b76da6550f406011d1ee79c2757
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639663
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
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In order to prevent high current spikes when the OCPC PID loop runs,
this commit sets the initial VSYS voltage to that of the battery.
BUG=b:175334490
BRANCH=dedede
TEST=Build and flash DUT. Using a Type-C breakout board and a current
probe, plug in charger to sub board, verify that no initial current
spike exceeds that of the contract.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Idb6e7d2e51acd0c5279bbb055b75774c6dab6901
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628573
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This change refactors test functionality in test_util.h to better
accomomdate zTests. This is done by:
* Removing the shim version of test_util.h. This was causing a
conflict that made it harder to tell what's being used. This
involved migrating some needed code over:
- Defining different TASK_PARAMS.
- Defining test_pass for Zephyr tests.
* Creating a macro (DECLARE_EC_TEST) that will automatically
handle creating the individual test functions for both
platform and Zephyr tests.
* Creating a macro (TEST_MAIN) that will automatically handle
creating the main test entry function. This use to be
test_main(void) for Zephyr and run_test(int, char**) for
platform/ec. To do this we'll be removing the int, char**
arguments from platform/ec. This may result in some tests
having to be refactored, but overall should improve the
test codebase as tests should remain deterministic (i.e.
not depend on any outside arguments/parameters).
* Creating some common ztest_ function/macros that will
allow writing platform/ec tests in a zephyr like style.
see test/base32.c for an example.
* Update the type of __shared_mem_buf to match Zephyr. This
was causing an issue now with the full test_util.h in
zephyr/test/system/.
BRANCH=none
BUG=b:168032590
TEST=make runhosttests
TEST=zmake configure --test -B build/host/base32 zephyr/test/base32
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I72173a3e94c7df09a2966e7ffeb9f5668d030f29
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2634401
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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After an FRS signal, the initial sink will attempt to initiate the FR
Swap AMS, and the initial source should apply SinkTxOk. If the initial
source is removed entirely, FRS will be triggered butSinkTxOk will
never be applied and this will get the initial sink state machine stuck.
So, in the case of an FRS ignore the CC voltage. After an FRS signal,
the source isn't allowed to initiate an AMS.
BUG=b:171740860
TEST=On Volteer with the PS8815, enable FRS and remove the FRS device.
Make sure we enter ErrorRecovery instead of hanging in
PE_PRS_SNK_SRC_Send_Swap
TEST=make buildall
BRANCH=none
Change-Id: I8373a76c0c19feeb909b0623a1ae2d6b0ad5fa60
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2633654
Commit-Queue: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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When using the TCPC 'stub' to connect the TCPMv1 stack to the integrated
PD PHY, we were already re-enabling the RX after a Hard-reset but the
rx_enabled variable was not set in the TCPC code.
Update the stack code to call the rx_enable method as we already do with
regular TCPC, this ensures that the rx_enabled variable is always properly
set.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=b:168621142
BRANCH=servo
TEST=manual, send a hard-reset from the servo v4.1 and see the rest of
the sequence from the DUT happening properly.
Change-Id: I5b8c11d6778c40bb980f69ab0bb4c1619220e28e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2637648
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Some boards will not be able to use default policy for source
caps. This can happen if ports are not symmetric, or a port will offer
greater than 5V PDOs.
This CL changes dpm_get_source_pdo to be overridable so that projects
which don't use standard chromebook port SRC PDOs can implement a
board/platform specific option.
BRANCH=None
BUG=b:141690755,b:168862110
TEST=verfied that quiche builds when using its own version of
dpm_get_source_pdo
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I9f81c593292dbaa00033560a1a6e5165b7043646
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627632
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
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This CL changes is_rev3_vdo() to check the PD revision instead of
checking the VDM version.
Also renaming is_rev3_vdo() to is_pd_rev3()
BUG=None
BRANCH=None
TEST=Able to enter USB4 and Thunderbolt with PD3.0 cables
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Change-Id: Ia34e5ff65ccbbfa168721d62ada8ac973353d6f5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638368
Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Shim the DECLARE_HOST_COMMAND so that host commands can be declared
and found.
BUG=b:177065174, b:172678200
BRANCH=none
TEST=build & boot EC for Volteer
0x0d & 0xa4 don't have error message.
21-01-11 16:42:09.226 [1.528500 HC 0x0d]
21-01-11 16:42:09.227 [1.532100 HC 0xa4]
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ief3b5768715dcc164bcb25ae0d1c8de749514f92
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2620729
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
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Current body_detection will make AP resume after enter S3. Cause the AP
wake up in a short time after suspend.
This CL will prevent this from happening.
BRANCH=None
BUG=b:176399952
TEST=powerd_dbus_suspend # See if the device wake up after suspend
Signed-off-by: Ching-Kang Yen <chingkang@chromium.org>
Change-Id: Id208800a66e4e2d433a555210ece50af85c908ec
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2631887
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used
throughout. The issue is that the units don't match. In
Zephyr the value is in KiB instead of bytes. This refactor
simply renames CONFIG_FLASH_SIZE in platform/ec to include
the unit (via _BYTES).
BRANCH=none
BUG=b:174873770
TEST=make buildall
be generated by the build instead of per board
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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Some devices may reply to discovery differently if they're not yet being
offered sufficient current. Process DPM requests before running
discovery in order to get these devices into the best state for
discovery probing.
This also moves the cable soft reset DPM request up to the common DPM
request function. Otherwise, it will be considered an unhandled request
and dropped before attempting discovery.
BRANCH=volteer
BUG=b:177303467,b:177001425
TEST=verify we can reliably receive DiscoverSVIDs ACK from LaCie SSD
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I0917476c2aeb0cb9551edde3df14ddd1fd47fcab
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627805
Tested-by: Utkarsh H Patel <utkarsh.h.patel@intel.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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We have seen some peripherals may broadcast duplicated SVID, and
this might cause the SM in a weird state in that the SVID disocvering
traverses sequentially by pd_get_next_mode(), and this cause
the SM discovering SVID modes over and over again.
We filter out the duplicated SVID to prevent such scenario.
BUG=b:177285652
TEST=Plug adapter ADLX65YCC3A, and ensure no repeated
discover_mode for NAKed SVIDs.
BRANCH=none
Change-Id: I68811be039e214c5045fb71bb7025bcc6226a051
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2626795
Reviewed-by: Diana Z <dzigterman@chromium.org>
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CONFIG_USB_POWER_DELIVERY. Hardcode extpower_is_present() to 1 as the
barrel jack is the only means of powering the board.
BUG=b:173566595
TEST=Flashed to my Endeavour-C EVT1; reaches "Starting kernel"
Change-Id: Ie456646bae2ca7ff5249d66bf0848fdd08caa6b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2624927
Tested-by: Neill Corlett <corlett@google.com>
Commit-Queue: Neill Corlett <corlett@google.com>
Reviewed-by: Matthew Ziegelbaum <ziegs@chromium.org>
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This change adds checking for enough battery level before sending
hard reset in PE_SNK_Hard_Reset state.
There are a lot of reasons causing Policy Engine to send hard reset.
One of them is timeout in PE_SNK_Wait_For_Capabilities, which can cause
brown out if battery doesn't have enough charge
New flag PE_FLAGS_SNK_WAITING_BATT was added. This flag is set on
PE_SNK_Hard_Reset entry, and can be cleared when battery
reaches minimal charge (see pe_update_waiting_batt_flag()).
Original fix implemented for TCPMv1 stack:
https://chromium-review.googlesource.com/1565147
https://chromium-review.googlesource.com/1980406
BUG=b:160243307, b:161775827
BRANCH=none
TEST=Get board with bad battery (eg. bobba). Flash ToT EC.
Discharge battery to cutoff. Plug charger. Make sure that
PD goes to PE_SRC_Disabled after PE_SNK_Wait_For_Capabilities
tries to send hard reset (switches to PE_SNK_Hard_Reset).
PD should remain in PE_SRC_Disabled state until battery
reaches minimal charge.
It might be necessary to limit PD_CAPS_COUNT (in my case to 10)
in ServoV4 (used as charger) to actually trigger timeout.
During test EC RO have to report that PD comm is disabled, in
other words system must be locked.
When battery charges quickly, it is allowed to do 'sysjump RW'.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I63ac93a093d921f41bea2af93de8325783056962
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2600985
Reviewed-by: Diana Z <dzigterman@chromium.org>
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When calling pd_send_hard_reset() PD_EVENT_SEND_HARD_RESET event
is sent. This event is handled in tc_event_check() function,
tc_hard_reset_request() is called and TC_FLAGS_HARD_RESET_REQUESTED
is set. As a consequence Type-C layer performs Hard Reset without
sending any information to port partner. In addition when PE is
available, Type-C layer will set PE_FLAGS_PS_RESET_COMPLETE PE flag
unexpectedly.
This is fixed by passing Hard Reset send request to PE layer which
will perform it correctly.
Currently Hard Reset send using PD_EVENT_SEND_HARD_RESET is used
only as reaction to overcurrent.
BUG=b:160243307
BRANCH=none
TEST=make -j buildall
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I71bd073a466942d86194cec1aa3787946b695924
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2618003
Reviewed-by: Diana Z <dzigterman@chromium.org>
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USB PD specification states that we can send Hard Reset on DPM
request regardless of state we are currently in (see USB PD
Specification 8.3.3.3.8).
This patch implements changing state to PE_SNK_Hard_Reset or
PE_SRC_Hard_Reset depending on current power role when requested
by DPM. Currently, requests can come only from PD console.
BUG=b:160243307
BRANCH=none
TEST=Connect DUT to ServoV4. Configure ServoV4 as source using 'cc src'
or 'cc srcdts'. Issue Hard Reset from DUT EC console using
'pd 0 hard'. Check if transition PE_SNK_Ready -> PE_SNK_Hard_Reset
occurs. Configure ServoV4 as sink using 'cc pdsnk' or
'cc pdsnkdts'. Issue Hard Reset from DUT EC console using
'pd 0 hard'. Check if transition PE_SRC_Ready -> PE_SRC_Hard_Reset
occurs.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I46a0446ff9dd417bab19fd13d71aa11e8aa83d04
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2618002
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This CL backports CL:2535217 to TCPMv1, and completely removes charging
allow list.
BRANCH=kukui
BUG=b:175364716
TEST=on Burnet, verify DUT can charge from power bank.
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I89476c89fd4ab6d46acf880f7573b5deb8b2c0f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2603614
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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BUG=none
BRANCH=none
TEST=make runhosttests
Signed-off-by: dossym@chromium.org
Change-Id: I7338c137540ddf08886887d66ac92e7b7d57911c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2622068
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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BUG=none
BRANCH=none
TEST=Build npcx9 and coachz boards
Signed-off-by: dossym@chromium.org
Change-Id: I7f2ccd80e595e0ee24ff56ecde8d810a1f8b98cb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2622067
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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BUG=none
BRANCH=none
TEST=build hadoken
Signed-off-by: dossym@chromium.org
Change-Id: I9a453bcdf14b3a6823bad23824aaee77a7013a81
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2622066
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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NPCX chip uses the MTC module as the RTC counter. However, in PSL
hibernate, MTC will stop counting. NPCX9 supports the LCT module which
could count continuously when VCC1 power is off. The CL uses LCT to
compensate for the MTC counter value after PSL hibernate wake-up. The
LCT maximum counting value is 16 weeks.
BRANCH=none
BUG=b:165777478, b:171919875
TEST=pass "make buildall"
TEST=Check the RTC value in the following scenario:
1. "hibernate" and wake up EC by PSL input.
2. "hibernate 30" and wake up EC after timeout.
3. "hibernate 30" and wake up EC by PSL input before timeout.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I39e370a437f40749acbd3a35a8b37ebec70f1bf2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2506864
Reviewed-by: Keith Short <keithshort@chromium.org>
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