| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch updates the help message for i2cread, i2cwrite, i2cxfer
to clarify which addressing mode (7-bit or 8-bit) each command uses.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=chromium:971296
BRANCH=none
TEST=buildall
Change-Id: I757e8a1d30ad19dbc333a30a97f8049f007853d1
Reviewed-on: https://chromium-review.googlesource.com/1641600
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Battery charges less than batt_host_shutdown_pct cause the display
charge to go negative. This looks silly in EC console prints:
[38.474266 Battery 2% (Display -2.-7 %) / 3h:15 to full]
BUG=b:134586427
BRANCH=None
TEST=Run kohaku down to low battery, observe display stays at 0.
Change-Id: If8eb477b8bb21451069bac5c1474b7a408b30582
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1650136
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Add EC command for the host to query FP sensor encryption status.
Currently it's just FP TPM seed has been set or not.
Add unit test for this command. Also add ectool command for querying
encryption status.
BRANCH=nocturne
BUG=chromium:952275
TEST=ran unittests
TEST=tested enrollment, matching and multifinger on DUT nocturne.
TEST=tested querying sensor encryption status using ectool.
Change-Id: I07d1e471ead85a517105b38d1ddd793c3046ce8f
Signed-off-by: Yicheng Li <yichengli@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1633272
Reviewed-by: Nicolas Norvez <norvez@chromium.org>
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The upcoming change of the set of gcc invocation flags would trigger a
warnings about a potentially uninitialized variable use.
Even though the variables are guaranteed to be initialized in the two
cases being touched, let's just pacify the compiler so that in places
where it is important we do get the uninitialized variable warning and
compilation failure.
BRANCH=cr50, cr50-mp
BUG=b:134623681
TEST='make buildall -j' succeeds with the new compiler invocation
Change-Id: I5ac392d7628931d9e02ea153b3c8a2e7c285050d
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1648923
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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The CCPRINTF/S macro provides more control over the logging output and
we already use it everywhere else in the file.
BRANCH=none
BUG=b:124773209
TEST=make buildall -j
TEST=view log messages in FP console
Change-Id: Idbdbfe7a5fdb590288e9926aabf21412cfe50549
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1646883
Reviewed-by: Nicolas Norvez <norvez@chromium.org>
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This patch replaces EC_CMD_I2C_LOOKUP with EC_CMD_LOCATE_CHIP.
This is a more generic command which locates a peripheral chip in
i2c or other bus types.
Additionally, it includes the following changes:
- Change chip (device) type # of CBI_EEPROM (from 1 to 0).
- Support TCPCs.
localhost ~ # ectool locatechip 0 0
BUS: I2C; Port: 0; Address: 0x50 (7-bit format)
localhost ~ # ectool locatechip 1 0
BUS: I2C; Port: 0; Address: 0x0b (7-bit format)
localhost ~ # ectool locatechip 1 1
BUS: I2C; Port: 1; Address: 0x29 (7-bit format)
localhost ~ # ectool locatechip 1 2
EC result 11 (OVERFLOW)
Index too large
localhost ~ # ectool locatechip 2
Usage: locatechip <type> <index>
<type> is one of:
0: CBI_EEPROM
1: TCPCs
<index> instance # of <type>
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=Verified ectool locatechip work on Nami.
Change-Id: I1a773ced65b1c5ce3656f03eff04a6eadd4bc5ff
Reviewed-on: https://chromium-review.googlesource.com/1614582
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This changes moves the specialized logic for timestamp spreading
away from the accelgyro_lsm6dsm and into the main motion_sense
loop. The motion_sense_fifo_add_data function was replaced by a
stage equivalent, and a commit function was added. Similarly,
internal static functions for motion_sense.c were renamed to
use the stage terminology. The idea is:
When a sensor is read, it might provide more than one measurement
though the only known timestamp is the one that caused the interrupt.
Staging this data allows us to use the same fifo queue space that the
entries would consume eventually anyway without making the entries
readable. Upon commit, the timestamp entries are spread if needed.
Note that if tight timestamps are disabled, the commit becomes a
simple tail move.
BUG=chromium:966506
BRANCH=None
TEST=Ran CTS on arcada.
Change-Id: Ib7d0a75c9c56fc4e275aed794058a5eca58ff47f
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637416
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Also increase timeout to provide enough time to hit enter when download
prompt pops up.
BRANCH=none
BUG=b:124996507
TEST=fpcapture from fingerprint console
Change-Id: I1e608161aceae4431dedcaffd648d20549b97a8b
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1593956
Reviewed-by: Nicolas Norvez <norvez@chromium.org>
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TPM could enter idle state even when current command has not yet been
fully processed (for instance if the AP releases locality at an
arbitrary moment).
The status register command_ready bit needs to be unconditionally
reset when TPM enters idle state.
BRANCH=cr50, cr50-mp
BUG=none
TEST=verified reliable behavior during lengthy concurrent runs of
processes accessing TPM. The same type of testing was causing
occasional TPM lockups before this fix.
Change-Id: I6e1dc334713c666e4ef566d41bd0cbff841f1179
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1643828
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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Move code in header files into c source files.
BUG=b:133341676
BRANCH=none
TEST=manual
Charge-Through was tested on an Atlas running a DRP USB-C/PD state
machine with CTUnattached.SNK and CTAttached.SNK states.
Change-Id: Ib1b51a778b937e02908f0bc8866bc91a39831163
Signed-off-by: Sam Hurst <shurst@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1626036
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
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8042 keyboard command reset (0xff) was returning ACK(0xfa) as well as
BAT(0xaa). From [1], 0xaa seems to be represent OK. However, the spec
does not expect OK to be sent in response to reset command.
Coreboot libpayload 8042 driver was recently updated to send a reset
command on initialization to make it work with certain
payloads. Sending back 0xaa along with ACK seems to make the
initialization fail because it is not expecting anything other than
ACK.
This change gets rid of the return value 0xaa that was being sent for
reset command.
[1] http://zet.aluzina.org/images/d/d4/8042.pdf
BUG=b:134366527
BRANCH=None
TEST=Verified that keyboard initialization no longer fails in
depthcharge.
Change-Id: I0ac917dc94aa381ab705474cd7bcf494fb8b10d6
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1641756
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Tested-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
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This change updates the queue_get_write_chunk and
queue_get_read_chunk logic to return an updated queue_chunk.
The new chunk uses a void * for the buffer and replaces length
with count. This more tightly aligns to how the rest of the
queue functions operate. Further, it adds the ability to
offset the write chunk. This is important as it allows wrapping.
For example:
With a queue of 8 units, 1 byte each. Assume H=2, T=5. Previously,
we were only able to ever get the 3 bytes at 5-7. Using the offset
of 3 though, we can now also get the 2 byte write chunk 0-1.
BUG=chromium:966506
BRANCH=None
TEST=Added unit tests
Change-Id: I40216c36aa0dc95ec4d15fc587d4b1f08a17ef73
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637415
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BRANCH=none
BUG=chromium:967924
TEST=none
Change-Id: Ief50a64d45cc6862fab3417e3f8350d3c581209e
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1633909
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Nicolas Norvez <norvez@chromium.org>
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We will be adding more files in the future, so this declutters the
common directory. It also lets us add a separate OWNERS file.
BRANCH=none
BUG=chromium:968518
TEST=make buildall -j
Change-Id: I22c08851fe2d5fbdb5beff8cc72a68618c85fb0e
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637440
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Kukui's pogo charger breaks the basic assumption of a dedicated charger.
Add board specific functions to customize them.
Also add a check to make sure the value of DEDICATED_CHARGE_PORT is good.
BUG=b:128386458
TEST=combine with CL:1535087, verify that `ectool usbpdpower 1`
correctly reports its status.
BRANCH=None
Change-Id: I6c698ea6a6fb4ab765f87c6fea0b35d5a757295a
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1569090
Reviewed-by: Yilun Lin <yllin@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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Currently, the pd_task will attempt to maintain both source and sink
contracts after an unlocked sysjump or unlocked EC reset. However, the
pd_task will disable Vbus to any partners it was sourcing, causing the
soft reset process to lead to a hard reset and disconnection.
Since the port partner will be without Vbus and unable to respond, treat
the contract as terminated and the port as the default state.
BUG=b:132110509
BRANCH=octopus
TEST=unlocked sysjumps with a display port dongle and hoho to ensure
they were treated as disconnected, unlocked sysjumps with charger to
ensure it was soft reset
Change-Id: Ie477f393ea828a4e880c8e8ccbe72539e8be721a
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639212
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Currently, the pd_task will call a power supply reset during init which
cuts Vbus to the port partner. However, on a sysjump we may still be
sourcing Vconn to a partner which will leave it in an inconsistent state
of having Vconn but no Vbus. Depending on the port partner's power
topology, they may even feedback some amount of voltage on Vbus, causing
them to be detected as a charger.
After disabling Vbus to the port partner, disable Vconn as well.
BUG=b:132110509
BRANCH=octopus
TEST=unlocked EC resets and sysjumps with a display port dongle and
hoho, ensuring neither was detected as a low power charger after
Change-Id: Ica9b72167bc981faeaebac18bac476ca9b7bfe7f
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639211
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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board_read_serial and board_write_serial were prototyped as weak
and this made all instances, that included that prototype, weak
as well. In order to not lose information from the prototype,
default and override functions, I changed to use the override
weak marker symbols.
These functions defaulted for specific configurations as
different functionality and used an #ifdef tree to do this. I
made these a single definition for each function and used
IS_ENABLED instead of the #ifdef tree. I also added a
definition for the case that the configuration would not have
produced a function.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Ie41c53f3a17d665358e46eefd3ded3066ee80a7d
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1631583
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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IS_ENABLED works for an empty-string-defined macro.
However, -D options default to define the macro to 1. This CL forces
those macros, such as BOARD_* CHIP_*, CORE_*, CHIP_VARIANT_* and
CHIP_FAMILIY_*, to be defined as an empty string, so that it can
be supported by IS_ENABLED macro.
TEST=use if(IS_ENABLED(BOARD_KRANE)) and see compilation success.
TEST=compares build directory w/ and w/o this CL, and see the .smap
are the same:
ls build/*/*/ec.*.smap | sed -e 's|build/||' | \
xargs -I{} diff -u -a build/{} build.new/{}
BUG=none
BRANCH=None
Change-Id: I96e2aa1cb5f3369e5e445a674595a9234f26707a
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1627840
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Vendor command handler should return a vendor command error code which
is ORed with VENDOR_RC_ERR by the vendor command routing function.
Before this patch flash log vendor command handler was returning
VENDOR_RC_ERR, which is filtered out by gsctool resulting in a return
value of zero when there in fact is an error.
BRANCH=cr50, cr50-mp
BUG=b:132287488
TEST=with appropriate fixes in gsctool (coming in the next patch) was
able to run concurrently for a long time a process constantly
adding log entries using Cr50 CLI command, and a process
constantly retrieving log entries using 'gsctool -L'
Change-Id: I2094c0b342d65e6c2a382079f81fb10fc8bacab9
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1639093
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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Currently the I2C tunnels of all TCPC ports are protected implicitly
when the system jump is disabled. Depthcharge issues that command after
the EC jumps to RW and before the TCPC firmware update is applied. This
leads to failure while updating the TCPC firmware and hence a reboot loop.
Fix this behavior by adding a sub-command to protect all the I2C tunnels
so that depthcharge can issue that command after both EC SW Sync and
TCPC Firmware update are done.
BUG=b:129545729
BRANCH=None
TEST=make -j buildall; Boot to ChromeOS. Force a TCPC FW update and
ensure that the reboot loop does not happen.
Change-Id: I5dd2314cf82dcfff520dc32ce3ced232326ab3d5
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1605260
Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Currently, if a battery is disconnected but reporting a charge
percentage over CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC, a
system will be allowed to boot despite the battery not providing power
yet.
This change verifies that the battery is connected, as well as having a
high enough charge percentage before allowing boot.
BUG=b:133724948
BRANCH=octopus
TEST=verified casta can power on once
CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC is passed and battery is
connected
Change-Id: Ide9fe041a328bbeaeee8b9e7f9788b5731ac80ea
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1635531
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
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Currently, supplier_priority is shared across boards. This patch makes
it weakly defined so that boards can customize it.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=Verify BC12, PD work on Flapjack. buildall.
Change-Id: Ie1e73758c611414512425121164bf7d56cf02697
Reviewed-on: https://chromium-review.googlesource.com/1622889
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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supported_modes is an array of structs, and addresses of array elements
cannot be null.
BUG=none
BRANCH=none
TEST=none
Change-Id: I1268e024ba8b2469d1bc70be27b3e98044a7ac04
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 141742
Reviewed-on: https://chromium-review.googlesource.com/1629279
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Split common/fpsensor.c so that it contains only hardware-dependent
code, and put hardware-independent code to common/fpsensor_state.c.
This facilitates unit testing of hardware-independent code.
BRANCH=nocturne
BUG=chromium:952275
TEST=ran unittests
Change-Id: I0c050c7affa83e7cb935e2b657b2823cafe4c35f
Signed-off-by: Yicheng Li <yichengli@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1625774
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Nicolas Norvez <norvez@chromium.org>
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This argument count check is already performed at the beginning of the
function and is useless anyway since we've already accessed argv[1].
BUG=none
BRANCH=none
TEST=none
Change-Id: I9f1de3c5e67bb0db5564d8a1161b2ae646e8dfe9
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 141743
Reviewed-on: https://chromium-review.googlesource.com/1629277
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The Platform Environment Control Interface (PECI) is a thermal management
standard with one-wire bus interface that provides a communication channel
between Intel processor and chipset components to external monitoring or
control devices.
As we can read the CPU temperature over PECI more accurately than the
thermistors, we can eliminate usage of thermistors for reading CPU
temperature.
BUG=b:128666114
BRANCH=none
TEST=Manually tested on Dragonegg, able read CPU temperature.
Change-Id: Ie0845ca776e6a7e14511dc9315d6d83cdd5f09a6
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1622740
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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OS can leverage `ectool usbchargemode` to control the usb_charge_mode
in the EC. In this case, we might want to set mode back to the default
one defined in the config of board level therefore the new
usb_charge_mode is added for this purpose.
BUG=b:130767435
BRANCH=octopus
TEST=1. make -j buildall
2. ectool usbchargemode 0 0x5 0
3. usb charging mode is set to CDP in Octopus board
Change-Id: Ib7397993fc49e6c744dc55b9adace95dd6b8bd3a
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1621452
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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BUG=b:130767435
BRANCH=octopus
TEST=1. `make buildall -j4`
2. execute `ectool usbchargemode 0 2 1` in EC RO stage.
3. jump to EC RW stage.
4. check whether charge_mode in RW is restored well in
usb_charge_init()
Change-Id: I57346d3d92fa58a4d07b7509846123fc8f0c93fc
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1626890
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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When moving an H1 between prod and dev Cr50 images, it is important to
quickly determine that the NVMEM contents are not retrievable. The
first object verified by the initialization routine is the page
header, but since SHA value is used for integrity verification, it
does not change despite the fact that the mode (and encryption keys as
a result) changed.
Using encrypted header value for integrity verification guarantees
that when transition between prod and dev modes happen the
initialization function discovers it right away and reinitializes
NVMEM instead of trying to interpret corrupted objects.
The host/dcrypto stub used for unit tests and fuzzing needs to be
modified to ensure that page headers read from uninitialized flash do
not look valid (where encrypted value of 0xffffffff is 0xffffffff).
BRANCH=cr50, cr50-mp
BUG=b:129710256
TEST=make buildall -j successd, as well as migration of a Chrome OS
device from legacy to new nvmem layout.
Change-Id: I613513cc67b14f553d2760919d6058f8dbed6e41
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1615423
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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There is no point in trying any nvmem operations when
encryption/decryption services are not available.
Test changes necessary to make sure test app compiles and runs
successfully.
BRANCH=cr50, cr50-mp
BUG=b:132800220
TEST=The device does not crash any more after tpm is disabled.
Change-Id: I97f9afc6e4d5377162500fc757084e4d5a57d37d
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1615424
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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When chipset power up to S5->S3 state set PD_EVENT_POWER_STATE_CHANGE,
pd task set mux usb mode whether c-port is attached or not.
If c-port is nothing attached at the setting moment,
then mux detects nothing and goes to low power state.
Plug-in type-c usb device, after debounce pass, we set mux usb
mode and mux responds i2C NAK (due to in low power mode).
This CL changes that do not connect MUX when PD disconnected.
For example ps8751 is used for mux case. When power up(S5->S3),
we should set mux none mode whether c-port is attached or not.
Once type-c usb device plug-in, after cc debounce pass, we
will set mux usb mode in X_DEBOUNCE_DISCONNECT state.
BRANCH=None
BUG=b:133196882
TEST=After console cmd reboot and reboot hard,
type-c usb device plug-in on ampton and
get type-c port status by "ectool usbpdmuxinfo".
Change-Id: Ia538af48c450e12af1438a6aa9a6e4e426e2f616
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1609262
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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BUG=b:129159505
BRANCH=arcada
TEST=I ran `make buildall` since this change isn't used yet it doesn't
affect run-time behavior.
Change-Id: I01857d679b800f9b53762c659ebd9a018cbf16db
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1612251
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
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The new vendor command allows to get and increase the flash log
timestamp base.
BRANCH=cr50, cr50-mp
BUG=b:132287488
TEST=verified in the next patch in the series.
Change-Id: Idc76012b7e7894b95cd70eeffeb50562a91b9656
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1610720
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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The Cr50 environment does not have a wall clock, which makes it
impossible to associate flash log entries with real time.
This patch provides an API which allows to set a base time value and
then use it plus current Cr50 uptime to generate more sensible flash
log timestamps.
Care is taken to ensure that attempts to set timestamp base such that
it would cause a log timestamps rollback do not succeed.
A unit test is being added to verify this behavior.
BRANCH=none
BUG=b:132287488
TEST='make buildall -j' (which runs the new tests) succeeds.
Change-Id: I7521df1bac5aef67e0cf634c183bf1618655f48d
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1610719
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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If developers have not set up TEMP_SENSOR_COUNT correctly, or the caller
starts sending wild sensor_id or idx values down, then the EC will do
arbitrary reads and writes over its own memory. In one case, the
PD log buffer indices are next in memory, so we would see the following
spew in the kernel (every 60 seconds, since the kernel only checks that
often):
[ 138.151937] PDLOG 2019/05/17 22:46:26.913 P0 Disconnected
[ 138.158512] PDLOG 2019/05/17 22:46:04.936 P0 Disconnected
[ 138.165066] PDLOG 2019/05/17 22:46:04.935 P0 Disconnected
[ 138.171643] PDLOG 2019/05/17 22:46:04.935 P0 Disconnected
[ 138.178162] PDLOG 2019/05/17 22:46:04.935 P0 Disconnected
...
BUG=b:132999028
BRANCH=none
TEST=Build and boot hatch, observe no more log spam
Change-Id: If2e20972c3268e84bb4cdfa315c6b7f7cb76868f
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1623176
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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s/dpft_check_temp_threshold/dptf_check_temp_threshold/
BUG=b:132999028
BRANCH=none
TEST=make -j BOARD=hatch
Change-Id: I453a154ee9e4a58ce88e7d6ffe34f14ae8b08d65
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1623175
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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This patch makes debug printf messages more informative as follows:
- All messages are prefixed with I2C_PTHRU
- Don't print pointers for read or write buffers
- Print out buffer data
With the patch, messages will look as follows:
[7.335059 I2C_PTHRU xfer port=1 addr=0x16 rlen=0 flags=0x3]
out: 0x03 0x01 0xe0
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=Verify the messages are printed as expected
Change-Id: I144b2d1d517070b6cdb492f71baa7f20c27e29b9
Reviewed-on: https://chromium-review.googlesource.com/1604162
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Currently, tcpc_config is declared in two places. This patch
consolidates declarations in usb_pd_tcpm.h.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I4f30d06b1eaeb6a83b664de76116d85d65a9fc97
Reviewed-on: https://chromium-review.googlesource.com/1616007
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=b:132310780
TEST=flash to soraka, retrieve G2F cert, check CN
retrieve anonymous U2F cert, check CN unchanged
BRANCH=none
Change-Id: Id409ac5d534f2ee9e16376d690f58b184f5ac1a6
Signed-off-by: Louis Collard <louiscollard@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1614581
Reviewed-by: Andrey Pronin <apronin@chromium.org>
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Commit-Queue: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
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If the 360 degree hall sensor is active, then we should remain in tablet
mode even if the lid angle says we are 1 degree since an angle of 360
could wrap around to 1 degree.
Also ensure that tablet mode always gets initialized to the correct state
at startup (by setting initial value to -1)
BRANCH=R75
BUG=b:131785573,b:132178305
TEST=NB_MODE# on arcada does not flutter when the device is at 360
degrees with CL stack.
Change-Id: I962a9c23205766080a65d741c6c425452d9de608
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1597189
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Since suspended ports run a very tight while loop which does not include
the pd_task's event processing, sysjumping an unlocked system with
a suspended port hangs forever.
A suspended port cannot be in an alternate mode, so this change skips
setting PD_EVENT_SYSJUMP for such ports (which, currently, is only used
to trigger the exit mode sequence). In the unlikely event that
processing a PD interrupt causes the port to suspend after this check
and before PD_EVENT_SYSJUMP is set, the sysjump loop will also send the
reply event to the caller.
BUG=b:131855159
BRANCH=None
TEST=set a phaser port to fail TCPC initialization, verified that
"sysjump RW" can still succeed with suspended port
Change-Id: I948dd419718d0eb2e5ade58970ed36a8bd51b272
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1613640
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Recently a sink holdoff timer was added to the PD stack which allowed
the state machine to prevent initiating any messages for 200ms after
entering the SNK_READY state. This was to give time for some chatty
sources to send messages to avoid a collision. Apparently, the same
thing can happen when we are a source (collision with chatty sink).
This commit reuses the holdoff timer for resolution as a source as well,
which starts after an explicit contract is established.
In order to prevent any potential new collisions, some jitter based off
of the system timestamp is added to the holdoff timer.
BUG=b:132202148, chromium:925618
BRANCH=firmware-atlas-11827.B
TEST=Flash atlas, plug in a fully featured C-C cable between atlas and
the LG 27UK850-W, verify that no conflict occurs and external display
always works.
TEST=Verify that no messages are initiated by the source within 200ms of
sending PS_RDY.
TEST=Flash nocturne, verify Dell U3818DW still works over C-C cable.
TEST=Flash nocturne, verify CableMatters MST DP hub still works with
charge through.
TEST=Verify with Twinkie that messages are sent at varied timestamps
between 200-300ms in the SNK/SRC_READY state.
Change-Id: I195199de271950ae09c2b26194ddc5f271b296a0
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1600510
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add a new host command that will allow you to lookup a well known device
on the EC. This is useful for FAFT tests that want to talk directly
with i2c devices but don't know the physical address for each platform.
BRANCH=octopus
BUG=b:119065537
TEST=Used this with new faft test in CL:1601300
Change-Id: I82c2d5462fcb4edbc92ea60765971190fed7ae81
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1601060
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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According to USB-C spec 1.3 Table 4-17 "Precedence of power source
usage", the supplier's priority should be:
USB-C 3.0A/1.5A > BC1.2 > USB-C under 1.5A.
This CL propose to raise the BC1.2 priority to fix that
charge_manager won't choose BC1.2 when the port reports it can
supply both TYPEC 500ma and BC1.2 supplier. According to the
spec mentioned aboved, we should prefer BC1.2 rather than TYPEC.
Besdies, charge_manager is able to pick the supplier which provides
the higheste power. The CL simplifies the supplier priority a bit by
taking advantage of the feature.
TEST=Charge kukui with 5V/2A charger and see it can drain 1.34A (DCP
current bound of mt6370 is 1.5A) rather than 0.5A.
TEST=Charge kukui with Type-C 5V3A/CDP/DCP/SDP/PD charger randomly and see
that the current it drains is reasonable.
TEST=Charge soraka with 'A', and plug another port with 'B',
and see it can transist the sinking port from A to B.
Here (A, B) are:
1. (SDP 5V0.5A, Type-C 5V3A)
2. (CDP 5V1.5A, PD)
3. (SDP 5V0.5A, CDP 5V1.5A)
4. (CDP 5V1.5A, Type-C 5V3A)
5. (Type-C 5V3A, PD)
BUG=b:131126720
BRANCH=None
Change-Id: I46384e09d764aa926129358657d0593fca4923c2
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1581859
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Burnside Bridge is a Type-C multi-protocol retimer to be used in on-board
applications. Burnside Bridge offers the ability to latch protocol signals
into on-chip memory before retransmitting them onwards. It can be used to
extend the physical length of the system without increasing high frequency
jitter.
Burnside Bridge supports spec compliant retimer of following protocols:
1. Display Port: four unidirectional DP lanes
2. USB3.1 Gen1/2: one bi-directional USB lane
3. Thunderbolt: two bi-directional CIO lanes
4. Multifunction Display (MFD): two unidirectional lanes of DP and one
bi-directional lane of USB3.1 Gen1/2
Note: Only item 1, 2 & 4 are supported in this CL. Item 3 support will
be added in follow on CLs.
BUG=b:127623438
BRANCH=none
TEST=Manually verified on ICLRVP, able to configure the registers
Change-Id: I2d60dbcaf8fe7a1503f09a2f16007409f059f54e
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1594170
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
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Replace the runtime assertion with a compile time one, saves a bit
of space (~64 bytes on many boards), and warn users earlier of
potential issues.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I7df70b7166dd447a8b1dd8e10710c8bc7ab213e3
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1600943
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
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of strtol().
Behavior changes:
1) Initial '+' character is tolerated.
2) Hexadecimal strings prefixed with "0x" are rejected, if given base
parameter is anything other than 16 or 0, rather than parsed as hex,
diregarding the given base.
3) If given base is 0, strings starting with leading zero will be parsed
as octal, rather than decimal.
4) Initial '-' character allowed before "0x" on hexadecimal numbers.
(Note: This is my first time using git or gerrit, please let me know if there is
some policy or customs that I am not properly adhering to.)
BRANCH=none
TEST=make run-utils_str V=1
Bug: 940329
Change-Id: I71654471b77f0df071a58ff6bed7028f00cd46b5
Signed-off-by: Jes Bodi Klinke <jbk@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1577750
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Jes Klinke <jbk@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This patch fixes null-pointer dereference for svdm_rsp.amode. Some
boards set svdm_rsp.amode to NULL. This patch will make TCPM on those
boards return NACK instead of crash.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Ifdeacbe4e164c5f1f7679ed4bb19a91053936ac6
Reviewed-on: https://chromium-review.googlesource.com/1599729
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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On reset, when pd_partner_port_reset is called, if, for any reason
pd_get_saved_port_flags fails to get the saved port status, we
would risk using unitialized flags from the stack.
The function logic was a little complicated, and can be simplified
quite a bit by returning early if no contract is in place (or if
we fail to read flags from BBRAM).
This should not be a problem on real boards, as the stored value
should be readable from BBRAM.
In any case, the first time we used the flag
if (explicit_contract_in_place && pd_comm_is_enabled(port))
only applies to unlocked RO images, so this never happens in production
(where RO images are locked).
The second case is a little tricker, and we may end up (not) applying
Rp where we should (not):
/* If we just lost power, don't apply Rp. */
if (!explicit_contract_in_place ||
system_get_reset_flags() &
(RESET_FLAG_BROWNOUT | RESET_FLAG_POWER_ON))
return;
Presumably, the worst case here is that a charger may not work after
a brownout/power on.
BRANCH=none
BUG=chromium:958510
TEST=setup_board --board=amd64-generic --profile=msan-fuzzer
cros_fuzz --board=amd64-generic reproduce --fuzzer \
chromeos_ec_usb_pd_fuzzer --testcase \
./clusterfuzz-testcase-minimized-ec_usb_pd_fuzzer-5086219896225792 \
--package chromeos-ec --build-type msan
=> No more MemorySanitizer error.
Change-Id: I40fb87b68dbe5244e8a2ae136508b431db7f96a8
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1600935
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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