| Commit message (Collapse) | Author | Age | Files | Lines |
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In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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This adds the "i2cspeed port [speed]" console command. If only the port
number is given, then the current port bus speed is reported. With 2
arguments, the port bus speed is changed. Valid speeds are 100, 400,
1000 and the unit is kHz.
BRANCH=none
BUG=b:201039003
TEST=with follow-on patches, switched I2C bus speed between 400 kHz
and 1 MHz.
Change-Id: I7ca6b2c7a8fd9abe8e8ec77e4d1702529b297fe8
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3181504
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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32 bit processors don't all allow left shift of
64 bit values. So add this to make it work with
32 and 64 bit processors.
uint64_t bitmask_uint64(int offset);
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I114111c4774bb935a35c7711821b1f2f2f9c037d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3182630
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Yuval Peress <peress@google.com>
Reviewed-by: Yuval Peress <peress@google.com>
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When detaching from a port partner, we clear out all alternate mode
information, but currently we're not clearing out the mux state
reliably. There is a mux state clear in Unattached.SNK, but it should
be called any time we're forcibly detaching a port (due to unplug, error
recovery, or suspend).
BRANCH=None
BUG=b:198204468
TEST=on guybrush, suspend a port with a monitor plugged in and verify
the mux state goes to None while suspended
on voxel, pass tast typec.Mode*.manual
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I894d8b9358b357300848c063a0db6f5f22caf12a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3180267
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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This adds additional checks to the port number validation in
i2c_set_freq. get_i2c_port could potentially return a NULL pointer, so
check for that. Also, when DYNAMIC_SPEED is not enabled on a port,
return ERROR_UNIMPLEMENTED instead of ERROR_INVAL.
BRANCH=none
BUG=b:201039003
TEST=with follow-on patches, switched I2C bus speed between 400 kHz
and 1 MHz.
Change-Id: Ie58d68ee2b64d94681ea1d5044530195210ff661
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3181503
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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Many platforms have requirements to support more than one charge
source (eg. pirika). It can't be supported by just enabling two
different CONFIGS as that can lead to conflicts.
Eg.USD_PD_VBUS_DETECT_TCPC vs USB_PD_VBUS_DETECT_DISCHARGE.
This change provides a framework that supports two different charger
sources in the same build. Please see the CL for relevant logs.
BRANCH=None
BUG=b:194375840
TEST=make -j buildall
Signed-off-by: Parth Malkan <parthmalkan@google.com>
Change-Id: I309cc5930233983e615d90a4290fc749abf7aa2d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088232
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Thermistor drivers now query the device tree for configuration.
Thermistor tests have been updated to be parameterized
on all thermistors enabled in the device tree.
BRANCH=none
BUG=b:184374937
TEST= 1) zmake testall
2) make runhosttests
Cq-Depend: chromium:3161332
Signed-off-by: Aaron Massey <aaronmassey@chromium.org>
Change-Id: Ic5330cd5c33e79e192428ca857651de9a225856e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3133812
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Aaron Massey <aaronmassey@google.com>
Commit-Queue: Aaron Massey <aaronmassey@google.com>
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[CONFIG_AP].ec_rate, populated with sysfs entry |hwfifo_timeout|, is used
to calculate |ap_event_interval| the delay before sending a new event to
the AP.
When load_fifo() still existed (CL:938146), it was critical that a
sample was available before gathering the data. When ODR and
|hwfifo_timeout| are closed, |ap_event_interval| is increased by 5%.
Now, since samples are collected after an interrupt triggers due to at
least one element in the sensor FIFO or are scheduled based on the
sensor data rate (forced mode), we are guaranteed to have an event.
We should actually decreate |ap_event_interval| by 5% to be sure an
event is triggered.
When both an interrupt based sensor and a force sensor are at running at
the same ODR, they will probably not be in phase, but there will be
opportunity to send event to the host. One sensor will have a fix delay,
guaranteed to be less than its ODR.
BUG=b:195264765,b:129159505,b:73557414
BRANCH=many.
TEST=Without the change, on gaybrush, we can see that events are sent 2
by 2, event when the AP asks for them immediately.
Using 'iioservice_simpleclient --device_id=3 --channels="timestamp"
--frequency=49 --samples=40' (50Hz ODR):
: Before : After
Latency tolerance: 0.070408 s : 0.070408 s
Max latency : 0.024089 s : 0.004047 s
Min latency : 0.003339 s : 0.003167 s
Median latency : 0.02319 s : 0.003565 s
Mean latency : 0.013644 s : 0.003567 s
Change-Id: I9035dd535ff2895be5011335c5f44bd069c9421e
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3172269
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Check parameter us in void usleep(unsigned us) under common, to avoid
triggering ASSERT(us), it may be a good idea to figure out which caller
to pass 0 parameter, but it may be difficult during run-time. remove
ASSERT(us) in this usleep() routine
BUG=none
BRANCH=none
TEST=Tested on ADL RVP and MCHP1727 MECC system
without parameter 0 checking, ASSERT(us) is triggered as POR:
[0.482657 power_chipset_init: power_signal=0x0]
[0.484735 SW 0x01]
ASSERTION FAILURE 'us' in usleep() at common/timer.c:184
=== PROCESS EXCEPTION: 00 ====== xPSR: 000cfb43 ===
r0 :000000b8 r1 :000e9aa6 r2 :000e9ad0 r3 :000d1a51
r4 :dead6663 r5 :000000b8 r6 :000765f4 r7 :00040314
r8 :00118e00 r9 :000e4aa8 r10:000e456c r11:00000000
r12:00000000 sp :0011b420 lr :00000030 pc :00000030
after checking is added, ASSERT(us) is not hit
Signed-off-by: martin yan <martin.yan@microchip.corp-partner.google.com>
Change-Id: I2f58ea132da7bf7a5dd315a69675013617eb0a64
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3138620
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
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To support multiple OS and to reduce the BOM stuffing options on
Intel RVP, Packet mode GPIO is added on I/O expander hence added
overridable function.
BUG=b:200189880
BRANCH=none
TEST=make buildall -j
Change-Id: Ieea1129614258393f7c73712ed28ed50b9fbf8fb
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3087618
Reviewed-by: Li Feng <li1.feng@intel.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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BRANCH=none
BUG=none
TEST=zmake testall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I80f53103b3bb873da5627dec116386741b496a94
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3171693
Tested-by: Yuval Peress <peress@google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Yuval Peress <peress@google.com>
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API pd_get_am_discovery() sets the lock (task access bit) to keep track
of EC tasks accessing the pd port discovery data. If any of the task
access bits are set,EC host task typec discovery handler will return
EC_RES_BUSY to host, indicating discovery data is modified while copying
port discovery data to the host. Hence the lock/task access bit should
be set only when the port discovery data is modified by any tasks.
Setting of lock/task access is removed from pd_get_am_discovery() and
implemented new api pd_get_am_discovery_and_notify_access() for this.
pd_get_am_discovery() proto type is changed to return 'constant pointer'
which forces developers to use pd_get_am_discovery_and_notify_access()
when they intend to access and modify discovery data.
summary of changes implemented.
- Remove setting of task access bit from pd_get_am_discovery().
- modify pd_get_am_discovery() prototype to return constant pointer.
- implement new api pd_get_am_discovery_and_notify_access()
- Replace calls to pd_get_am_discovery() with new api
wherever discovery data is accessed and modified.
BRANCH=none
BUG=b:197466819 b:190390784
TEST=Verified 50 cold boot cycling with TBT device attached.
Device detected in every cycle.
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
Change-Id: I5b6f1f2b91d92ddbe58f3bf994f684abee948c02
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139858
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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A field (cros_fwid_rw) was added to ec_response_get_version and the
version was updated to v1. Some system components that still use v0
of the version host command fail because the size of the response
does not match the updated ec_response_get_version struct.
Restore ec_response_get_version to match v0. Create a new
ec_response_get_version_v1 structure with the added v1 fields.
This allows legacy code to continue using ec_response_get_version,
which matches the expected response size for the v0 command.
BUG=b:188073399,b:200075921
TEST=EC console 'version' works
Legacy 'ectool version' works with old an new EC firmware.
New 'ectool version' works with old and new EC firmware.
BRANCH=None
Change-Id: I51a052a550c2460f2604da8e04fc43c36acba4d5
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169100
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Since the drivers are now taking a mux_state_t set of flags to update,
go ahead and unify the usb_mux API this way as well. It makes the
parameters more apparent than the 1/0 inputs, and aligns the stack to
use the same parameters.
BRANCH=None
BUG=b:172222942
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ie943dbdf03818d8497c0e328adf2b9794585d96e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095438
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This path was hitted by ec_usb_pd_fuzzer.
BUG=b:198325864
TEST=cros_fuzz --board=amd64-generic reproduce \
--fuzzer ec_usb_pd_fuzzer \
--testcase /build/amd64-generic/tmp/\
clusterfuzz-testcase-minimized-ec_usb_pd_fuzzer-6223286274490368 \
--package chromeos-ec --build-type ubsanh
BRANCH=main
Change-Id: I9575a890bba16145f3d92d1ecc84afcf12d72d67
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3159850
Tested-by: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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Add support for CONFIG_I2C_DEBUG and CONFIG_I2C_DEBUG_PASSTHRU options
to zephyr.
BUG=none
BRANCH=none
TEST=zmake testall
TEST=Add CONFIG_PLATFORM_EC_I2C_DEBUG=y on herobrine, verify "i2ctrace"
command is available and functional.
TEST=Add CONFIG_PLATFORM_EC_I2C_DEBUG_PASSTHRU=y on herobrine, verify
I2C passthru messages shown during TCPC firmware sync.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ic2d9977af4fa707dab4fdaff332fbcc34491c5fe
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163211
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Many Chromebooks will stop sourcing Vconn in G3, and don't have
sufficient notice during chipset transitions to properly swap Vconn back
to the partner before it is dropped. For these cases, send a hard reset
in order to move the role of Vconn supplier back to the source.
Note that some boards use GPIO checks to verify whether they can source
Vconn, and these could take some amount of time after G3 entry to
settle.
BRANCH=None
BUG=b:199044441
TEST=on guybrush, attach a charger which will not swap Vconn and observe
no hard resets are sent in G3. Attach charger which does Vconn swap and
observe a hard reset is sent, and the cable is probed once the system is
powered on again.
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ia1c9533c36c6c7a650109182c5adf8444ffde43a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3161320
Tested-by: Li Feng <li1.feng@intel.com>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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enter_usb_cable_is_capable() doesn't handle non-Emark cable case.
If cable is neither passive cable nor active cable, return false.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: I82c9df842d05fb78535c8d6d310bf6d1913c25b8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3153356
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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EC version does not follow the the AP and OS version. This causes
confusion during development. This change augments the EC version output
to include the CrOS FWID when available. The CrOS FWID will be missing
when the CrOS EC is built outside of cros_sdk. When CrOS FWID is missing
'CROS_FWID_MISSING' will be used.
Zephyr/zmake support will be added later, CROS_FWID32 is set to
'CROS_FWID_MISSING' in zephyr builds until then.
BUG=b:188073399
TEST=version
21-05-20 16:43:18.627 Chip: Nuvoton NPCX993F A.00160101
21-05-20 16:43:18.631 Board: 1
21-05-20 16:43:18.631 RO: guybrush_v2.0.8770+f47439f75
21-05-20 16:43:18.634 guybrush_13983.0.21_05_20
21-05-20 16:43:18.639 RW_A: * guybrush_v2.0.8770+f47439f75
21-05-20 16:43:18.641 * guybrush_13983.0.21_05_20
21-05-20 16:43:18.644 RW_B: guybrush_v2.0.8770+f47439f75
21-05-20 16:43:18.644 guybrush_13983.0.21_05_20
21-05-20 16:43:18.647 Build: guybrush_v2.0.8770+f47439f75
21-05-20 16:43:18.651 guybrush_13983.0.21_05_20 2021-05-20
21-05-20 16:43:18.657 16:31:19 robbarnes@robbarnes0
ectool version
RO version: guybrush_v2.0.8770+f47439f75
RO cros fwid: guybrush_13983.0.21_05_20
RW version: guybrush_v2.0.8770+f47439f75
RW cros fwid: guybrush_13983.0.21_05_20
Firmware copy: RO
Build info: guybrush_v2.0.8770+f47439f75
guybrush_13983.0.21_05_20 2021-05-20 16:31:19 robbarnes@robbarnes0
Tool version: 1.1.9999-f47439f @robbarnes0
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: Ief0a0c6e9d35edc72ac2d4780ee203be41d7305f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2894145
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Don't clear discovery data when resetting active modes during mode exit.
BUG=b:141363146
TEST=make buildall
BRANCH=firmware-volteer-13672.B-main
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I8052641bb850ce8486eb9c82641b41880cb97d65
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3123837
Reviewed-by: Diana Z <dzigterman@chromium.org>
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To call usleep() we must be sure that interrupts are enabled and we are
not in interrupt context. This is required because hardware timer is
used to make sleeping task ready. Also on Cortex-M task switching is not
working properly when interrupts are disabled.
If above conditions are not met, just print warning and use udelay().
BUG=b:190597666
BRANCH=none
TEST=make -j buildall
TEST=Call usleep() when interrupts are disabled and make sure that
warning is printed and EC doesn't crash. One can implement console
command to test this. Perform this test on following cores:
cortex-m - this is the most common core, eg. bloonchipper
minute-ia - this is used for Intel Sensor Hub (cros_ish)
eg. drallion board
riscv-rv32i - hayato (asurada family) has EC chip based on risc-v
nds32 - ampton (octopus family) has EC chip based on it
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Ia38ef0f0511ca1298d3153fa77e169019f4c4c31
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953235
Tested-by: Patryk Duda <patrykd@google.com>
Commit-Queue: Marcin Wojtas <mwojtas@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Connect TBT/USB4 device to PD port in G3 state, port discovery requests
to be vconn source even the PP5000_A rail is turned off in G3, as a
result system won't be able to source vconn and cable discovery fails.
Port discovery should check if sourcing vconn is possible at board
level before it requests swap vconn so to prevent this failure.
BUG=b:198226223
BRANCH=none
TEST=Boot up ADL RVP, put system in G3 by "shutdown -h now", plug in
Gatkex board to port 0, confirmed EC does not request vconn swap in
G3 if 5V is not available. Wake up system by "powerbtn" on EC console,
cable discovery is successful.
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: Ic94c21dbfe0c910b6c9826302b8658eeeff44b72
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3131408
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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When fp_finger_match() function returns code which indicates that
match failed it also sets number of matched template to -1.
Until now, in fp_process_match() we set internal error code when
finger number was invalid (fgr variable was set to -1). This resulted
in overwriting MATCH_NO, MATCH_LOW_QUALITY, MATCH_LOW_COVERAGE with
MATCH_NO_INTERNAL error code when match failed. As a result, biod was
receiving only internal errors always when match failed.
Now we overwrite error code with internal error only when
fp_finger_match() returns negative value or when it returns success,
but finger template number is outside range. In other cases we pass
unchanged error code to biod.
BUG=b:184843581
BRANCH=none
TEST=Flash FPMCU firmware on Chromebook. Reboot Chromebook, make sure
your firmware is running. Cover up part of sensor with paper and
try to unlock device. Compare biod and cros_fp logs, make sure
that biod reports the same reason on failed attempts.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I64e6cb2850c0bf4700482c35899f23b8102a480b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3135425
Tested-by: Patryk Duda <patrykd@google.com>
Commit-Queue: Patryk Duda <patrykd@google.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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When interrupts are disabled we should follow the same path like in
case when we are in interrupt context. This will fix infinite loop when
calling uart_flush_output() (eg. when ASSERT is triggered) with disabled
interrupts
BUG=b:190597666
BRANCH=none
TEST=Trigger ASSERT when interrupts are disabled. Make sure that panic
message is shown. Perform this test on following cores:
cortex-m - this is the most common core, eg. bloonchipper
minute-ia - this is used for Intel Sensor Hub (cros_ish)
eg. drallion board
riscv-rv32i - hayato (asurada family) has EC chip based on risc-v
nds32 - ampton (octopus family) has EC chip based on it
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: If88881c6444a40a9c6459d8a6ff42f3ad4c4d750
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953234
Commit-Queue: Marcin Wojtas <mwojtas@google.com>
Tested-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add hibernate flag. Before system reset, it should be distinguished as
hard reset or hibernate reset and saved in BBRAM.
BUG=none
BRANCH=none
TEST=none
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change-Id: I0e06f3d1bea89ead1795cc07677e22e841643a97
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139528
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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There was a comment that described the temperature value as if it was
in 0.1 steps of C degrees, where it was in pure C degrees.
It was converted from steps of 0.1 K to 1 oC.
BRANCH=main
BUG=none
TEST=No need to
Change-Id: I0545588bc29465f2346a30182b89063f5e24fea5
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3111365
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
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The is_cable_speed_gen2_capable() function should use information about PD
revision instead of checking the VDM version.
BUG=None
BRANCH=None
TEST=None
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I95a8bf977020b3756e5c82fde523c8ae29c455aa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3113970
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Support dynamic PDO selection CONFIG_USB_PD_DPS.
This config controls the charging voltage and power according to the
input power and battery configuration.
DPS would continuously evaluate the system load and current charging
voltage, and decide a new one by below:
1. If the PDO can fulfill system desired power.
2. If the PDO is efficient for the battery configuration.
To detect if the system load cannot be fulfilled by the current PDO,
it checks:
1. if the input current closes to the PDO current limit.
2. if the input power closes to the PDO maximum power.
To detect if the system load can be fulfilled by a more efficient PDO,
it checks:
- if the voltage of a new PDO is closer to the battery voltage than the
current PDO, and the power is able fulfill the system load.
BUG=b:169532537
TEST=1. tested on asurada, the charging voltage is able to switch to
different PDOs under different system loads
2. tested that the DPS is able to switch charge port
(e.g. C1 12V -> C0 9V) based on the provided PDOs.
BRANCH=asurada
Change-Id: I7c7706b331dc0d4f8ac68569dc7ed852fc9308e3
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897064
Tested-by: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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As a followup to CL:3104290, give the TCPCI TRANSMIT and
RX_BUF_FRAME_TYPE types more consistent names. Most of them can be used
for receiving, not just transmitting. Fix lint errors thus revealed.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I399ec479eacc18622fc4d3f55f8bdabf4560fcff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3125995
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add board_get_vbus_voltage to get vbus voltage by board, for
ADC_VBUS maybe is only for one typec port when the DUT supports
multiple typec.
BUG=b:196001868
BRANCH=none
TEST=show correct C1 vbus voltage on tomato
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: Ia567ec3bddf4f62a08c9902b4f0721783f2c07ff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3084403
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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This reorganizes adc.h and adc_chip.h so that general code only needs to
know about adc.h. adc_chip.h is now included by adc.h directly and does
not need to be included in general code.
BRANCH=none
BUG=b:181271666
TEST=buildall passes (with next patch in series)
Cq-Depend: chromium:3120316
Change-Id: I8bc107c6900e831a57f7a7fb8668eb08bb179d6c
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120315
Reviewed-by: Keith Short <keithshort@chromium.org>
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This CL adds a new overridable function to allow boards more control
over the USB mux. For type-c only connections, the mux may only be set
one time based only on data role.
The default function returns false, so only boards which override this
function will be affected.
BUG=b:195042155
BRANCH=quiche
TEST=Verfied that when I connect USBC only source on gingerbread that
the TUSB1064 usb mux gets configured to enable USB3.1 mode.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I5cc7466d2d13c46b1ff6cfc48af577559591f6e4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3119224
Tested-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Some platforms (e.g. servo_v4(p1)) are designed to act only as a
UFP considering superspeed terminations. Add config option to properly
manage usb superspeed muxer for such.
BUG=b:137887386,b:182419010
BRANCH=main
TEST=With servo_v4p1 connected to the DUT, unplug and replug CHG couple
of times in order to force PR_SWAP on DUT port. Each time verify
on the DUT console, whether all USB3 devices are visible. They
should be, since servo is trying to perform DR_SWAP when it acts
as a SRC.
Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: I0a7756f0bb2192795b7489334ed01d317d3e54ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3094246
Reviewed-by: Michał Barnaś <mb@semihalf.com>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
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This commit moves some of the standard library functions from util.c
file to util_stdlib.c file. It will allow to use util.c for both
CrOS EC and Zephyr builds and will make shim util file unnecessary.
BRANCH=main
BUG=b:177096231
TEST=Build both, CrOS EC and Zephyr firmwares
Compilation should finish without any problems
After flashing, both versions work as they should
Change-Id: If6f930a04d28bec35faa16759f43b36176bf3de7
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3081827
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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TMP112 supports .0625 degrees of resolution. Retain this resolution and
support reading the temp in degrees millikelvin.
BUG=b:176994331
TEST=Build and run on guybrush
BRANCH=None
Change-Id: I2802016b1edb08678953238e7f01acdd320c37cf
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001391
Commit-Queue: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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The get_cc function call is slow (2 i2c transactions in tcpci
implementation) and redundant in FRS path.
Use short-circuiting to remove the function call.
This saves ~2ms on Cherry.
BUG=b:190348051
TEST=Combined with other CLs in the chain, verify FRS workable on Tomato
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I4161bc3a5ba17eb4983d85dd78465c2e623f46dc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3109707
Reviewed-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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This reverts commit 55f40b89d7f7b6cc3005e0d6fa755345d514a578.
Reason for revert: type-C port with IT83XX can not detect plugged in device since the dual role CC1/CC2 voltages keep at 3V other than toggling for device.
Original change's description:
> TCPMv2: Fix LPM for non-dual role auto toggle chips
>
> If the "dual role" is enabled and the TCPC chip does not support
> "Dual role auto toggle mode" then the PD state remains in
> PD_DRP_TOGGLE_ON state in active state of the AP. Hence check for CC
> line open state to decide to enter low power mode for such devices.
>
> BUG=b:195406641
> BRANCH=none
> TEST=Tested on ADL RVP, FUSB302 & IT83XX can enter LPM
> > pd 0 state
> Port C0 CC1, Disable - Role: SRC-UFP TC State: LowPowerMode,
> Flags: 0x0010 PE State: , Flags: 0x0001
>
> Change-Id: Ic70c6bfcd2ffd0721fdcaf6e61c68736971e037b
> Signed-off-by: Poornima Tom <poornima.tom@intel.com>
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088161
> Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
> Commit-Queue: Vijay Hiremath <vijay.p.hiremath@intel.com>
Bug: b:195406641
Change-Id: I9a2deed330b0169be220e9b0a83125eb6a6e0faa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3109275
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
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Add macros to convert to and from milli kelvin and various temperature
units. Utilize round_divide for more accurate conversions.
BUG=b:176994331
TEST=Unit test
BRANCH=None
Change-Id: Ie6750b9d2d2b8093fdf9c14f904382e91d8d95bb
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078051
Reviewed-by: Keith Short <keithshort@chromium.org>
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The current API for system_get_scratchpad mixes the status and the value
being read. Update the signature to allow both.
BRANCH=none
BUG=b:195481980
TEST=make testall && zmake testall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I3a5f5ad523d507c53a5d474806f58afafb82e70c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3074828
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Convert usages of this enum to tcpm_sop_type.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I5fed273d72e7ad0e191db0cb0d121b70bdd9ecdb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104291
Reviewed-by: Keith Short <keithshort@chromium.org>
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Rename tcpm_transmit_type to tcpm_sop_type to reflect that it can be
used for Rx as well. Describe it in comments. This prepares to
consolidate enum pd_msg_type into this enum.
BUG=b:155476419
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Ife97d4ad51c48f2e832b94e007954919e236a309
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3104290
Reviewed-by: Keith Short <keithshort@chromium.org>
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Previously, functions for reading board version and sku id were defined
in board.c files which are not compiled in Zephyr builds.
Logic from board.c files should be moved to the DeviceTree files.
This commit adds support for defining board version and sku id
pins and numeral system used to decode them.
BRANCH=main
BUG=b:194136536
TEST=Call system_get_sku_id and system_get_board_version
on CrOS EC and Zephyr, values should be correct and
the same on both versions
Change-Id: I61b5e205cb2a2299ad86c5dff38c05a9659eb2d3
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3048102
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
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If the "dual role" is enabled and the TCPC chip does not support
"Dual role auto toggle mode" then the PD state remains in
PD_DRP_TOGGLE_ON state in active state of the AP. Hence check for CC
line open state to decide to enter low power mode for such devices.
BUG=b:195406641
BRANCH=none
TEST=Tested on ADL RVP, FUSB302 & IT83XX can enter LPM
> pd 0 state
Port C0 CC1, Disable - Role: SRC-UFP TC State: LowPowerMode,
Flags: 0x0010 PE State: , Flags: 0x0001
Change-Id: Ic70c6bfcd2ffd0721fdcaf6e61c68736971e037b
Signed-off-by: Poornima Tom <poornima.tom@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088161
Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Vijay Hiremath <vijay.p.hiremath@intel.com>
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If DUTs enter mode in S5->S3, and the mux would be re-configured
after in S3 and make the DP alt mode not correctly function.
BUG=b:194031794
TEST=plug DP dongle in S5/G3 on Asurada, boot to S0, and see display
BRANCH=asurada
Change-Id: Iee0ea2549e68ca7effc8cc538c22f4d388f10943
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3093347
Reviewed-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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Currently, only the virtual mux driver uses the mux ACK feature, but the
actual wait for the host command ACK is a part of the usb_mux general
code. Generalize this mux ACK wait so it's available if needed in the
future for more muxes.
Additionally, moving this wait out of the mux set will allow us to lock
the muxes intelligently between tasks, without keeping the muxes locked
during the inactive ACK wait.
BRANCH=None
BUG=b:172222942,b:186777984
TEST=tast typec.Mode*.manual on voxel
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I61a043425a482cc6f3170548c888d91ec20c2a82
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078411
Reviewed-by: Keith Short <keithshort@chromium.org>
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Per the TCPCI spec figures, we should be setting the CC lines and
enabling Auto Discharge Disconnect before attempting to source Vbus.
Doing these things out of order may cause Vbus sourcing to appear to
fail when a TCPC is waiting for ADD to set before enabling Vbus.
BRANCH=None
BUG=b:195966013
TEST=on guybrush, verify both C0 and C1 successfully detect that they
are sourcing Vbus with an unpowered Apple 3-in-1 dongle
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Icb0bd221a7d8eb069b74327c27894e5d92e95329
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088003
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Currently, the battery sustainer discharges the battery using
CHARGE_CONTROL_IDLE, which uses the AC current and stops the
current from the battery.
With this change, when lower < upper, the sustainer discharges using
DISCHARGE. When lower == upper, the sustainer discharges using IDLE.
BUG=b:188457962
BRANCH=None
TEST=run-sbs_charging_v2
Change-Id: I4af31eff488bc9cfa627f84994b685488c3c9061
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3049290
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Derek Basehore <dbasehore@chromium.org>
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Currently, unit tests do not check whether the battery sustainer can be
enabled when the battery is already full or when the AC is already
present.
This patch adds tests which check the battery sustainer can be enabled
when the battery is already full or when the AC is already present.
BUG=b:188457962
BRANCH=None
TEST=run-sbs_charging_v2
Change-Id: I4ec9785554d126baca0b60e889c4a2dabbfb628a
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078401
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Add the standard string function strcspn. strcspn calculates the length
of the initial segment of s which consists entirely of bytes not in
reject.
BUG=None
TEST=make run-utils_str
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I3eb9a4fff42cb0fdcdb288d00f8070e0f22b2179
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3057730
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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When we enalbe battery sustain after battery returns that it is full,
we need to add this condition for sustain_battery_soc(). Also, add this
test condition for battery sustainer.
BUG=b:188457962
BRANCH=none
TEST=make sure the battery sustain works when enabling it after battery
returns that it is full. Also, make sure that "make run-sbs_charging_v2"
pass.
Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
Change-Id: If10b9fd0264717abfb7cdbb7ddc947b370291895
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3070946
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
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