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* mchp: Optimize spi_flash_read() APImartin yan2021-08-061-1/+1
| | | | | | | | | | | | | | | | | | Optimize SPI flash read timing, MEC172x QMSPI controller controls CS# by hardware, it will add several system clock cycles delay between CS deassertion to CS assertion at the start of the next transaction, this guarantees SPI back to back transactions, so 1ms delay can be removed to optimze timing. BUG=none BRANCH=none TEST=Tested on ADL RVP and MCHP1727 MECC system via FAFT ECBootTime job save 720ms as EC performs 180KB RW code's SHA256 hash computation Signed-off-by: martin yan <martin.yan@microchip.corp-partner.google.com> Change-Id: I5cf9c668efb1cd008b91cdd8aa09f7351c017af0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3074767 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* i2c_controller: Check if get_i2c_port returns NULLLukasz Hajec2021-08-061-0/+3
| | | | | | | | | | | | | | | | | This patch fixes an issue, when nonexistent port number parameter is passed to i2cxfer and causes panic due to using null pointer. Add check if get_i2c_port returns NULL and return EC_ERROR_INVAL. BUG=b:186873536 BRANCH=none TEST=Run i2cxfer command with different parameters on servo_v4p1, nocturne and grunt - do not observe panic. Signed-off-by: Lukasz Hajec <lha@semihalf.com> Change-Id: I8bd90d898e1097b59ca6c9a1eff850bc2dc808e4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3074620 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
* Drop some obsolete boardsJack Rosenthal2021-08-052-53/+0
| | | | | | | | | | | | | | | | | | | | | samus: AUE in M91, M92 pushed to stable already samus_pd: samus pd chip dragonegg: canceled cheza: canceled flapjack_scp: flapjack was canceled atlas_ish: atlas shipped, but ish project canceled sklrvp,glkrvp: these are pretty old intel reference boards and the portage overlays were already deleted ... assume nobody needs the EC firmware anymore either BUG=none BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I794867ac82f37ffa2267e2e59ac02bc381688c57 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069716 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* lid_angle: Create a common callback for lid angle changesWai-Hong Tam2021-08-051-3/+19
| | | | | | | | | | | | | | | | | | | | | | Each board defines its own callback lid_angle_peripheral_enable(). The implementation is very similar. Create a common implementation and reduce the duplicated code. This CL removes the board callbacks which are identifical to the common callback. If it is slightly different, keep it and add the __override tag. The check of TEST_BUILD is unnecessary as the board callback is not linked in the test build. BRANCH=None BUG=b:194922043 TEST=Build all the images. Change-Id: I73d381730f35b80eff69399cdfc5fb54f839aee0 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069175 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* retimer: move operations to specific TC stateli feng2021-08-041-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | Retimer firmware update operations as below should be handled when PD task is suspended. Move those operations from tc_run() to TC state TC_DISABLED tc_disabled_run(). USB_RETIMER_FW_UPDATE_SET_USB USB_RETIMER_FW_UPDATE_SET_SAFE USB_RETIMER_FW_UPDATE_SET_TBT USB_RETIMER_FW_UPDATE_DISCONNECT BUG=b:193685562 BRANCH=none TEST=Voxel DVT, retimer firmware update Chromium solution, CPFE 13892 OS/Coreboot, PD port 1 NDA, successfully scan retimers. TEST=Voxel DVT, retimer firmware update upstream solution, coreboot includes patches supporting upstream kernel solution, PD port 1 no device attached, successfully scan retimers. Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I4dd0fcfafed362be90182fc8f1ef656495cdc8e3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3055670 Tested-by: Kevin DeRossett <kevin.l.derossett@intel.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* retimer: firmware update uses task_wake()li feng2021-08-031-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When TCPC low power mode is enabled, PD ports will enter TC state TC_LOW_POWER_MODE if no device is attached, so tc_low_power_mode_run() pauses PD task during PD task running. Meanwhile, retimer firmware update is operated on NDA port, this will start the paused PD task to run in low power mode. The result of one place pauses task and one place starts task is unpredictable. This causes retimer firmware update failure from time to time. Thus task_wake() is used instead of tc_start_event_loop(). BUG=b:193685562 BRANCH=none TEST=Voxel DVT, retimer firmware update Chromium solution, CPFE 13892 OS/Coreboot, PD port 1 NDA, successfully scan retimers. TEST=Voxel DVT, retimer firmware update upstream solution, coreboot includes patches supporting upstream kernel solution, PD port 1 no device attached, successfully scan retimers. /sys/bus/thunderbolt/devices/0-0/usb4_port3 # echo 1 > offline /sys/bus/thunderbolt/devices/0-0/usb4_port3 # echo 1 > rescan /sys/bus/thunderbolt/devices/0-0/usb4_port3 # ls 0-0:3.1 firmware_node link offline power rescan uevent /sys/bus/thunderbolt/devices/0-0/usb4_port3 # echo 0 > offline Signed-off-by: li feng <li1.feng@intel.com> Change-Id: Ia5c6af0dc8dbace1f0391ed2891ac464d07d9cc0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3029662 Reviewed-by: Diana Z <dzigterman@chromium.org>
* common/keyboard_vivaldi: Add new top row action keyScott Chao2021-08-031-0/+2
| | | | | | | | | | | | | | Use codeset 1 e01b(make)/ e09b(break) for MICMUTE. Use codeset 1 e01e(make)/ e09e(break) for KBBL toggle. BUG=b:194146863 BRANCH=none TEST=make -j BOARD=gimble Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: Ide0873c32236ead87d661e36b5f9b20cfd78144b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3060242 Reviewed-by: Boris Mittelberg <bmbm@google.com>
* COIL: virtual_battery: Update terminologyCaveh Jalali2021-08-021-2/+2
| | | | | | | | | | | BRANCH=none BUG=b:163885307 TEST=compare_build.sh matches Change-Id: I3d4c0d3498d2583836cef8886a0f58ac4ba2f1e4 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3060265 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* COIL: onewire: Update terminologyCaveh Jalali2021-08-021-3/+6
| | | | | | | | | | | | BRANCH=none BUG=b:163885307 TEST=compare_build.sh matches Change-Id: Ie9547c450c63390f0b1e80bcb2fa75e5e748e215 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3060264 Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* flash: Set CBI EEPROM WP immediately if SW WP setAseda Aboagye2021-07-301-0/+10
| | | | | | | | | | | | | | | | | | | | | | With `CONFIG_EEPROM_CBI_WP`, the EC will set the the CBI EEPROM WP according to `system_is_locked`. The system lock status is also cached. In order to prevent requiring an EC reboot after setting the software write protect status, this commit will set the CBI EEPROM WP status when the SW WP is asserted along with the HW WP. This is the same criteria that `system_is_locked` would use when deciding if the system is locked. BUG=b:181769483 BRANCH=None TEST=Build and flash a reworked lalala, enable HW WP, enable SW WP via `flashrom -p ec --wp-enable` and verify that EC_CBI_WP is asserted immediately without requiring an EC reboot. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I987a5b7652134be11c82855aab9ed4eb1442b57c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058077 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* common: system: always define host_command_get_board_versionDenis Brockus2021-07-291-2/+0
| | | | | | | | | | | | | | | | | | | There are platforms that have board defined get_board_version and they should be allowed to have host_command_get_board_version even if CONFIG_BOARD_VERSION_* are not defined. BUG=none BRANCH=none TEST=make buildall TEST=zmake configure -b $PROJ_HAYATO Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I6e2765b40c7cbada82a8ace305899f2e319157c3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058354 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* cbi: Add CONFIG_EEPROM_CBI_WPAseda Aboagye2021-07-293-1/+19
| | | | | | | | | | | | | | | | | | | | | This commit adds the config option, CONFIG_EEPROM_CBI_WP. It is to be defined when the EC directly controls the CBI EEPROM WP signal. The EC will set the WP according to the result of `system_is_locked()`. Note that once the WP is set, the EC must be reset via EC_RST_ODL in order for the WP to become unset. This is enabled by the accompanying hardware. BUG=b:181769483 BRANCH=None TEST=`make -j buildall` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: If490594ab4dd24af98119b01299215b997913b66 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3046412 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* keyboard: Add strict debouncerDaisuke Nojiri2021-07-281-10/+39
| | | | | | | | | | | | | | | | | This CL adds CONFIG_KEYBOARD_STRICT_DEBOUNCE. It makes the keyboard debouncer register a key stroke after deounce is done. This CL also adds a unit test. BUG=b:193505909 BRANCH=Dedede TEST=make run-kb_scan_strict TEST=Blipper Change-Id: Ia380657021035930afab5cafffa8cc2edd7ff475 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044405 Reviewed-by: Jett Rink <jettrink@chromium.org>
* common: vboot_hash: cast UL to uintptr_t to remove warningDenis Brockus2021-07-271-2/+4
| | | | | | | | | | | | | | | | | | CONFIG_MAPPED_STORAGE_BASE is an unsigned long and this kicks back a warning from zephyr builds. So cast it to the uintptr_t to make sure it is the right size. BUG=none BRANCH=none TEST=zmake configure -b $PROJ_HAYATO Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I841025776c4520708ae1a773df27b980594c36d9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3057731 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* TCPMv2: Register Get_Source_Cap failuresDiana Z2021-07-271-6/+21
| | | | | | | | | | | | | | | | | When an attempt to gather source capabilities fails, we should avoid probing for them again by internally tracking the number of capabilities as -1. This saves us traffic on resets with partners that have no source capabilities, and also prevents looping with buggy partners who reply with an unexpected message. BRANCH=None BUG=b:191229962 TEST=on guybrush, ensure we only query a sink-only dongle once Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Iea56619d7aca5df7d1b38d8f0d6a69cac4a825a9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3025865 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Allow tests to clear PE data between runsDiana Z2021-07-271-4/+18
| | | | | | | | | | | | | | The PE stores internal state (ex. capabilities, identity responses) which should be cleared out between unit test runs. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I77b3faefd3f887a68ca9593a7398ae9c3ffb2f17 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3025864 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* system: don't hibernate if AC is presentRicardo Quesada2021-07-261-0/+15
| | | | | | | | | | | | | | | | | | | | | | | This CL prevents hibernation if AC adapter is connected. This is to prevent AP from rebooting. This might happen because if EC is hibernated when AC is connected, it might wake up immediately in response to AC being connected, resulting in AP reboot. BUG=b:192259035 TEST=delbin EC console: run "hibernate" w/ AC: didn't hibernate. Press Alt+Volume Up+H w/o AC: it hibernated. Press Alt+Volume Up+H w AC: it didn't hibernate. BRANCH=none Signed-off-by: Ricardo Quesada <ricardoq@google.com> Change-Id: I07dee088e5b6ed7d0b3901049323d93ef4d0b9c9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3042989 Commit-Queue: Ricardo Quesada <ricardoq@chromium.org> Tested-by: Ricardo Quesada <ricardoq@chromium.org> Auto-Submit: Ricardo Quesada <ricardoq@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* tablet_mode: Fix the race condition of setting the tablet modeWai-Hong Tam2021-07-233-13/+19
| | | | | | | | | | | | | | | | | | | | | | | | | There are 2 tablet mode triggers: * Lid: when the lid angle close to 360 degree, either detected by a GMR sensor or by the angle computed by 2 motion sensors. * Base: when the detachable base is detached. These 2 triggers set the tablet mode status, which as a boolean, resulting a race condition. This CL fixes the race condition. Each trigger updates its own bit. The final tablet mode status is the OR of all bits. BRANCH=Trogdor BUG=b:193873098 TEST=Attached the base, checked tablet_mode enabled; detached the base, checked tablet_mode disabled; flip base to 360 degree, checked tablet_mode disabled; move the base out of the lid, checked tablet_mode disabled. Change-Id: Ia9d9d2d66c194796c1039cc8b746c8d1f28a4496 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044414 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* keyboard: Use __override for keyboard_scan_configDaisuke Nojiri2021-07-231-4/+1
| | | | | | | | | | | | | | | | | Currently keyboard_scan_config is defined by each board using CONFIG_KEYBOARD_BOARD_CONFIG. This patch makes it defined as __override hence removes CONFIG_KEYBOARD_BOARD_CONFIG. BUG=None BRANCH=None TEST=buildall Change-Id: I53a356741ba4d00e829ca59b74ee6dc704188728 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044403 Tested-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* zephyr: i2c: protect physical portDino Li2021-07-221-0/+20
| | | | | | | | | | | | | | | | | | If i2c devices are connected to the same port, they should use the same mutex_lock() index. So the new transaction won't break the ongoing transaction. BRANCH=none BUG=b:189855648 TEST=Enable CONFIG_SMBUS_PEC and voltage regulator function on asurada. No i2c transaction is broken. Change-Id: Ib848e3c2e60b99ce66ad5fd2fc7095f90820a15d Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3010920 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* common/build.mk: drop duplicate rules.Eric Yilun Lin2021-07-211-4/+0
| | | | | | | | | | | | | | | | The rule has been added in the Makefile.rules already. BUG=none TEST=make don't complain BRANCH=none Change-Id: I7af66c23ff8cad775e89330d5d1849a4aa91069e Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2999361 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* LED: modify led_get_state to cover unexpected return when ec initialelmo_lan2021-07-191-0/+2
| | | | | | | | | | | | | | | | | | | When ec initial, the charge state (curr.state) will be 0 which also mean ST_IDLE, and led_get_state will get STATE_DISCHARGE_S0. In this case, we will see led flash. This CL keeps led off when ec is initial. BRANCH=dedede BUG=b:193945782 TEST=On cret, after issue `reboot` via ec console, we won't see led flash. Signed-off-by: elmo_lan <elmo_lan@compal.corp-partner.google.com> Change-Id: I2d14c5ac94cfb17486f4596ff7e82e972b18aafe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3037294 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* retimer: clear unused mux bitsli feng2021-07-191-5/+10
| | | | | | | | | | | | | | | | | | | | During retimer firmware update, EC passes mux value to Coreboot/kernel. Coreboot/kernel checks mux value to know if PD port is NDA, or if port connection is set to what retimer firmware update sequence expects. Some bits of mux value are not used by Coreboot/kernel. This patch clears unused bits; and keeps alternate mode bits and safe mode bit in the mux value. BUG=none BRANCH=none TEST=On ADL RVP, verified NDA port retimer firmware update working. TEST=On Voxel DVT, verified NDA port retimer firmware update working with both Chromium solution and upstream solution. Signed-off-by: li feng <li1.feng@intel.com> Change-Id: I1becc09a0f5c5d4e1fb845c5fe33fa748d44bd4f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3010482 Reviewed-by: Keith Short <keithshort@chromium.org>
* pd: Fix missing polarity_rm_dts in some conditionsMichał Barnaś2021-07-192-3/+3
| | | | | | | | | | | | | | | | Some ifs check for CC polarity not taking DTS enums into account. This can cause that POLARITY_CC1_DTS will be treated as POLARITY_CC2. BUG=b:192652859 BRANCH=main TEST=Build firmware for servo_v4p1 and lazor to check if modified files compile correctly Change-Id: I230fafbf751c7f28545860c648655630150f7597 Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001273 Reviewed-by: Brian Nemec <bnemec@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* ALT-DP: Don't send DP_ATTENTION until after DP_CONFIGScott Collyer2021-07-171-4/+35
| | | | | | | | | | | | | | | | | | | | | | | This CL adds a new variable to the hpd state that enables the pd policy layer to inform the hpd->DP_ATTENTION converter that at least one DP_CONFIG message has been received. This control is used to make sure that DP_ATTENTION messages aren't sent prior the DFP_D being configured for DP port mode. Some port partners may get confused if DP_ATTENTION is sent prior to either DP_CONFIG or DP_STATUS. BRANCH=quiche BUG=b:192051705 TEST=verifed on kasumi (grunt) that the display is extended correctly following usbc hotplug events. Previously, this case was failing 1 out of 3-4 times. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I80d576de7fc0075be2b1a838d1ed764ae7828e8e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3035785 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* TCPMv2: Add delay for detecting CC state in tc_attached_src stateMichał Barnaś2021-07-161-1/+14
| | | | | | | | | | | | | | | | | | | | Some TCPCs require time to return correct status of CC lines after changing ROLE_CONTROL register. If no delay is applied, these TCPCs can incorrectly report CC lines as open which result in changing state to Unattached.Src. This makes power swap not working. For lazor board it takes about 8ms to detect correct values on CC lines, where maximum time from specification is 20ms. Considering this, value of 15ms was set as delay. BUG=b:192353324 BRANCH=main TEST=Running PD FAFTs on lazor gives positive results Signed-off-by: Michał Barnaś <mb@semihalf.com> Change-Id: I25937fcd996d5a67b4acb1833b07c80c395e66b8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3024268 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* chgstv2: Move battery revival code to sub-routineDaisuke Nojiri2021-07-161-40/+36
| | | | | | | | | | | | | | | This patch moves battery revival code to revive_battery. It also uses IS_ENABLED to increase readability. There is no functional change. BUG=None BRANCH=None TEST=buildall Change-Id: I9c2689cdc3bcb843a5916f78c1f5e01948eff477 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2929343 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* common/gpio: Set GPIO flags after setting alternate functionPatryk Duda2021-07-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | On STM32, gpio_set_alternate_function() called with GPIO_ALT_FUNC_NONE argument causes the pin to be set to input. In gpio_reset() function, we are setting flags first and then we are changing pin function to GPIO. As a result, using gpio_reset() on STM32 boards causes pin to be configured as input, regardles of gpio.inc file. To fix this, we should always change pin functionality to GPIO before setting GPIO flags and/or state. This approach seems to be natural also. BUG=b:170432597 BRANCH=none TEST=Flash EC on some STM32 based board (eg. dartmonkey). Use gpio_reset() function on some GPIO pin which is configured as GPIO_OUT_LOW/GPIO_OUT_HIGH in gpio.inc file (eg. FP_RST_ODL on dartmonkey). Use `gpioset` and `gpioget` command to change state of the GPIO pin, and verify it works. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I0a6c2ee8d1c1cf33b14bd54bb432c63b820427be Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3033241 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* chgstv2: Join two battery revival code blocksDaisuke Nojiri2021-07-152-9/+14
| | | | | | | | | | | | | | | | | | | | | | | The 'else' at line 2085 can accommodate only one statement since it doesn't have a curly brace. So, it's (unintentionally) closed by 'battery_seems_to_be_disconnected = ...', which was inserted by crrev.com/c/210343. It should be closed by the subsequent code ( the code wrapped by CONFIG_BATTERY_REVIVE_DISCONNECT). There are two code blocks which fix unresponsive batteries (i.e. CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD & CONFIG_BATTERY_REVIVE_DISCONNECT). chgstv2 needs to run one of these at a time not both. That is, if CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD is applied, CONFIG_BATTERY_REVIVE_DISCONNECT should be skipped. BUG=None BRANCH=None TEST=buildall Change-Id: Iae13cf6c33d02fe62e89b6c1bb2b5b3dc49ff8fd Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2929342 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* chgstv2: Rename battery_seems_to_be_dead/_disconnectedDaisuke Nojiri2021-07-151-16/+16
| | | | | | | | | | | | | | | This patch renames battery_seems_to_be_dead/_disconnected to battery_seems_dead/_disconnected. There is no functionality change. BUG=None BRANCH=None TEST=buildall Change-Id: I03d023df4da4b3ab698d1d2ddafb237bb4ea60be Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3007374 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* chgstv2: Move code waking up battery to sub-routineDaisuke Nojiri2021-07-151-75/+78
| | | | | | | | | | | | | | This patch moves the code waking up a battery to wakeup_battery. There is no functionality change. BUG=None BRANCH=None TEST=buildall Change-Id: I1eb88a6b175744abf2868027aebf8c50ab441279 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2929341 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* chgstv2: Move battery validate code to battery.cDaisuke Nojiri2021-07-152-19/+24
| | | | | | | | | | | | | | This patch moves the code validating battery parameters to battery.c. There is no functionality change. BUG=None BRANCH=None TEST=buildall Change-Id: I1706c4b504565b52964391077894665b4e5d1a86 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3007375 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Fuel Gauge: Add interface for optional sleep supportDiana Z2021-07-141-0/+17
| | | | | | | | | | | | | | | Some fuel gauges may support a "sleep" mode which will enable lower power consumption in some states. Set up a structure for this along with an API which boards may use to call it. BRANCH=None BUG=b:186774653 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I155702bfb50a7353c7728445d60ecf853e39e4c2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2967037 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cbi: Introduce CONFIG_CBI_GPIOPhilip Chen2021-07-143-1/+75
| | | | | | | | | | | | | | | | | | | For the boards where SKU_ID/BRD_ID comes from the strapping pins on EC, this new config enables AP to ask EC for those hardware configs using the CBI host command `EC_CMD_GET_CROS_BOARD_INFO`. BRANCH=None BUG=b:186264627 TEST=make buildall -j TEST=Enabled CONFIG_CBI_GPIO for lazor and manually verified with `ectool cbi get`. Change-Id: I7ec9097bab96d2076d9d42db2d003460db000113 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3002452 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* TCPMv2: Fix typoCaveh Jalali2021-07-131-1/+1
| | | | | | | | | | | | | | This fixes a typo in usb_pd_dpm. BRANCH=none BUG=none TEST=buildall passes Change-Id: I0b3edf8765110dae88bd49ec5e9371f3147997be Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3024851 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* TCPMv2: Gate requesting sink capabilities on related featuresDiana Z2021-07-121-4/+12
| | | | | | | | | | | | | | | | | There are a number of features that may cause a board to need sink capabilities (3.0 A port balancing, FRS, or AP host commands). However, other boards may not need these and the added traffic can increase the liklihood of collisions on PD 2.0 connections. BRANCH=None BUG=b:192051705 TEST=connect honeybuns to TCPMv1 DUT and verify DP alternate mode can be reliably entered Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I70e2f360a9a45eee85ed555cb0165937c01a661a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3016407 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* system: Generalize system_get_board_version()Philip Chen2021-07-121-5/+15
| | | | | | | | | | | | | | | | | | Extend system_get_board_version() to support not only AP-sourced SKU ID but also EC-sourced SKU ID, whose getter function can be customized per board. BRANCH=None BUG=b:186264627 TEST=make buildall -j TEST=zmake testall Change-Id: I764868d6472fb66480a43d028e5a79933b10117d Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3017602 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* common/i2c_controller: Fix the port protection logicKarthikeyan Ramasubramanian2021-07-091-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently depthcharge sends EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE_TCPCS to protect all the I2C ports after performing auxiliary firmware updates and before jumping to OS. But the port protect status is overridden by the absence of passthru_allowed operation for an I2C port. Except for one board (elm), passthru_allowed operation is not defined for any I2C ports. This causes the I2C passthrough to remain supported even after the ports are protected. Fix this by denying the I2C command passthrough for I2C ports which are protected and have no passthru_allowed operation defined. BUG=b:192503665 BRANCH=All TEST=Build and boot to OS in Drawlat. Ensure that all I2C ports are protected before jumping to OS and any passthru access is denied after that. localhost ~ # ectool i2cread 8 4 0x0b 0x0 EC result 4 (ACCESS_DENIED) localhost ~ # ectool i2cprotect 4 status I2C port 4: Protected (1) localhost ~ # Change-Id: Ifdf0de9e8be1e245314ce357865ac76db4780bc8 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3004111 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* driver: bmi3xx: Add support for BMI323 sensorBhanu Prakash Maiya2021-07-091-0/+1
| | | | | | | | | | | | | | | | | | | | | BMI323 is one of BMI3XX series accel sensor series. Adding defines, driver from Bosch APIs based initial patches submitted by Bosch team members in crrev/c/2966530. BRANCH=none BUG=b:178398789 TEST=Accel implementation tested on Guybrush EC commands: > accelinfo > acceldata Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org> Change-Id: I9fa9d80aa25231261994adb4ef0ac5d71ac2f81a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2984740 Reviewed-by: Diana Z <dzigterman@chromium.org> Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com> Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com> Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
* system: Clean up system_get_board_version()Philip Chen2021-07-091-19/+28
| | | | | | | | | | | | | | | | | | | Refactor system_get_board_version() a bit so that we can remove CONFIG_BOARD_VERSION_CUSTOM and CONFIG_BOARD_VERSION from config.h. BRANCH=None BUG=b:186264627 TEST=make buildall -j TEST=zmake testall Cq-Depend: chromium:3015243 Change-Id: Id5ab809493c297b7d330ea13dcd6934ec00042a6 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3004112 Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* zephyr: switch to using shell_*, not printkDawid Niedzwiecki2021-07-092-10/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reimplement the printf functions for Zephyr to use shell_* functions instead of printk. The main differences are: -UART output is buffered by the shell layer. The size of the buffer should be adjusted per board (SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE) -The shell uses non-blocking UART FIFO operations while printk waits actively for every sent byte. -The shell prints can not be split by the other shell prints so it should increase the quality of the output. However the shell_* functions can not be used in interrupts, so use printk instead which can divide the shell output. The output may be messy for boards that have a lot of prints in interrupts e.g. volteer. EC uses unusual print format e.g. "%pT" to print a timestamp, so use the CrosEC's vfnprintf function and then pass the generated string to the shell_* print. Use the sprintf function for that purpose. Long term, the EC codebase should switch to a usual print format, so shell_* can be used directly and not 2 versions of vfnprintf. This change should also help to pass tests that wait for a certain pattern on output e.g. ECBootTime. BUG=b:191724484, b:178033156 BRANCH=none TEST=Verify the console output works Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ifaed2093ab8c43038c7d3e0ded1449a93f7f7da5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2988194 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* TCPMv2: Add new override function for getting default RpScott Collyer2021-07-082-8/+18
| | | | | | | | | | | | | | | | | | | | | | | | This CL addes a new overridable function typec_get_default_current_limit_rp() which is used in place of CONFIG_USB_PD_PULLUP to retrieve the correct Rp value to reflect the current limit. This functionality is required for boards which are not per port symmetric. Unless this function if overridden in a board/basebard specific file, there is no change in functionality from present design. BUG=b:191793195 BRANCH=quiche TEST=verfied on Gingerbread that Rp = 3.0A is selected for C0 and Rp = 1.5A is selected for port C1. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I9ec9daa563f6b4f551b4890ae7a56767f7c26764 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2980435 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* console: use functions to check console channelsDawid Niedzwiecki2021-07-081-9/+10
| | | | | | | | | | | | | | | | Create a function to check if a console channel is disabled. It allows checking a channel outside the console_output.c, which is needed in Zephyr. BUG=b:191724484 BRANCH=none TEST=Check if console channels works Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I9ab38c17c66373c3a38f45c8080c8166a2a9d09f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001270 Reviewed-by: Keith Short <keithshort@chromium.org>
* charge_manager: Attempt to detect extpower statusMike Lee2021-07-081-0/+7
| | | | | | | | | | | | | | | | | When we first checked the extpower, the AC OK register of the charger was not ready, and the charge_manager did not check again in a short time. so we need attempt to detect extpower status again. BUG=b:192638664 BRANCH=dedede TEST=make BOARD=sasukette pass and the delayed display phenomenon of battery led disappears. Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I6c1c3cdc33fb4fa2734cb38f66c53a3f15550037 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3011108 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* chgstv2: Clean up CONFIG_CHARGER_PROFILE_OVERRIDEDaisuke Nojiri2021-07-061-52/+54
| | | | | | | | | | | | This also cleans up CHARGE_STATE_DEBUG. BUG=None BRANCH=None TEST=buildall Change-Id: Idb18118100eece9029051625b4b32bdf09fdd553 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2929344
* chgstv2: Clean up CONFIG_BATTERY_CHECK_CHARGE_TEMP_LIMITSDaisuke Nojiri2021-07-051-5/+2
| | | | | | | | | | | | | | | This patch cleans up the code around CONFIG_BATTERY_CHECK_CHARGE_TEMP_LIMITS. There is no functional change. BUG=None BRANCH=None TEST=buildall Change-Id: Ib3757a802532ea669af27579d33c24bf9794d0b2 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2929345 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* System: Add SYSTEM_IN_MANUAL_RECOVERY flagDaisuke Nojiri2021-07-052-6/+27
| | | | | | | | | | | | | | | | | | This patch adds SYSTEM_IN_MANUAL_RECOVERY, which indicates the system is in recovery mode. It's set when EC_HOST_EVENT_KEYBOARD_RECOVERY is set and cleared when the system shuts down (not when the host event flag is cleared). BUG=b:188242794 BRANCH=None TEST=Verify sysinfo command prints 'Recovery: yes' in recovery screen. TEST=Verify sysinfo command prints 'Recovery: no' after shutting down from recovery screen. Change-Id: I357e25fa4072cb4549dbe2c6bd476b0a93ccbb38 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001190
* cbi: Add cbi_get_cache_status()Philip Chen2021-07-032-5/+9
| | | | | | | | | | | | | | | | Implement a new API cbi_get_cache_status() for us to probe CBI cache status in unit tests and anywhere else. BRANCH=None BUG=b:186264627 TEST=make buildall -j Signed-off-by: Philip Chen <philipchen@google.com> Change-Id: Ibe3af7df4f04abe2d65b31f2d604dbb6044e5863 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3002448 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* DP Altmode DFP: Add `mfallow` commandudaykiran2021-07-021-3/+64
| | | | | | | | | | | | | | | | | | | | | | | | | The USB Type-C Altmode allows for protocols other than USB to be transferred over a USB connection. Chromebooks use this functionality to transfer DisplayPort on USB signals. This is achieved through USB-PD handshake through SVDMs to discover, configure, and to enter or exit Alt modes. When DisplayPort as an Alt Mode is enabled, allowable functionalities are: -- SS and high speed USB functionality and two-lane DP. -- HS USB functionality and 4-lane DP. Chromebooks honor Multifunction bit set in the DPStatus message sent by a dock. However, for development purposes we would like to have control to honor the MF bit or ignore it, there by achieving 2-lane DP vs 4-lane DP functionality. 4-lane DP functionality is required to test higher resolution monitors such as 4k60. BUG=b:181365633 BRANCH=none TEST=make BOARD, tested on G5 dock with kindred. Signed-off-by: udaykiran <udaykiran@google.com> Change-Id: Icc25f339a78d1423b094d2acf9d586721ec2df46 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2939383 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Battery: Print display SoC in proper position for battery commandDaisuke Nojiri2021-07-021-6/+8
| | | | | | | | | | | | | | | | | | | | | | | Currently, the battery command prints the display SoC between 'Cap-full' and 'Design', breaking the semantic link between them. Cap-full: 5492 mAh Display: 100.0 % <-- wrong position Design: 5470 mAh This patch makes the command print the display SoC under 'Charge'. Charge: 89 % Display: 91.6 % BUG=None BRANCH=None TEST=Storo. Change-Id: I13010732fc243d278e227d6f80a5a4feecb320b0 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001186 Reviewed-by: Philip Chen <philipchen@chromium.org>
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