| Commit message (Collapse) | Author | Age | Files | Lines |
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Fix accel calibration bug from refactoring. The motion_get_accel_lid()
function used by calibrate routine to get lid accel data was actually
returning base accel data.
BUG=none
BRANCH=none
TEST=load onto samus, run accel calibration routine.
Change-Id: I095381390267aa6ea3b3a74311c27f30d70e9c81
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219520
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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Not every chip that we use has FPU. To make it easier to enable lightbar
on chips other than LM4, let's remove floating point usage in lightbar
code. Instead, scale those numbers by a factor of 10000.
BUG=chrome-os-partner:32203
TEST=Run on Samus. Visually check lightbar.
BRANCH=None
Change-Id: I88b12bb66b5c586f2e14135069bd97d6b56832a1
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219246
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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BRANCH=none
BUG=none
TEST=compiles
Change-Id: Ic4c0631737885ca66ac4d8b826d5447363c820bb
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218384
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Enable low power idle for samus_pd. Low power idle is only
entered when no USB PD device is connected.
BUG=chrome-os-partner:31226
BRANCH=none
TEST=load onto samus_pd, use idlestats command to verify
that we are going into deep sleep (STOP mode). Run 30 min.
and verify no watchdog reboots or anything out of ordinary.
Also, verify that host commands from EC work when going into
deep sleep by sending host commands on the EC console with
pdcmd 0 0.
Change-Id: I3e2e04e6c4c0a84e291286dbed90945847e0dfdd
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218957
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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These interfaces will be used by USART, USB and I2C
stream drivers to provide a uniform interface for
console mux'ing code.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: If8938512c29708f7b8c28f6ca1c707aa6b5c1708
Reviewed-on: https://chromium-review.googlesource.com/216001
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
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Previously there was no way to remove multiple units at a time
from the queue, and the queue was wasting an entry to disambiguate
full from empty. There was also no way to get the free entry
count from the queue, only the ability to query if it was above
a required amount. The queue was also storing its constant
compile time configuration as well as its dynamic state in the
same structure. This wasted RAM on configuration information
that doesn't change.
This refactor fixes these issues, making the queue suitable for
use in the new USART stream driver.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: I284cee52d8189928dbc4c499f87ab34e14019e5a
Reviewed-on: https://chromium-review.googlesource.com/210533
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
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On boot, the EC should send host command to exchange status with
PD MCU. This allows EC to get the correct input current limit
when EC reboots and PD does not.
Also had to move some of the charger state machine initialization
to run with HOOK_INIT so that it runs before the tasks run.
BUG=none
BRANCH=none
TEST=tested on EVT samus. Without this change, if you reboot
EC, and run charger command, the charger input current limit
is 512mA. with this change, when the EC reboots, it sends host
command to PD MCU to get current limit and sets it appropriately.
Change-Id: I5426f0fc3a62b6cd7a73f55cb11b895902a54903
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/216879
Reviewed-by: Todd Broch <tbroch@chromium.org>
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Add three retries for EC to PD host commands. With this change,
removed retry mechanism in host_command_pd.c which was a retry
only for the specific EC_CMD_PD_EXCHANGE_STATUS host command.
BUG=chrome-os-partner:32006
BRANCH=none
TEST=Loaded EC code onto samus. Added the following code
for testing failed host commands to samus_pd common/host_command.c
host_command_task():
if ((evt & TASK_EVENT_CMD_PENDING) && pending_args) {
if (i++ != 4)
pending_args->result =
host_command_process(pending_args);
else {
pending_args->result = -7;
i = 0;
}
host_send_response(pending_args);
}
This test code on samus_pd drops one in every five host commands.
With this code, from the EC, I send "pdcmd 0 0", and verified that
1 out of 5 times the EC prints a host command failed code, but then
retries successfully.
Change-Id: Ibf43feefbfc7d791c45c6689b82c66f5d71046ab
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/217461
Reviewed-by: Todd Broch <tbroch@chromium.org>
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Setting initial max speed works by setting RPM but fails when
setting with duty cycle
BUG=chrome-os-partner:31801
TEST=booted on auron and peppy and confirmed that initial fan speed is
set to maximum
BRANCH=none
Change-Id: I81172a414df13c2e0b2d0f4fe7ff1270fa5f60a3
Signed-off-by: Mohammed Habibulla <moch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/217790
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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CL provides some useful information similar to the EC console command
'pd state <port>' when host command 'usbpd <port>' is sent from host
with no additional arguments.
Also added a few build asserts for role & mux strings.
BRANCH=none
BUG=chrome-os-partner:31690
TEST=manual
ectool --interface=lpc --dev=1 usbpd 1
Port C1 is enabled. Role:SNK Polarity:CC1 State:6
# has zinger attached
ectool --interface=lpc --dev=1 usbpd 0
Port C0 is enabled. Role:SNK Polarity:CC1 State:2
Change-Id: Id44eb7bf6a6fcfa888a0008a2249601967c50bcc
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/217138
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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PD accessories that are RW update-able will broadcast their rw_hash
SHA1 digest upon connection to the PD MCU which will store it.
For update purposes, the host needs that accessories device id and
rw_hash to determine its proper firmware update payload.
This CL creates a host command that requests the type-C accessory info
attached to a particular port. It also implements an ectool command
to expose the host command.
BRANCH=none
BUG=chrome-os-partner:31361
TEST=manual,
# connect zinger to port 1 on samus
ectool --dev=1 --interface=lpc infopddev 1
Port:0 Device:1 Hash: 0x7f4d7a13 0xf07b65b9 0x41181e10 0xb99b3d5f 0x9dee1206
ectool --dev=1 --interface=lpc infopddev 0
Port:0 has no valid device
Also do the same on port 0 with similar results.
Change-Id: Id63c7edad77a43d43c14d8cd6bd96e08d0d9b501
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/216814
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Cleanup pd commands that were unnecessarily parsing port argument.
BRANCH=none
BUG=chrome-os-partner:31361
TEST=manual, following commands work as intended
pd dualrole
pd dualrole off
pd dualrole
pd dump
pd dump 1
pd dump
pd enable 1
pd rwhashtable
Change-Id: Id70af323ec2684aca04d13ba5f9417be8feb5765
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/216813
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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PD accessories that are RW update-able will broadcast their rw_hash
SHA1 digest upon connection and remain in RO briefly for a response.
In order to speed-up the response and decouple common case of
accessory is up-to-date, the PD MCU will keep a small 4 entry table of
PD accessory device ids and their corresponding RW hashes for quick
lookup.
The AP will be the source of new updates and their corresponding
device id's and RW hashes and therefore needs a method to update the
PD MCU table.
This CL creates the table, host command & ectool command to facilitate
future driver / daemon to update the RW hash entries.
BRANCH=none
BUG=chrome-os-partner:31361
TEST=manual,
# from AP
for i in `seq 1 8` ; do
ectool --dev=1 --interface=lpc rwhashpd $i $i $i $i $i $i
done
# from samus_pd console
pd rwhash
Device:5 Hash: 0x00000005 0x00000005 0x00000005 0x00000005 0x00000005
Device:6 Hash: 0x00000006 0x00000006 0x00000006 0x00000006 0x00000006
Device:7 Hash: 0x00000007 0x00000007 0x00000007 0x00000007 0x00000007
Device:8 Hash: 0x00000008 0x00000008 0x00000008 0x00000008 0x00000008
Change-Id: Ibe87b3594793cd5215eba42160489b26974aadbc
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214366
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Add checking the return value of enabling vbus in SRC_DISCONNECTED.
If failed to enable vbus, don't transition to SRC_DISCOVERY. This
can happen on zinger if zinger is in a fault condition, but once
the fault is cleared, we need to be in SRC_DISCONNECTED in order
to re-apply vbus.
BUG=none
BRANCH=none
TEST=load onto EVT zinger. without this change, if zinger is plugged
into a samus without a battery, when PD MCU is reset, zinger gets
stuck in SRC_DISCOVERY with vbus disabled because
pd_set_power_supply_ready() returns an error. This means to get
power back to samus, we need to unplug and replug raiden. This change
fixes the problem.
Change-Id: I2ac75c7095b5d819b54b2f25ec974ccfd974e1e2
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/216608
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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Ref: Common Smart Battery System Inferface Specification v8.0.
- Added 2 new AP->EC Command APIs
EC_CMD_SB_FW_UPDATE, EC_CMD_ENTERING_MODE
- Implemented common smart battery update drivers.
BUG=chrome-os-partner:24741
CQ-DEPEND=CL:210032
CQ-DEPEND=CL:210033
CQ-DEPEND=CL:215720
BRANCH=ToT,glimmer
TEST=Verified on LGC & Simplo smart battery
Change-Id: Ice6e60b1b04762217ae7613356d6925777c06abf
Signed-off-by: Sheng-Liang Song <ssl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/205323
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This makes sure that we initialize all accelerometers when we leave
G3 because some accelerometers are not powered in G3.
Also, changed some of the print statements in motion_sense.c to
help in debugging.
BUG=none
BRANCH=none
TEST=tested on samus. verified if you go back and forth between
G3 and S0 that the lid accelerometer is always initialized by
using accelread command to verify that data is being updated.
Change-Id: I73effda4e6b04a629851e6c310d53b044c4aad42
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/215943
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
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When we do sysjump, the chipset might be in any of S0/S3/S5 states, and
thus we cannot just initialize the dual role state to its default state.
Instead, let's look at the chipset state and set the appropriate dual
role state.
BUG=chrome-os-partner:31724
TEST=On Ryu, do a sysjump and check dual role state.
BRANCH=factory-ryu-6212.B
Change-Id: I67abcc7fb1357d11498973a831ab8b32dad670ce
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/215866
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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Original implemenation of polarity only addressed Rd. This CL hopes
to address the addition of the Ra pull-down for powered accessories.
Truth table based on type-C specfication document is included in
source as well.
BRANCH=none
BUG=chrome-os-partner:28585
TEST=manual,
Setup:
<insert hoho into samus type-C port>
# from PD MCU console
typec <port>
Result:
See appropriate polarity. For example,
typec 1
Port C1: CC1 445 mV CC2 115 mV (polarity:CC1)
Superspeed USB1
<flip type-C accessory (hoho)>
typec 1
Port C1: CC1 119 mV CC2 426 mV (polarity:CC2)
Superspeed USB1
Also see correct polarity when just Rd is present.
Change-Id: I09073d731e4a6050281add3673cb4ec24c053da9
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/215666
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This command was intended to be used for testing, but we have moved on
to the compiled unit tests. Let's put this command behind a config flag
to save precious flash space. This frees up about 640 bytes.
To make sure no one is using this, I searched for "hostcmd" in
platform/ec/test and third_party/autotest/files/server/site_tests.
BUG=None
TEST=make buildall
BRANCH=None
Change-Id: I3192214b71c033c2388f687ed891203d1d119bb9
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214828
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Hibernate is not supported on STM32F0. Disable system hibernate so that
the system doesn't auto-reboot after an hour in G3. This also benefits
us in terms of firmware size.
BUG=chrome-os-partner:31665
TEST=Boot on Ryu. Check 'hibdelay' and 'hibernate' commands are absent.
TEST=Boot Ryu from G3.
TEST=Change default hibernation delay to 1 second. Put system in G3.
Check it does not reboot.
BRANCH=None
Change-Id: Ia01d2d74bc5c22c01e29e5877bd4bd38ee7dddc8
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214834
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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BRANCH=manual
BUG=chrome-os-partner:28585
TEST=manual,
Plug USB 3.0 capable device in both ports and both polarites on samus
and see device enumerate as superspeed. For example,
usb 2-3: new SuperSpeed USB device number 6 using xhci_hcd
In order you must first connected device (hoho) prior to configuring
mux via 'ectool --dev=1 --interface=lpc usbpd <port> dp'
Change-Id: Ia6b8a714ce9ae1539769399e51ff245d00202171
Signed-off-by: Todd Broch <tbroch@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214579
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Ref: http://smbus.org/specs/smbus20.pdf
- Support software CRC8 generation and checking.
- Support read/write word (2-bytes)
- Support read/write blocks (up to 32 bytes)
BUG=chrome-os-partner:24741
BRANCH=ToT,glimmer
TEST=Verified with smart battery firmware update application on glimmer.
Passed LGC & Simplo Battery.
Change-Id: Ic2e7f759af80c06741ed49fee1826213429fbf8a
Signed-off-by: Sheng-Liang Song <ssl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209747
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Change the zinger software version returned by VDO_CMD_READ_INFO
to report the commit count portion of the version string to make
the software version automatically change. This software version
is important for debugging and is printed to PD console every time
a zinger is attached.
BUG=none
BRANCH=none
TEST=load onto zinger and samus, plug in zinger and see:
Dev:1 SW:2147 RW:0
compare to the version string in zinger binary and we see:
zinger_v1.1.2147-...
Change-Id: Ieafe89b4b16cee076be17bcbc6774bbd7fc24f8e
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214428
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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PD_STATUS_HOST_EVENT is a non-zero bitmask, so use '&' to check the
proper bit(s) in the condition.
BUG=chrome-os-partner:31361
TEST=Manual on Samus. Plug + unplug zinger, verify that host events are
not set. Also, verify that 'pdevent' console command still sets the host
event.
BRANCH=None.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I15c61c3c872ce8e7425678b2c669fcfa1eec89a6
Reviewed-on: https://chromium-review.googlesource.com/214631
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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As we add more PD states, it's easy to forget to update the names of PD
states. This doesn't break any PD functionality so would be hard to
discover. However, it can easily confuse us when we are debugging. Add
a compile-time assertion to make sure it's updated.
BUG=None
TEST=Remove one names and check build fails.
BRANCH=None
Change-Id: I8b503e361b3418835cdf510dd39481eb7d998035
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212885
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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If a ping is dropped, instead of cutting power immediately, we should
first try soft reset. If the soft reset packet is not received or an
ACCEPT packet is not seen in time, we'll then perform hard reset.
BUG=chrome-os-partner:31296
TEST=Add a console command to drop pings on Samus. Check that when a
ping is dropped, the power is not cut and the connection is
re-established.
BRANCH=None
Change-Id: Ifbee4124d55a9a7857a019ca823698f32911f3c7
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212925
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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After sending a soft reset, the port partner is supposed to respond with
an ACCEPT. If ACCEPT is not seen within PD_T_SENDER_RESPONSE, we should
try a hard reset.
This CL also changes the definition of SOFT_RESET state from an
artificial delay state to a state waiting for ACCEPT. With this, we are
now just waiting in DISCOVERY state after a reset and therefore we can
remove the 30ms artificial delay.
BUG=chrome-os-partner:31296
TEST=Along with the next CL to send soft reset on dropped ping, check
power doesn't drop when a ping is dropped.
TEST=Modify Samus to not send ACCEPT when a SOFT_RESET packet is
received. Check that we received HARD_RESET after SOFT_RESET.
BRANCH=None
Change-Id: Iddce33befa0c3c43228e68aac8e481d3da52db2a
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212924
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Every time a type-C source is plugged in, send a special VDM to
read device info. Device info will contain RW Hash (sha1), a
unique hardware descriptor (USB_PD_HARDWARE_DEVICE_ID), a
software version number just for debugging (USB_PD_DBG_SW_VERSION),
and a flag for if the device is in RW. This feature is off by
default and can be turned on by defining
CONFIG_USB_PD_READ_INFO_ON_CONNECT, currently defined for samus
and ryu only.
Renamed the read RW_HASH VDM to READ_INFO since it now returns
more than just the hash.
When device info is received, we store the RW hash. In the future
we will use this to check if device needs an update.
BUG=chrome-os-partner:31361
BRANCH=none
TEST=load onto a samus and a zinger. test when you attach zinger
we send a VDM, and we get device info printed to console. also
use "pd 0 hash" to query last hash received.
Change-Id: I0ca57651cf8506ea738b080a6cf8e7b020ef8724
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213832
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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Add host event for PD up to AP. The PD toggles a gpio line to
EC causing an interrupt on EC. The EC then sends host command
down to PD MCU to get its status. There is a new status bit for
PD host event, so when EC see's the PD host event status bit,
it sends a PD host event to the AP.
There is currently only one host event for PD to AP.
BUG=chrome-os-partner:31361
BRANCH=none
TEST=added PD console command pdevent, which initiates the host
event. when sent, verified on EC that it sets the correct host
event bit using hostevent console command
Change-Id: If1a59a3232e2f9a49f272c6dee5319254d87b9a9
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213371
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This adds a new host commmand for sending RW updates to PD devices.
The host command has a variety of sub-commands for performing the
update, including: erase RW, reboot, write new hash, write flash.
To program zinger RW, you should send host commands in this order:
write new hash to all 0's
reboot (zinger boots into RO since RW hash doesn't match)
erase RW
write flash
write new hash to match contents of RW
reboot
This also adds an ectool command to write a new RW. Just pass it
the RW .flat or .bin file.
BUG=chrome-os-partner:31361
BRANCH=none
TEST=ectool --dev=1 --interface=lpc flashpd 0 0 zinger.RW.flat
Change-Id: Ia81615001b83ad7ee69b1af2bf1d7059177cde04
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213239
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Changed motion_sense task to assume sensors are unpowered in G3
and re-initialize sensors every time coming out of G3.
Added EC command line test utils as well.
Fixed some bug during unit tests.
BUG=chrome-os-partner:27313,27320
BRANCH=ToT
TEST=Verified on Samus.
Tested with accel EC CLIs
accelread, accelrange, accelrate, accelres
Tested accelcalib, a ACCEL calibration util, and it succeeded.
Tested sysfs interface:
cd /sys/bus/iio/devices/iio:device1
cat in_accel_*_gyro_raw
Signed-off-by: Sheng-Liang Song <ssl@chromium.org>
Change-Id: I5752b00c03e1942c790ea4f28610fda83fa2dcbc
Reviewed-on: https://chromium-review.googlesource.com/211484
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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We want these hooks for all dual role boards. Let's move them to common
so that we don't have to duplicate them for every board.
BUG=None
TEST=On Ryu, plug in C-to-A cable. Check we are in source state.
BRANCH=None
Change-Id: I9c7a798fda2cdec94ee533d54172c6cc4fed029e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214070
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Remove the hack to set the input current limit to 2/3 of the
real limit. This was a hardware limitation of p2b systems. This
change will only work on EVT.
BUG=chrome-os-partner:28532
BRANCH=none
TEST=loaded onto a samus with all of the charging circuit reworks
and tested with an EVT zinger to make sure we don't OCP the
zinger. We limit current to 2944mA and zinger reads current draw
as 3150mA. The discrepancy is a hardware problem on zinger side
measuring current, but is still comfortably below 3.6A OCP limit.
Change-Id: Ia6adc79a0c6c7599ded76fb8f48de1479f021fe1
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213772
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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This module controls the inductive charging transmitter. For now, the
policy is to charge whenever possible.
BUG=chrome-os-partner:31392
TEST=Unit test passed
BRANCH=None
Change-Id: Ie48a38ad92fe2bc3329c4962e96572f2bc40b4e6
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212715
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- Add BOARD_VERSION_EVT for rev 3 boards
- Rename CAPSENSE_INT_L to ALS_INT_L
- Rename PP3300_ACCEL_EN to PCH_RTCRST_L
- PD_MCU_INT is inverted, remove internal pull and set INT on rising edge
- USB_MCU_RST is inverted
- USBn_ILIM_SEL are inverted
- Enable CONFIG_USB_PORT_POWER_SMART_INVERTED
BUG=chrome-os-partner:31549
BRANCH=samus
TEST=emerge-samus chromeos-ec, not used until EVT
Change-Id: I01521a55a20a230d6d4f929974112c6452c98271
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213744
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Enable check for protected mode. If we are in RO and we are write
protected, then don't allow PD communication.
BUG=chrome-os-partner:31125
BRANCH=none
TEST=Booted with and without battery, made sure PD communication
works and we can boot (note we are currently not protected).
Then commnented out CONFIG_SYSTEM_UNLOCKED, and ran flashwp enable
from PD console to protect the system. Now when boot with battery,
we don't communicate over PD and just take VBUS 5V. Removed battery
and attempted to boot with just AC, but not enough power to boot
off just 5V. EC goes to S0 and back to G3 after about 100ms.
Change-Id: Ib26f8f0f5e9134d0337ebbd7f087f50fa41842d8
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213738
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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Some platforms may have active low ILIM_SEL that is per-port
and the output needs to be inverted.
BUG=chrome-os-partner:31549
BRANCH=samus
TEST=emerge-samus chromeos-ec, not used until EVT
Change-Id: I1e164d9aa46df119467113eb175e7deec4fd8a21
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213743
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Software sync on the AP will ask the EC to reboot to RO after the AP
shuts down. This allows the AP to do a clean shutdown before the EC
reboots. The PD chip should be rebooted at the same time the EC
reboots itself, so that in a low-battery case the requested PD reboot
also takes place after AP shutdown.
BUG=chrome-os-partner:30079
BRANCH=none
TEST=From the EC console, 'reboot hard' also reboots the PD chip.
Change-Id: I109a495ca32ad1ac4aac42708935962d3226792e
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/210570
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Adds a small threshold for sending a host event to battery whenever
the full capacity changes. This helps avoid constant host events
when the battery decides the capacity is going back and forth 1mAh
BUG=none
BRANCH=none
TEST=load on samus. set LFCC_EVENT_THRESHOLD to 1 and see host
events very often. set LFCC_EVENT_THRESHOLD to 5 and see no host
events.
Change-Id: I2dc38f04e1a634539837dfed19b10ccfcfd0a8a3
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213668
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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This adds an optional lb_power() function that the lightbar TAP sequence can
use to briefly power up the lightbar rails while the AP is shut down.
BUG=chrome-os-partner:29041
BRANCH=ToT
TEST=manual
Shut the AP down, then from the EC console run "lightbar seq tap". The
lightbar should light up and briefly indicate the current power levels. You
can manully force the battery status with "lightbar demo on", then use the
arrow keys to change the state.
Note that the Samus that I tested on had trouble recognizing when it was
charging or not. That's a separate bug.
Change-Id: Iad3f08506d9e049e89d0711af00da2f1aa2337e0
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213664
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Add custom VDM to read last measured output current in mA.
BUG=chrome-os-partner:30850
BRANCH=none
TEST=Run "pd 0 vdm curr" on samus pd console and verify
reasonable current
Change-Id: Ie1f1ab235560eb4e90f399ceac31c5cd93003d80
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212981
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Turn off sending pings in SRC_READY by default. Added custom VDM
to turn pings back on, which only zinger supports right now.
Changed the "pd ping" console command to be used to enabled/disable
pings in SRC_READY.
BUG=chrome-os-partner:31409
BRANCH=none
TEST=loaded onto samus and zinger. on samus_pd, enabled highest
level of debug info: "pd 0 debug 2" to allow printing ping received.
Then plugged in zinger. By default, we negotiate to SNK_READY and
receive no pings. Then send "pd 0 vdm ping 1" to send VDM to zinger
to enable pings, and verified we start receiving pings. Sending
"pd 0 vdm ping 0" sends VDM to stop sending pings.
Change-Id: I4f64c6fc59bb734146eeca5e3ea3a24954c786b2
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212965
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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This fixes a bug in the PD transmit retry mechanism. In the retry
mechanism, we were assuming that only a pd rx interrupt will wake
up this event. But, there are other events that could potentially
wake us up, so we need to check to make sure that pd rx started
when we first wake up.
BUG=chrome-os-partner:30135
BRANCH=none
TEST=load onto samus and zinger. run "pd 0 flash rw_hash" a bunch of
times manually from the console. Observe that we nearly always fail
the first receive, but succeed on next try, which prevents us from
dropping the negotiation.
Change-Id: I5f7261176c151c3185d76aa374b9b83ac9df9a7d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213369
Reviewed-by: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
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It's useful to expose the logic of the power button assertion
according to the CONFIG active level at the hardware input.
Therefore, provide power_button_signal_asserted().
BUG=chrome-os-partner:31481
BRANCH=None
TEST=Benson tested this on ryu since has the button cables.
Change-Id: Ica48bfe981550700a067406cb72908e14dbccba9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213298
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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This CL ensures that temporary "one-shot" sequences such as KONAMI, TEST,
TAP, etc. will revert to the previous "normal" sequences even when
interrupted by other one-shot sequences.
This also adds a test for those cases.
BUG=chrome-os-partner:29873
BRANCH=ToT
TEST=manual
make runtests
Change-Id: Ie83908731acdf2f7c9108568a1ba047943175d26
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213230
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Previously our accel / gyro drivers assumed that we had exactly two of
each identical part in the system. Some systems may have different
configurations, so allow this to be specified at the board-level.
Note that our motion_sense algorithm currently assumes that we have one
accelerometer in the lid and one in the base -- we'll need to fix that
in another CL.
BUG=chrome-os-partner:27320
TEST=Compile-only. Tested in future Samus commit.
BRANCH=None.
Change-Id: I1fae1f6c578fedebe78b473a5d66a5794ccaae00
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212321
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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implement USB mass storage class using the bulk-only transport
protocol with the transparent SCSI command set.
BRANCH=none
BUG=none
TEST=verify that usb mass storage functions on windows xp, 7, 8, mac os x, goobuntu precise
Change-Id: Ideecad55bd275df7b30aa4a3ed263304a3a109cd
Signed-off-by: Dominic Chen <ddchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206303
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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The check on number of arguments is offset by 1. Fix it.
BUG=None
TEST=Run the commands with one parameter short. See error.
BRANCH=None
Change-Id: I2ac1fe022d22bbef2ee90fe54a7856766fc31dcc
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212352
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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We're printing more and more log and this sometimes causes timing issue.
Let's guard the PD log with a log level. Currently there are three
different levels:
- 0: Log state transition
- 1: Level 0, plus packet info
- 2: Level 1, plus packet dump on error
The default value is 0.
BUG=None
TEST=On Ryu, enable USB PD console channel and set different log levels.
Observe different amount of log message.
BRANCH=None
Change-Id: I49613d406bcb1ec20d3f242f724dc1c054478c7d
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212351
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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On sysjump, we are losing all of our PD states. Instead of trying to
remember all the states and deal with on-going transmission, let's just
issue a soft reset so that the communication starts over.
BUG=chrome-os-partner:31207
TEST=With Ryu/Zinger, do 'sysjump rw' and check EC doesn't reboot.
BRANCH=None
Change-Id: I8779b74491a402434931b3455fa93ff2e178cb1f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/212123
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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