| Commit message (Collapse) | Author | Age | Files | Lines |
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This is just a cleanup of the linker scripts for cortex-m chips.
This brings no functional change.
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: If9fa43157e8955fed7c7426b910c6af957794b0b
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1930392
Reviewed-by: Jett Rink <jettrink@chromium.org>
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In order to make our printf more standard, utilize %ll for long long
arguments, rather than %l. This does cost a little bit in flash space
for that extra l in a couple of places, but enables us to turn on
compile-time printf format checking.
For this commit only, the semantics are such that both %l and %ll
take 64-bit arguments. In the next commit, %l goes to its correct
behavior of taking a sizeof(long) argument.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=none
Cq-Depend:chrome-internal:1863686,chrome-internal:1860161,chrome-internal:1914029
Change-Id: I18081b55a8dbf5ef8ec15fc499ca75e59d31da58
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819652
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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we were missing the __gnu_thumb1_case_si helper function on cortex-m0.
i'm assuming this is needed for huge switch statements and we've
gotten "lucky" so far.
BUG=b:141655831
BRANCH=none
TEST=make buildall passes
Change-Id: Ie4c7d991b37ac40de89634b88b085bb84498ab1a
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1826284
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
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Provide API to disable/enable tasks.
All the tasks are marked enabled after hook_task starts.
We need a way to control the tasks when it shouldn't run in some states.
BUG=b:136240895
TEST=Disable the tasks and see it won't be scheudled when task_wake().
BRANCH=None
Change-Id: I2662f3619b22ed28387fe3c783001ba2a745620c
Signed-off-by: Yilun Lin <yllin@google.com>
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1753562
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On Kukui, we need to put console logs and reset reasons at fixed
addresses on SRAM to save the information across each EC resets.
Otherwise, EC will lose console logs and reset reasons after resetting
EC.
This CL ensures that the contents of reset and console logs will not be
clobbered or cleared by putting mandatory symbols at a fixed location on
SRAM. The values will only be reset when checksum or sanity check fails.
BUG=b:133795403
TEST=1. On Kukui, shutdown AP, reboot AP, or sysjump, and see
the previous logs before reboot will be kept
on /var/log/croc_ec.log
2. Reset reasons can be viewed with ectool uptimeinfo
BRANCH=master
Change-Id: I19db49101fda1675dc2fdc047b7f14af77cdb6e6
Signed-off-by: Shannon Chen <shannc@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1716671
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Shannon Chen <shannc@chromium.org>
Tested-by: Shannon Chen <shannc@chromium.org>
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The file is copied from riscv-rv32i/__builtin.c.
bc12_update_charge_manager() in pi3usb9201 driver uses this
function.
BUG=b:135895590
TEST=combined with CL:1673955, build and deploy on jacuzzi
BRANCH=master
Change-Id: If8b8cc8e4a3acdad7285c23e2f3627c7d05bf3b8
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715951
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Ran the following command:
git grep -l 'Copyright (c)' | \
xargs sed -i 's/Copyright (c)/Copyright/g'
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This patch adds a hook for USB PD connect event.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/127228934
BRANCH=none
TEST=buildall. Verify a hook is called on BC12 charger connection.
Change-Id: I88fcd65d1afce07b6275398c5d0b902ecd7a44a3
Reviewed-on: https://chromium-review.googlesource.com/1597794
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Mechanical replacement of bit operation where operand is a constant.
More bit operation exist, but prone to errors.
Reveal a bug in npcx:
chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow]
BUG=None
BRANCH=None
TEST=None
Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518660
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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It creates smaller code.
BUG=chromium:851727,b:65441143
BRANCH=none
TEST=builds with the new compiler
Change-Id: I569c6f75a595331fb489323d8b3f02d5dd2d5050
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1450713
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
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The name of __ro_end is confusing. The variable is
actually used as a label tagging that it is the starting
address of .data LMA. Renames to __data_lma_start to
be more decriptive.
BRANCH=None
TEST=make buildall -j
BUG=b:122084384
Change-Id: I8990a2a1f3d0719739a8e649b881cb277fe5a9b8
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1433160
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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"time in exceptions" looks unreasonable after > 4294s (when 32-bit
microsecond timer wraps around).
This is because core/cortex-m/task.c:svc_handler records time
exc_start_time just before the interrupt handler for 32-bit
timer interrupt runs, so the high word of the system clock
(clksrc_high) is not updated yet (while the low 32-bits already
wrapped around). After the handler runs, clksrc_high is updated,
so there appear to be a 4294s gap between the 2 measurements.
Fix this by recording the low 32-bit timer value only. There will
never be more than 4294s between exceptions, and this fixes the
wrap-around issue as well.
BRANCH=none
BUG=chromium:914208
TEST=Flash kukui (cortex-m0) and kukui_scp (cortex-m), let system
run for 4300+s, no more accounting error in "Time in exceptions".
Change-Id: If52855ef093ac1a1d38432555694c83742feb8f1
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1372876
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If we keep it assembly-only, the link time optimizer gets confused and
eliminates seemingly unused functions, to then replace references to
them with the "no handler" defaults in a later step.
Similar approach as with vecttable: Implement the table in C so LTO
knows the entire story.
BUG=b:65441143
BRANCH=none
TEST=usb_ep_{rx,tx,event} and usb_iface_request look more reasonable in
disassembly on whiskers.
Change-Id: I35ccfd68cda2d0022aa464ecf622f4eef71c3398
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1177710
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
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Different versions of the linker behave differently when mixing object
built with lto enabled (desirable for code size reduction) and disabled
(assembler code), especially when they refer to each other symbols:
The file evaluation order of the linker becomes important as it
eliminates dead code at various points in time, and LTO code referring
to non-LTO code or vice versa, is not visible at early runs.
Sadly, just changing the order on the command line isn't sufficient:
What works for gcc8 breaks gcc6 (and may behave different in even more
ways on gcc4 or other versions).
Therefore, implement the vector table in C, so it's compiled in LTO
mode, just like the code it refers to.
This is a port of Change-Id: I9b75f6558f0357e18000ff1161096c8f9c94a8ac
BUG=b:65441143
BRANCH=none
TEST=with this change the vector table for whiskers looks much more
reasonable (ie. not mostly empty)
Change-Id: Ifd39289ecb16b81cdf41427ce190984510d3fd3c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1120333
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1177382
Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
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In our design once enter BIST test data mode, Hw don't
interrupt Fw due to any Rx received packet. But when port
partner re-connect in this mode, it will cause that our
pd port doesn't respond packet which port partner transmits.
When port partner disconnects, so we need to reset our pd
port protocol layer and PHY to leave BIST test data mode and
let Hw can interrupt Fw. With this modify it can pass
GRL-USB-PD compliance TDA2.1.2.2 test item.
BUG=b:112602596
BRANCH=none
TEST=GRL-USB-PD compliance test.
Change-Id: I30526b5d796e3eabc9af2f524071c98bb0ef5abf
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1170718
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Some boards are pretty tight on RAM space. Print out remain RAM bytes
for each board along with the tightest 3 boards during buildall.
BRANCH=none
BUG=none
TEST=buildall now outputs the tightest boards on RAM.
Change-Id: I819e554400e88937bb937f2ca51daf737588a9a5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1194342
Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
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Add a hook to act when a detachable device is connected/disconnected
from a base.
BUG=b:73133611
BRANCH=nocturne
TEST=Test with evtest that an event is sent to the AP.
Change-Id: I21103fff88f19a197124095ee229eebb178dcf3d
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1180538
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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This reverts commit bcd6842fb861b99588039b0bb72fafd92853525e.
Reason for revert: This breaks whiskers.
Original change's description:
> **/build.mk: Set CROSS_COMPILE* to point to coreboot-sdk
>
> board/servo_v4 used it already but doesn't need the override anymore,
> nds32 also used it, therefore no change.
>
> BUG=chromium:851727,b:65441143
> BRANCH=none
> TEST=builds with the new compiler
>
> Change-Id: I59a7181b87293da2a8515b158c17417b5ba05404
> Signed-off-by: Patrick Georgi <pgeorgi@google.com>
> Reviewed-on: https://chromium-review.googlesource.com/1172974
> Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
> Tested-by: Patrick Georgi <pgeorgi@chromium.org>
> Reviewed-by: Stefan Reinauer <reinauer@google.com>
Bug: chromium:851727, b:65441143
Change-Id: If09eca04efc6461b951879ad528832bc50ca50d2
Reviewed-on: https://chromium-review.googlesource.com/1177221
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Wei-Han Chen <stimim@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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board/servo_v4 used it already but doesn't need the override anymore,
nds32 also used it, therefore no change.
BUG=chromium:851727,b:65441143
BRANCH=none
TEST=builds with the new compiler
Change-Id: I59a7181b87293da2a8515b158c17417b5ba05404
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1172974
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
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BUG=b:65441143
BRANCH=none
TEST=buildall with gcc8.1 stops failing on this family of functions
Change-Id: I44f9d643e46f955ea0cd0b5893c2806a4e3f52b0
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1126315
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
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In RSA, we often need to actually compute (a*b)+c+d: provide some
assembly optimized functions for that.
With -O3, 3072-bit exponent, lower verification time from 104 ms to
88 ms on STM32F072 @48Mhz.
BRANCH=poppy
BUG=b:35647963
BUG=b:77608104
TEST=On staff, flash, verification successful
TEST=make test-rsa, make test-rsa3
TEST=make BOARD=hammer test-utils test-rsa3, test on board
Change-Id: I80e8a7258d091e4f6adea11797729ac657dfd85d
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1071411
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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We multiply 2 32-bit numbers (and not 64-bit numbers), and then add
another 32-bit number, which makes it possible to optimize the
assembly and save a few instructions.
With -O3, 3072-bit exponent, lower verification time from 122 ms to
104 ms on STM32F072 @48Mhz.
Optimized mac function from Dmitry Grinberg <dmitrygr@google.com>.
BRANCH=poppy
BUG=b:35647963
BUG=b:77608104
TEST=On staff, flash, verification successful
TEST=make test-rsa, make test-rsa3
TEST=Flash test-utils and test-rsa to hammer => pass
Change-Id: I584c54c631a3f59f691849a279b308e8d4b4b22d
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/449024
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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gcc 8.1 complains about duplicate const, and while some of these really
are duplicate, others look like they were supposed to tighten the API
contract so that variables are "const pointer to const data", but didn't
have that effect.
BUG=b:65441143
BRANCH=none
TEST=building Chrome EC as part of upstream coreboot's build with a
gcc 8.1 compiler now works (better. there are other issues left)
Change-Id: I6016c5f282516471746f08d5714ea07ebdd10331
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1039812
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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They're only used within the same file and should always be inlined.
It also helps gcc 8.1's lto linking which seems to not inline it (since
inline is just a hint) but then drops the function (presumably because
it's small, marked inline, and comes with no prototype).
BUG=b:65441143
BRANCH=none
TEST=builds with gcc 8.1
Change-Id: I881a5b9f13192dd11748d8a3060788f95a84dec0
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1061075
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
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We add a configuration option to set the minimum shared memory
size (CONFIG_SHAREDMEM_MINIMUM_SIZE), so that the link will fail
if there is not enough IRAM left.
Also, we add 2 macros around shared_mem_acquire, that check, at
build time, that the shared memory size is sufficient for the
allocation:
- SHARED_MEM_ACQUIRE_CHECK should be used instead of
shared_mem_acquire, when size is known in advance.
- SHARED_MEM_CHECK_SIZE should be used when only a maximum size
is known.
This does not account for "jump tags" that boards often add on
jump from RO to RW. Luckily, RW usually does not do verification,
and does not need as much shared memory.
BRANCH=none
BUG=chromium:739771
TEST=make buildall -j, no error
Change-Id: Ic4c72938affe65fe8f8bc17ee5111c1798fc536f
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1002713
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Remove the former special case for USB RAM
Add additional RAM regions for STM32H7.
For USB RAM, add an explicit alignment directive to ensure we always meet
the 8-byte boundary hardware constraint for the BTABLE.
This was already true because we put the .usb_ram.btable section first.
I keep this property by alpha-sorting the sections but makes it more
explicit by adding a 2-digit numeric prefix: e.g. 00_firstsection,
99_lastsection.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=on ZerbleBarn, along with the following CLs, run the firmware with
large arrays in special AHB memory regions.
TEST=build all targets with and without the patch and verify that all
smap files are identical.
Change-Id: I9ee7f519a13cb14ba9997220f22180028f9c0175
Reviewed-on: https://chromium-review.googlesource.com/946369
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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When a chip has special/non-contiguous SRAM physical memory region,
rather than extending the generic linker file ad nauseam, define a
mechanism to declare a chip specific list of those regions.
To do so, a chip must declare the CONFIG_CHIP_MEMORY_REGIONS
configuration and have a memory_regions.inc with the list of regions.
The special-purpose preprocessed chip/<chip_name>/memory_regions.inc
file has one region declaration per line using the following macro:
REGION(name, attributes, start_address, size)
Each region will get a proper MEMORY entry and a section in the linker
file.
the __SECTION(region_name) helper is provided as a convenience to
declare variable in a specific region.
Note: those 'special' regions are NOT cleared at startup contrary to
.bss.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=on ZerbleBarn, along with the following CLs, run the firmware with
large arrays in special AHB memory regions.
Change-Id: I3f156ef6e5feb4a6a0b2ae2468bae8a20483f17c
Reviewed-on: https://chromium-review.googlesource.com/946368
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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In particular, this will allow touchpad driver and keyboard matrix
scanning to be powered off/disabled when the USB interface is
disabled without setting the remote wake feature
(USB_REQ_FEATURE_DEVICE_REMOTE_WAKEUP), as events would be
ignored anyway.
BRANCH=none
BUG=b:72683995
TEST=With next CLs, touchpad and keyboard matrix scanning are disabled
when lid is closed.
Change-Id: I3750bfaf8c31cde075adf9da4fef39753b8981c5
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/897067
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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stm32f0 has 20 bytes (not 20 words) of VBAT-backed RAM. Make more
efficient use of our limited storage to prevent trying to use storage
that doesn't exist.
BUG=b:71333840
BRANCH=None
TEST=Negotiate PD, run "reboot" on scarlet EC console, verify reset path
is taken in pd_partner_port_reset().
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ie4c303b74a1b82b84ec971cdcc19c2b21a0032e7
Reviewed-on: https://chromium-review.googlesource.com/885461
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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For debug, in common code let's log the watchdog PC
and task id as our SW panic params.
BUG=chromium:790006
BRANCH=none
TEST=manually test scarlet rev2 from a1-a3, b1-b2:
(a1) Add 'while(1);' in button ISR
(a2) Boot and press the button
(a3) When watchdog is triggeried, check with 'panicinfo'
that saved R5 is the PC for button ISR.
(b1) 'crash watchdog' in EC console
(b2) Check with 'panicinfo' that CONSOLE task id is saved in
EXCEPTION and PC is saved in R5.
Change-Id: I64d2fcf594dd24b0951e002ab8e80ebcac2d1def
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/803618
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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CTZ - Count Trailing Zero - is not implemented in hardware on cortex0 or
nds32.
Used in ST sensor drivers.
BUG=none
BRANCH=none
TEST=compile
Change-Id: I2d62fd60f05169189b24ba2a3308bec69ed9de9c
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/767609
Commit-Ready: Ely Vazquez <nadia198877@gmail.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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The way Cortex processors handle exceptions allows writing exception
routines directly in C, as return from exception is handled by providing
a special value for the link register.
However, it is not safe to do this when doing context switching. In
particular, C handlers may push some general-purpose registers that
are used by the handler and pop them later, even when context switch
has happened in the meantime. While the processor will restore {r0-r3}
from the stack when returning from an exception, the C handler code
may push, use and pop another register, such as r4.
It turns out that GCC 4.8 would generally only use r3 in svc_handler and
pendsv_handler, but newer versions tend to use r4, thus clobbering r4
that was restored from the context switch and leading up to a fault
when r4 is used by the task code.
An occurrence of this behaviour takes place with GCC > 4.8 in __wait_evt,
where "me" is stored in r4, which gets clobbered after an exception
triggers pendsv_handler. The exception handler uses r4 internally, does
a context switch and then restores the previous value of r4, which is
not restored by the processor's internal, thus clobbering r4.
This ends up with the following assertion failure:
'tskid < TASK_ID_COUNT' in timer_cancel() at common/timer.c:137
For this reason, it is safer to have assembly routines for exception
handlers that do context switching.
BUG=chromium:631514
BRANCH=None
TEST=Build and run speedy EC with a recent GCC version
Change-Id: Ib068bc12ce2204aee3e0f563efcb94f15aa87013
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://chromium-review.googlesource.com/362830
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Tasks are defined inconsistently across the code base.
Signed-off-by: Stefan Reinauer <reinauer@google.com>
BRANCH=none
TEST=make buildall -j, also verify kevin boots to OS
BUG=none
Change-Id: I19a076395a9a8ee1e457e67a89d80d2f70277c97
Reviewed-on: https://chromium-review.googlesource.com/602739
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Instead of having to pass in both the board and the arch used there
(which might be complicated in the light of different ECs with different
arches), allow passing in the board and a set of cross compilers.
The core/*/build.mk then pick the compiler that is responsible for them.
The current method works just the same: If you've already set
CROSS_COMPILE, no override happens. If you set neither CROSS_COMPILE nor
CROSS_COMPILE_$arch, the same default as before this CL is set.
BUG=none
BRANCH=none
TEST=emerge-{samus,kevin} chromeos-ec behave reasonably with adapted
ebuild
Change-Id: Icf1866f296412dd92ecfe134394224c49f7c3df5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/549344
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
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Remove code related to DH_SWAP_BY_POINTERS and
DH_REPLACE_LAST_THREE_LADDERSTEPS_WITH_DOUBLINGS, as they are
not really worth it (code size increase of 60/100 bytes respectively
for 1000/500 us time gain).
BRANCH=none
BUG=b:62813194
TEST=make BOARD=hammer PROJECT=x25519 TEST_BUILD=y
./util/flash_ec --board=hammer --image=build/hammer/x25519.bin
EC console: runtest, taskinfo
Change-Id: If21948bb2c7c20f97ba8b321dd2688cd3d0ba74a
Reviewed-on: https://chromium-review.googlesource.com/554440
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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- Move generic implementation to curve25519-generic.o
- Always use optimized version on cortex-m0.
- Rename .s files to .S, remove unnecessary lines in assembly files.
- Rename crypto_scalarmult_curve25519 to x25519_scalar_mult to match
the signature provided by the generic implementation.
- Replace some handcoded memcpy with function calls
- Remove unnecessary "volatile" specifications in the code.
BRANCH=none
BUG=b:62813194
TEST=To test old implementation only:
- Increase CONFIG_RO_SIZE to 60kb
- Increase console stack size to 2048
make BOARD=hammer PROJECT=x25519 TEST_BUILD=y
./util/flash_ec --board=hammer --image=build/hammer/x25519.bin
EC console: runtest, taskinfo
=> Used to takes ~4'17" to run (X25519 duration 256347 us).
1496/2048 stack size usage in CONSOLE task
=> Now takes ~1'25" to run (X25519 duration 84520 us)
732/2048 stack size usage in CONSOLE task
TEST=In test/x25519.c, uncomment #define TEST_X25519_1M_ITERATIONS
make BOARD=hammer PROJECT=x25519 TEST_BUILD=y
./util/flash_ec --board=hammer --image=build/hammer/x25519.bin
EC console: runtest, wait ~23 hours, test passes.
TEST=- Define CONFIG_CURVE25519_CORTEXM0 (next patch)
makes newsizes
build/hammer/RW/ec.RW.flat shrank by 1888 bytes: (52208 to 50320)
Change-Id: Icce38d3c32f431a85ac0f951cf34456b490dc665
Reviewed-on: https://chromium-review.googlesource.com/540962
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Import finely tuned curve25519 implementation from
https://munacl.cryptojedi.org/curve25519-cortexm0.shtml
(http://munacl.cryptojedi.org/data/curve25519-cortexm0-20150813.tar.bz2)
which is released in the public domain for some files, CC0 for others.
This is a plain copy (only doing a pass of dos2unix conversion
and removing trailing tabs/spaces), later patches integrate the
code with the rest of the EC code.
BRANCH=none
BUG=b:62813194
TEST=None (see next patch)
Change-Id: Ibd394d031433c31d4755a880b0e8d74b63540fbf
Reviewed-on: https://chromium-review.googlesource.com/540961
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Until HOOK_INIT has completed, do not allow any tasks other than HOOKS
or IDLE to be scheduled. Programmers often make the assumption that
a HOOK_INIT function is guaranteed to be run before task code that depends
on it, so let's make it so.
BUG=chromium:649398
BRANCH=None
TEST=Manual on kevin, compare boot without patch:
...
[0.004 power state 0 = G3, in 0x0008] <-- from chipset task
RTC: 0x00000000 (0.00 s)
[0.004 power state 4 = G3->S5, in 0x0008]
RTC: 0x00000000 (0.00 s)
[0.005 clear MKBP fifo]
[0.006 clear MKBP fifo]
[0.006 KB init state: ... <-- from keyscan task
[0.012 SW 0x05]
[0.155 hash start 0x00020000 0x00019a38]
[0.158 HOOK_INIT DONE!]
... to boot with patch:
...
RTC: 0x58cc614c (1489789260.00 s)
[0.004 clear MKBP fifo]
[0.005 clear MKBP fifo]
[0.010 SW 0x05]
[0.155 hash start 0x00020000 0x000198e0]
[0.157 HOOK_INIT DONE!]
...
Also, verify kevin boots to OS and is generally functional through
sysjump and basic tasks, and verify elm (stm32f0 / cortex-m0) boots.
Change-Id: If56fab05ce9b9650feb93c5cfc2d084aa281e622
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/456628
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Cortex-M4 supports a floating point square root function that takes 14
cycles to execute, which is a speed improvement over the existing binary
search, and saves flash space.
BUG=chromium:687624
BRANCH=None
TEST=On kevin, verify that both sqrtf methods (binary search vs HW
instruction) have identical results for fractional input (eg.
sqrt(15.999999) = 3), except when floating point representation of
square root rounds up to an integer. Verify identical results for all
integers [-100, 16793602). Note that 16793602 is the first integer for
which the floating point representation of sqrt rounds up to an integer.
Also verify basic motion sense functions on kevin.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I8521c9a28c958b340ca83c37342253e424df0c91
Reviewed-on: https://chromium-review.googlesource.com/537734
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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We're going to add more rwsig-related functions, and adding them
to rsa.h seems increasingly incorrect.
BRANCH=none
BUG=b:35587171
TEST=make buildall -j
Change-Id: I334c1774ce9a6ed8e219140f65ebe94d653e22d2
Reviewed-on: https://chromium-review.googlesource.com/468708
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Image used size is now part of the image_data struct present in all
images at a fixed offset, so use it rather than scanning from the end of
the image.
BUG=chromium:577915
TEST=Verify on kevin + lars + lars_pd that system_get_image_used() returns
the same value as the old implementation, for both RO and RW images.
BRANCH=None
Change-Id: I35f0aa87f5ab1371dbd8b132f22b9d0044358223
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/450859
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Store our image size (known at build time) in our version struct (now
renamed to image_data). This will allow us to more efficiently determine
the size of an image in a follow-up CL.
Note that compatibility is broken for old ROs that do not include this
CL.
BUG=chromium:577915
TEST=Verify on kevin + lars + lars_pd that stored image size matches
output of system_get_image_used() for both RO and RW images.
BRANCH=None
Change-Id: I7b8dc3ac8cf2df3184d0701a0e0ec8032de8d81b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/450858
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This marks decriptor length as byte accurate, by
aligning the "__usb_desc_end" label by byte rather
than short or word.
BUG=chrome-os-partner:62873
TEST=servo_v4 doesn't crash adb anymore
BRANCH=None
Change-Id: I643bae2c59e81ce0c03d9026f4a5d7933ba4c891
Reviewed-on: https://chromium-review.googlesource.com/442012
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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All boards have been transitioned to charge_state_v2.c
So charge_state_v1.c, HOOK_CHARGE_STATE_CHANGE, and
CONFIG_CHARGER_TIMEOUT_HOURS can be removed
BUG=chrome-os-partner:36272
TEST=make -j buildall
BRANCH=none
Change-Id: I3f20c5198ea75185f9894deb792575a1be31432a
Reviewed-on: https://chromium-review.googlesource.com/435467
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
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This is a dependency of the uderlyaing patch which breaks header
composition of g chip based boards.
This reverts commit 7cbb815732d7434f5985d3b50a869aa71ba5c507.
Change-Id: I4d94647cf5cb09fd338e5a581c956df6b5d83081
Reviewed-on: https://chromium-review.googlesource.com/435551
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
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This breaks header composition of g chip based boards.
This reverts commit 93951a491dd00e20addc1ff99c2896bb9752e665.
Change-Id: Ia52cf1d9c56fbb588317cec73487b2c9e89b7234
Reviewed-on: https://chromium-review.googlesource.com/435550
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
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Image used size is now part of the image_data struct present in all
images at a fixed offset, so use it rather than scanning from the end of
the image.
BUG=chromium:577915
TEST=Verify on kevin + lars + lars_pd that system_get_image_used() returns
the same value as the old implementation, for both RO and RW images.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ic8db5c706d82f7ca2ded2e90129747e7fbefdb38
Reviewed-on: https://chromium-review.googlesource.com/427959
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Store our image size (known at build time) in our version struct (now
renamed to image_data). This will allow us to more efficiently determine
the size of an image in a follow-up CL.
Note that compatibility is broken for old ROs that do not include this
CL.
BUG=chromium:577915
TEST=Verify on kevin + lars + lars_pd that stored image size matches
output of system_get_image_used() for both RO and RW images.
BRANCH=None
Change-Id: I49ea5fc27a7f11f66daba485a87d0dfe7d0c770f
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/427408
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Use binary search in host command lookup dispatcher
BUG=chromium:570895
TEST=manual testing on kevin
- Kevin boots
- ectool hello
make buildall -j
Verify *.smap hcmds section is sorted:
BOARD with host commands and private host commands
0004d0ec R __hcmds
0004d0ec R __host_cmd_0x00000x0000
0004d0f8 R __host_cmd_0x00000x0001
0004d104 R __host_cmd_0x00000x0002
0004d110 R __host_cmd_0x00000x0003
0004d11c R __host_cmd_0x00000x0004
0004d128 R __host_cmd_0x00000x0005
0004d134 R __host_cmd_0x00000x0007
0004d140 R __host_cmd_0x00000x0008
0004d14c R __host_cmd_0x00000x000a
0004d158 R __host_cmd_0x00000x000d
0004d164 R __host_cmd_0x00000x0010
0004d170 R __host_cmd_0x00000x0011
0004d17c R __host_cmd_0x00000x0012
0004d188 R __host_cmd_0x00000x0013
0004d194 R __host_cmd_0x00000x0015
0004d1a0 R __host_cmd_0x00000x0016
0004d1ac R __host_cmd_0x00000x0017
0004d1b8 R __host_cmd_0x00000x0087
0004d1c4 R __host_cmd_0x00000x008c
0004d1d0 R __host_cmd_0x00000x008f
0004d1dc R __host_cmd_0x00000x0092
0004d1e8 R __host_cmd_0x00000x0093
0004d1f4 R __host_cmd_0x00000x0097
0004d200 R __host_cmd_0x00000x0098
0004d20c R __host_cmd_0x00000x00b6
0004d218 R __host_cmd_0x00000x00d2
0004d224 R __host_cmd_0x00000x00d3
0004d230 R __host_cmd_0x3E000x0000
0004d23c R __host_cmd_0x3E000x0002
0004d248 R __evt_src_EC_MKBP_EVENT_HOST_EVENT
0004d248 R __hcmds_end
BOARD with host commands only
100bc888 R __hcmds
100bc888 R __host_cmd_0x00000x0000
100bc894 R __host_cmd_0x00000x0001
100bc8a0 R __host_cmd_0x00000x0002
100bc8ac R __host_cmd_0x00000x0003
100bc8b8 R __host_cmd_0x00000x0004
100bc8c4 R __host_cmd_0x00000x0005
100bc8d0 R __host_cmd_0x00000x0006
100bc8dc R __host_cmd_0x00000x0007
100bc8e8 R __host_cmd_0x00000x0008
100bc8f4 R __host_cmd_0x00000x0009
100bc900 R __host_cmd_0x00000x000a
100bc90c R __host_cmd_0x00000x000b
100bc918 R __host_cmd_0x00000x000d
100bc924 R __host_cmd_0x00000x0010
100bc930 R __host_cmd_0x00000x0011
100bc93c R __host_cmd_0x00000x0012
100bc948 R __host_cmd_0x00000x0013
100bc954 R __host_cmd_0x00000x0015
100bc960 R __host_cmd_0x00000x0016
100bc96c R __host_cmd_0x00000x0017
100bc978 R __host_cmd_0x00000x0025
100bc984 R __host_cmd_0x00000x0026
100bc990 R __host_cmd_0x00000x0029
100bc99c R __host_cmd_0x00000x002a
100bc9a8 R __host_cmd_0x00000x002b
100bc9b4 R __host_cmd_0x00000x002c
100bc9c0 R __host_cmd_0x00000x0044
100bc9cc R __host_cmd_0x00000x0045
100bc9d8 R __host_cmd_0x00000x0046
100bc9e4 R __host_cmd_0x00000x0047
100bc9f0 R __host_cmd_0x00000x0061
100bc9fc R __host_cmd_0x00000x0062
100bca08 R __host_cmd_0x00000x0064
100bca14 R __host_cmd_0x00000x0065
100bca20 R __host_cmd_0x00000x0067
100bca2c R __host_cmd_0x00000x0087
100bca38 R __host_cmd_0x00000x008c
100bca44 R __host_cmd_0x00000x008d
100bca50 R __host_cmd_0x00000x008f
100bca5c R __host_cmd_0x00000x0092
100bca68 R __host_cmd_0x00000x0093
100bca74 R __host_cmd_0x00000x0096
100bca80 R __host_cmd_0x00000x0097
100bca8c R __host_cmd_0x00000x0098
100bca98 R __host_cmd_0x00000x0099
100bcaa4 R __host_cmd_0x00000x009e
100bcab0 R __host_cmd_0x00000x00a0
100bcabc R __host_cmd_0x00000x00a1
100bcac8 R __host_cmd_0x00000x00a8
100bcad4 R __host_cmd_0x00000x00a9
100bcae0 R __host_cmd_0x00000x00b6
100bcaec R __host_cmd_0x00000x00b7
100bcaf8 R __host_cmd_0x00000x00d2
100bcb04 R __host_cmd_0x00000x00d3
100bcb10 R __host_cmd_0x00000x00db
100bcb1c R __host_cmd_0x00000x0101
100bcb28 R __host_cmd_0x00000x0102
100bcb34 R __host_cmd_0x00000x0103
100bcb40 R __host_cmd_0x00000x0104
100bcb4c R __host_cmd_0x00000x0110
100bcb58 R __host_cmd_0x00000x0111
100bcb64 R __host_cmd_0x00000x0112
100bcb70 R __host_cmd_0x00000x0113
100bcb7c R __host_cmd_0x00000x0114
100bcb88 R __host_cmd_0x00000x0115
100bcb94 R __host_cmd_0x00000x0116
100bcba0 R __host_cmd_0x00000x0117
100bcbac R __host_cmd_0x00000x0118
100bcbb8 R __host_cmd_0x00000x011a
100bcbc4 R __evt_src_EC_MKBP_EVENT_KEY_MATRIX
100bcbc4 R __hcmds_end
BRANCH=none
Change-Id: I5d13d2a7fe7fa9a0fbeed43177cc612f572a58bb
Reviewed-on: https://chromium-review.googlesource.com/419702
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
|