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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-0525-2187/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* core: Add forward declaration for IRQ handler routineTom Hughes2021-09-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | clang warns when attribute declarations do not precede definitions: error: attribute declaration must precede definition [-Werror,-Wignored-attributes] The cortex-m/irq_handler.h file uses the "__keep" attribute on "routine". The declaration with the attribute must come before the definition or the compiler will ignore it. This results in link errors when using LTO with lld since it is optimized out. In order to fix this, the DECLARE_IRQ instances must be moved before the function definitions. However, if DECLARE_IRQ instances are moved without this change, we will get an implicit declaration compiler error: error: implicit declaration of function 'uart_interrupt' This change does not change the resulting output as verified by the "compare_builds.sh" script. BRANCH=none BUG=b:172020503 TEST=./util/compare_builds.sh -b all -j 70 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Icb282cb0f0a0557d6bc1d184378c5923d0e3a72d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3182634 Reviewed-by: Eric Yilun Lin <yllin@google.com>
* core/cortex-m0: Fix assemblyTom Hughes2021-09-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When compiling with clang, the following error is reported: core/cortex-m0/switch.S:107:12: error: unknown token in expression ldr r0, =#0xe000ed04 @ load 0xe000ed04's address ^ This change fixes the syntax, which generates the identical output before and after the change: /opt/coreboot-sdk/bin/arm-eabi-objdump -d build/servo_micro/RW/core/cortex-m0/switch.o 0000006a <pendsv_handler>: 6a: b508 push {r3, lr} 6c: 4807 ldr r0, [pc, #28] ; (8c <pendsv_handler+0x22>) BRANCH=none BUG=b:172020503 TEST=./util/compare_build.sh -b all -j 70 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I379510f7aa00f61ae24ae8463c49d9cd3b832752 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3183391 Reviewed-by: Patryk Duda <patrykd@google.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cortex-m0/task: Check if interrupts are enabled before switching taskPatryk Duda2021-09-061-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Switching task with disabled interrupts leads to Hard Fault on Cortex-M0 because: - SVCall exception have configurable priority (full list can be found at 2.3.2 Exception types PM0215 p.23) - We are using 'cpsid i' to disable interrupts. This instruction sets PRIMASK bit (3.7.2 CPSID CPSIE PM0215 p.62) - When PRIMASK bit is set, all exceptions with configurable priority are disabled (PM0215 p.16), so SVCall is masked too If Hard Fault is inevitable, it will be a good idea to catch this earlier. It will save time spent debugging why Forced Hard Fault happens. In functions responsible for enabling, disabling or making task ready we postpone task switch when interrupts are disabled BUG=b:190597666 BRANCH=none TEST=Compile and flash EC on boards with Cortex-M0 and make sure that it works properly. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Id3be74e977ae5d5eed79aad78ee378fa413ed4ee Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953229 Commit-Queue: Marcin Wojtas <mwojtas@google.com> Tested-by: Patryk Duda <patrykd@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Provide 'is_interrupt_enabled' function for all coresPatryk Duda2021-09-061-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function that will provide information if interrupts are enabled. This information will be used to fix shortcomings in common code for UART buffering and usleep(). BUG=b:190597666 BRANCH=none TEST=make -j buildall TEST=make runhosttests TEST=Note for running tests: this patch only adds function implementation so, to test this it is necessary to add some code which uses the function eg. console command which prints information if interrupt is enabled. Minute-ia core: It is necessary to compile firmware for ISH (Intel Sensor Hub) which is available on drallion board (eg. chromeos6-row1-rack9-host19). Firmware must be placed in /lib/firmware/intel/drallion_ish.bin (partition must be writeable, if not use /usr/share/vboot/bin/make_dev_ssd.sh on DUT tu unlock it, don't forget about reboot). After copying firmware to /lib/firmware/intel/ it is necessary to reboot DUT. After reboot use `ectool --name=cros_ish version` to check if correct version is running. NDS32 core. This core is used in it8320dx chip which is present in ampton (octopus family). EC can be compiled using 'make BOARD=ampton' and flashed using 'chromeos-firmwareupdate -e ec.bin', but EC software sync needs to be disabled using 'set_gbb_flags.sh 0x200' Riscv-rv32i core, hayato (asurada family) uses it81202 as EC which is based on risc-v. EC can be compiled using 'make BOARD=hayato' and flashed using 'chromeos-firmwareupdate -e ec.bin', but EC software sync needs to be disabled using 'set_gbb_flags.sh 0x200' Cortex-M, this is the most common core. Just compile EC for platform which contains Cortex-M core (eg. bloonchipper) and test if it works. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I502553cd57e6ce897d5845a3aad01a44a9058405 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953227 Commit-Queue: Marcin Wojtas <mwojtas@google.com> Tested-by: Patryk Duda <patrykd@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* builtin: Add math.hTom Hughes2021-08-311-3/+3
| | | | | | | | | | | | | | | | | | | | Add a "math.h" to "builtin" and rename "math.h" in the "core" directories to "fpu.h". "builtin" is the directory containing headers that mirror those in the standard library and is used for device builds. The host builds exclude the "builtin" directory and use the standard library. Without this change, building host tools such as "ectool" and attempting to include "math.h" would result in incorrectly picking up the "math.h" from the device "core" directory, not the standard library version. BRANCH=none BUG=b:144959033 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Id6b2df42cb0ff5ec2cfc07aa8f29861da6804bdf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3130625 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cortex-m*: make watchdog code more readableRicardo Quesada2021-07-301-2/+10
| | | | | | | | | | | | | | | | | This CL makes the code more readable by adding comment / defines regarding the meaning of PSP[5] and PSP[6]. BUG=None TEST=make buildall BRANCH=None Change-Id: I0cbe7384e20f0287096624a00b0ec19c0fb7f9bd Signed-off-by: Ricardo Quesada <ricardoq@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3059814 Tested-by: Ricardo Quesada <ricardoq@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Ricardo Quesada <ricardoq@chromium.org> Auto-Submit: Ricardo Quesada <ricardoq@chromium.org>
* atomic.h: atomic_clear_bits: return previously stored valueTing Shen2021-07-291-2/+2
| | | | | | | | | | | | | | | make the api consistent with other atomic methods BUG=b:192422592 TEST=make BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I6cae4d521b44706cf7f44c669bf6964a08855b4c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058080 Reviewed-by: Eric Yilun Lin <yllin@google.com> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* config: rename CONFIG_FLASH to CONFIG_FLASH_CROSJeremy Bettis2021-04-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4ac1d81e1430dbfbfba1376a23ab19dfa845d7ef. The config name collides with the same config name in zephyr. Also, renames zephyr Kconfig CONFIG_PLATFORM_EC_FLASH to CONFIG_PLATFORM_EC_FLASH_CROS as the corresponding change at Kconfig side. BUG=chromium:1202406,b:180980668 TEST=make -j16 runhosttests buildall && zmake testall && \ /mnt/host/source/src/platform/ec/zephyr/firmware_builder.py --metrics \ /tmp/tmplt8ty8ci test ; echo $? BRANCH=none Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: I5b5e58b30d936b5232e049827f458d9a2ed06340 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2855320 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* Revert "config: rename CONFIG_FLASH to CONFIG_FLASH_CROS"stabilize-13935.B-mainJack Rosenthal2021-04-241-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4e074a16c5703f0cdd7b7d780a8ae1bea53a445a. Reason for revert: responsible for CQ failures (crbug.com/1202406) BUG=chromium:1202406 BRANCH=none TEST=CQ Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Original change's description: > config: rename CONFIG_FLASH to CONFIG_FLASH_CROS > > The config name collides with the same config name in zephyr. > > Also, renames zephyr Kconfig CONFIG_PLATFORM_EC_FLASH to > CONFIG_PLATFORM_EC_FLASH_CROS as the corresponding change at Kconfig > side. > > BUG=b:180980668 > TEST=make buildall > BRANCH=none > > Change-Id: Ibac008ddff8c041aae04dca0bbf973823abe7640 > Signed-off-by: Eric Yilun Lin <yllin@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2816622 > Tested-by: Eric Yilun Lin <yllin@google.com> > Reviewed-by: Keith Short <keithshort@chromium.org> > Commit-Queue: Keith Short <keithshort@chromium.org> Bug: b:180980668 Change-Id: Idc5e799d3b0ea8cc76dbbb49a91b3758ce6e9719 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847274 Auto-Submit: Jack Rosenthal <jrosenth@chromium.org> Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* config: rename CONFIG_FLASH to CONFIG_FLASH_CROSEric Yilun Lin2021-04-231-3/+3
| | | | | | | | | | | | | | | | | | | The config name collides with the same config name in zephyr. Also, renames zephyr Kconfig CONFIG_PLATFORM_EC_FLASH to CONFIG_PLATFORM_EC_FLASH_CROS as the corresponding change at Kconfig side. BUG=b:180980668 TEST=make buildall BRANCH=none Change-Id: Ibac008ddff8c041aae04dca0bbf973823abe7640 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2816622 Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Hooks: Add HOOK_CHIPSET_HARD_OFFDiana Z2021-03-181-0/+4
| | | | | | | | | | | | | | | Add a new hook called HOOK_CHIPSET_HARD_OFF which is called upon entry to the G3 power state. BRANCH=None BUG=b:166787955,b:167996216,chromium:1045209 TEST=make -j buildall, runs on waddledee with no linking errors Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If260207910d882d17aeb766c9e99a7a6099006c7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2415171 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cortex-m/m0: Add Debug Halting Control and Status RegisterTom Hughes2021-02-233-1/+3
| | | | | | | | | | | | | | | | | | | | | For Cortex-M0, see "C1.6.3 Debug Halting Control and Status Register, DHCSR" in the ARMv6-M Architecture Reference Manual. For other Cortex-M, see "C1.6.2 Debug Halting Control and Status Register, DHCSR" in the ARMv7-M Architecture Reference Manual or https://developer.arm.com/documentation/ddi0337/e/core-debug/core-debug-registers/debug-halting-control-and-status-register. BRANCH=none BUG=b:180144572 TEST=Using Segger J-Trace Pro with icetower v0.1, verify debugger_is_connected is true when debugger is attached and false otherwise Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I748fc26c0db4351be5a83086fdb843e5651b5425 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713753 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cortex-m0: convert "b" register constraints to "l"Peter Marheine2021-02-181-4/+4
| | | | | | | | | | | | | | | | | | GCC defines the "b" constraint for ARM targets as the union of the stack register and low registers (r0-r7), but that constraint is marked as internal (not intended for general use) and is not supported by Clang. Instead use "l" (the low registers only), which is intended for general use and supported by clang. BUG=b:172221010 TEST=builds BRANCH=None Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I584274b2aa1c68dfdfef80de779191d1f4d0e7b2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2695054 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-141-15/+11
| | | | | | | | | | | | | | | | | | | | There is an option in the task_set_event function which force the calling task to wait for an event. However, the option is never used thus remove it. This also will help in the Zephyr migration process. BUG=b:172360521 BRANCH=none TEST=make buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* atomic: rename atomic_read_clear to atomic_clearDawid Niedzwiecki2020-11-022-2/+2
| | | | | | | | | | | | | | | | | Rename atomic_read_clear to atomic_clear to be consistent with the rest of the atomic functions, which return the previous value of the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I2588971bd7687879a28ec637cf5f6c3d27d393f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505143 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* atomic: remove deprecated atomic functionsDawid Niedzwiecki2020-10-301-56/+0
| | | | | | | | | | | | | | Remove deprecated_atomic_* functions since only atomic_* are now used. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I6b25cc81aec126662ed779cf0f9309dcb77a754e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505142 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* tree: Use new atomic_* implementationDawid Niedzwiecki2020-10-271-11/+10
| | | | | | | | | | | | | | | | | | | | | | | It is done as a part of porting to Zephyr. Since the implementation of atomic functions is done for all architectures use atomic_* instead of deprecated_atomic_*. Sometimes there was a compilation error "discards 'volatile' qualifier" due to dropping "volatile" in the argument of the functions, thus some pointers casts need to be made. It shouldn't cause any issues, because we are sure about generated asm (store operation will be performed). BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949 Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* core/cortex-m0: add Zephyr compatible atomic functionsDawid Niedzwiecki2020-10-151-4/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add atomic functions with prototypes equal to the ones in Zephyr. It is done as a part of porting to Zephyr, the next step is to use in the code atomic_* instead of deprecated_atomic_*. Some atomic functions in Zephyr return a value e.g. atomic_add - it returns the value of the variable before the add operation. To support such functionality the new ATOMIC_OP define is introduced. The "memory" clobber is added to the asm statement to inform compiler that memory pointed by the input parameter (a) is changed. This is needed, because atomic_* functions are inline. GCC builtin functions are not used, because those functions are not available for cortex-m0. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I713daf388cb279704ae1b3767bd84b71a255f7cd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438425 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* core: rename atomic_clear to atomic_clear_bitsDawid Niedzwiecki2020-10-062-6/+6
| | | | | | | | | | | | | | | | | | Change the name of atomic_clear to atomic_clear_bits to make to name more clear - the function clears only selected bits, but the name may suggest that it clears the whole variable. It is done as a part of porting to Zephyr, where atomic_clear zeros the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943 Reviewed-by: Jett Rink <jettrink@chromium.org>
* cortex-m0/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-9/+17
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I2a5b474b03a65ce4a5c77cf5f5b671d1d72095f2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381711 Reviewed-by: Jett Rink <jettrink@chromium.org>
* tree: rename atomic_* functions to deprecated_atomic_*Jack Rosenthal2020-09-292-15/+25
| | | | | | | | | | | | | | | | We will move to an API compatible with Zephyr's API. See the bug for complete rationale and plan. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Replace __attribute__((noreturn)) with noreturnTom Hughes2020-08-171-1/+3
| | | | | | | | | | | | | | | _Noreturn was added in C11 and the convenience macro "noreturn" is specified by stdnoreturn.h: https://en.cppreference.com/w/c/language/_Noreturn. BRANCH=none BUG=none TEST=make buildall -j Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I30361bb5290cea1c776a7356f7e3a68edf1f8e39 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2324816 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* npcx: add support for rom resident sectionsKeith Short2020-08-131-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EC images are copied in full from flash to RAM. When the code RAM size is smaller than 1/2 the flash size, the EC image size is limited to the code RAM size, leaving unused flash space. Create a new linker section .init_rom used to store data objects that are single use in the previously unused flash area. Data objects can be used at runtime by copying into RAM using the flash_read() function. This change is tied to the NPCX flash layout, with asserts to ensure builds fail if the CONFIG_CHIP_INIT_ROM_REGION is not supported by the chip. CLs that enable CONFIG_CHIP_INIT_ROM_REGION should not be merged until the predecessor CL:2325764 is available in CPFE images. BUG=b:160330682 BRANCH=none TEST=make buildall TEST=With debug code, use the _init_rom macro and validate the data can be read using flash_read(). TEST=Using hex editor, verify .init_rom section located at 192K boundary and unused bytes are filled with 0xFF. TEST=compare_build.sh passes when run against waddledoo (npcx, cortex-m) Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ia0785798fd1938ad6a1c254a070b219027ee82a3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311268 Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* linker: change symbol used to track available flashKeith Short2020-08-051-10/+13
| | | | | | | | | | | | | | | | | | | | | | Change the linker symbol used to track available flash from __image_size to __flash_used. __image_size is now only used on the struct image_data header. BUG=b:160330682 BRANCH=none TEST=make buildall TEST=Run compare_build.sh against the following boards: cortex-m: volteer (npcx chipset) cortex-m0: honeybuns (stm32f0 chipset) minute-ia: not changed nds32: waddledee (it83xx) riscv-rv32i: asurada (i8xxx2) Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I94f5b4827cc0da1055520685cfeb1fafc0119e1c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334389 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* linker: Add flash sizes as linker defined labelsKeith Short2020-08-051-0/+11
| | | | | | | | | | | | | | | | | Add linker defined labels for the configured flash sizes. This is only used for image analysis. BUG=none BRANCH=none TEST=make buildall TEST=To see the labels run "nm -n build/<board>/RW/ec.RW.elf | grep __config" Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ib4db8478b19a8d93776c68fa24ee31fb21a50a24 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325765 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ec: change usage of dummySam Hurst2020-08-052-2/+2
| | | | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the term "dummy" with inclusive alternatives. BUG=b:162781382 BRANCH=None TEST=make -j buildall `grep -ir dummy *` The only results are in "private/nordic_keyboard/sdk8.0.0" which is not our code. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* hooks: Introduce chipset resume init and suspend complete hooksWai-Hong Tam2020-07-301-0/+10
| | | | | | | | | | | | | | | | | | | | | These hooks are only enabled through a new CONFIG. The resume init hook will be used to initialize the SPI driver, which goes to sleep on suspend. Require to initialize it first such that it can receive a host resume event, that notifies the normal resume hook. The suspend complete hook is paired with the resume init hook, which reverts the initialization of the SPI driver. BRANCH=None BUG=b:148149387 TEST=make buildall -j TEST=Build successfully on both default off and defining this CONFIG. Change-Id: I615e2bf92c75f83a7b0ab3eded61a1ef241dbdcf Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321875
* ec: change usage of "sane" per inclusive languagePaul Fagerburg2020-07-221-1/+1
| | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the terms "sane", "sanity check", and similar with inclusive/non-stigmatizing alternatives. BUG=b:161832469 BRANCH=None TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows results only in third-party code or documentation. Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169 Reviewed-by: Jett Rink <jettrink@chromium.org>
* hooks: Introduce HOOK_CHIPSET_SHUTDOWN_COMPLETEWai-Hong Tam2020-06-061-0/+4
| | | | | | | | | | | | | | | | | | | A new hook HOOK_CHIPSET_SHUTDOWN_COMPLETE is introduced, which are called from the chipset task, while the system has already shut down and all the suspend rails are already off. It will be used for executing pending EC reboot at the chipset shutdown. The EC reboot should be executed when the chipset is completely off. BRANCH=None BUG=b:156981868 TEST=Built all boards. Change-Id: I12f26957e46a1bb34ef079f127b0bddd133cd4e7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2228395 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cortex-m: provide a function to set IRQ priorityPeter Marheine2020-05-192-9/+16
| | | | | | | | | | | | | | | | On Puff we need to increase some IRQ priorities to meet strict timing requirements. To support that, provide a function encapsulating the bit manipulations to adjust the priority of a single IRQ and update task.c to take advantage of it. BUG=None BRANCH=None TEST=Still builds. Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I9534f5733db48b9650a55f30e5209918a5eb24b1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2192456 Reviewed-by: Andrew McRae <amcrae@chromium.org>
* core/cortex-m[0]: Move core functions assembly files to third_partyNicolas Boichat2020-03-254-500/+4
| | | | | | | | | | | | | | | | The code originally comes from libaeabi-cortexm0. It is unclear which exact git commit the code comes from, but since we have used it without issue for 5 years, it is reliable, and a refresh is probably not required at this stage. BRANCH=none BUG=chromium:884905 TEST=make buildall -j, which also include basic tests. Change-Id: I910c1c4e6a46b2f0fe8b7a429f1b6f0f50c2dc21 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1599762 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* core/cortex-m0/curve25519: Move code to third_party folderNicolas Boichat2020-03-257-3240/+1
| | | | | | | | | | | | | | Also, add LICENSE file (some files are under CC0, some are public domain), and METADATA file. BRANCH=none BUG=chromium:884905 TEST=make buildall -j, which also include basic tests. Change-Id: Ib3a7eb9245a0634c4052064c3e36cbe2ddafbcb9 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1599761 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* core/system: Extract and doc cortex constCraig Hesling2020-01-131-0/+4
| | | | | | | | | | | | | | | | | | | | | | BRANCH=none BUG=none TEST=make buildall -j TEST=make BOARD=nucleo-h743zi # Reboot H743 into bootloader using boot0 pin and reset # Flash nucleo over FTDI and STM32 bootloader stm32mon -u -U -w build/nucleo-h743zi/ec.bin -d /dev/ttyUSB0 -b 115200 # Reset without boot0 # Open console minicom -D/dev/ttyACM0 reboot soft # Verify soft reset was used reboot hard # Verify hard reboot was used Change-Id: If211198b853ad97cb96b39c063d3e04bfce68179 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1988232 Reviewed-by: Jett Rink <jettrink@chromium.org>
* cortex-m/m0: Reformat linkers script with tabsCraig Hesling2019-11-261-231/+243
| | | | | | | | | | | | | | This is just a cleanup of the linker scripts for cortex-m chips. This brings no functional change. BRANCH=none BUG=none TEST=make buildall Change-Id: If9fa43157e8955fed7c7426b910c6af957794b0b Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1930392 Reviewed-by: Jett Rink <jettrink@chromium.org>
* printf: Convert %l to %llEvan Green2019-10-051-4/+4
| | | | | | | | | | | | | | | | | | | | | In order to make our printf more standard, utilize %ll for long long arguments, rather than %l. This does cost a little bit in flash space for that extra l in a couple of places, but enables us to turn on compile-time printf format checking. For this commit only, the semantics are such that both %l and %ll take 64-bit arguments. In the next commit, %l goes to its correct behavior of taking a sizeof(long) argument. BUG=chromium:984041 TEST=make -j buildall BRANCH=none Cq-Depend:chrome-internal:1863686,chrome-internal:1860161,chrome-internal:1914029 Change-Id: I18081b55a8dbf5ef8ec15fc499ca75e59d31da58 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819652 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* cortex-m0: add __gnu_thumb1_case_si thumb1 helperCaveh Jalali2019-10-021-1/+16
| | | | | | | | | | | | | | | | | we were missing the __gnu_thumb1_case_si helper function on cortex-m0. i'm assuming this is needed for huge switch statements and we've gotten "lucky" so far. BUG=b:141655831 BRANCH=none TEST=make buildall passes Change-Id: Ie4c7d991b37ac40de89634b88b085bb84498ab1a Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1826284 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org>
* task: Add task_enable_task() and task_disable_task()Yilun Lin2019-08-221-0/+13
| | | | | | | | | | | | | | | Provide API to disable/enable tasks. All the tasks are marked enabled after hook_task starts. We need a way to control the tasks when it shouldn't run in some states. BUG=b:136240895 TEST=Disable the tasks and see it won't be scheudled when task_wake(). BRANCH=None Change-Id: I2662f3619b22ed28387fe3c783001ba2a745620c Signed-off-by: Yilun Lin <yllin@google.com> Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1753562
* log: Preserve Kukui EC reset logs across every EC reboot on SRAM.Shannon Chen2019-08-211-4/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | On Kukui, we need to put console logs and reset reasons at fixed addresses on SRAM to save the information across each EC resets. Otherwise, EC will lose console logs and reset reasons after resetting EC. This CL ensures that the contents of reset and console logs will not be clobbered or cleared by putting mandatory symbols at a fixed location on SRAM. The values will only be reset when checksum or sanity check fails. BUG=b:133795403 TEST=1. On Kukui, shutdown AP, reboot AP, or sysjump, and see the previous logs before reboot will be kept on /var/log/croc_ec.log 2. Reset reasons can be viewed with ectool uptimeinfo BRANCH=master Change-Id: I19db49101fda1675dc2fdc047b7f14af77cdb6e6 Signed-off-by: Shannon Chen <shannc@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1716671 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Shannon Chen <shannc@chromium.org> Tested-by: Shannon Chen <shannc@chromium.org>
* cortex-m0: implement __ffssi2Ting Shen2019-07-292-1/+17
| | | | | | | | | | | | | | | | | | | The file is copied from riscv-rv32i/__builtin.c. bc12_update_charge_manager() in pi3usb9201 driver uses this function. BUG=b:135895590 TEST=combined with CL:1673955, build and deploy on jacuzzi BRANCH=master Change-Id: If8b8cc8e4a3acdad7285c23e2f3627c7d05bf3b8 Signed-off-by: Ting Shen <phoenixshen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715951 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-1917-17/+17
| | | | | | | | | | | | | | | | Ran the following command: git grep -l 'Copyright (c)' | \ xargs sed -i 's/Copyright (c)/Copyright/g' BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* USB-PD: Add hook for PD connect eventDaisuke Nojiri2019-05-081-0/+4
| | | | | | | | | | | | | | | | This patch adds a hook for USB PD connect event. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/127228934 BRANCH=none TEST=buildall. Verify a hook is called on BC12 charger connection. Change-Id: I88fcd65d1afce07b6275398c5d0b902ecd7a44a3 Reviewed-on: https://chromium-review.googlesource.com/1597794 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-4/+4
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: replace 1 << digits, with BIT(digits)Gwendal Grignou2019-03-262-2/+3
| | | | | | | | | | | | | | | | Requested for linux integration, use BIT instead of 1 << First step replace bit operation with operand containing only digits. Fix an error in motion_lid try to set bit 31 of a signed integer. BUG=None BRANCH=None TEST=compile Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* core/cortex-m*: always use coreboot-sdkPatrick Georgi2019-02-191-2/+4
| | | | | | | | | | | | | | | It creates smaller code. BUG=chromium:851727,b:65441143 BRANCH=none TEST=builds with the new compiler Change-Id: I569c6f75a595331fb489323d8b3f02d5dd2d5050 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1450713 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
* link_defs.h: Renames __ro_end to __data_lma_start.Yilun Lin2019-01-282-4/+4
| | | | | | | | | | | | | | | | | | The name of __ro_end is confusing. The variable is actually used as a label tagging that it is the starting address of .data LMA. Renames to __data_lma_start to be more decriptive. BRANCH=None TEST=make buildall -j BUG=b:122084384 Change-Id: I8990a2a1f3d0719739a8e649b881cb277fe5a9b8 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1433160 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* core/cortex-m*/task: Record 32-bit exception timesNicolas Boichat2018-12-181-8/+15
| | | | | | | | | | | | | | | | | | | | | | | | | "time in exceptions" looks unreasonable after > 4294s (when 32-bit microsecond timer wraps around). This is because core/cortex-m/task.c:svc_handler records time exc_start_time just before the interrupt handler for 32-bit timer interrupt runs, so the high word of the system clock (clksrc_high) is not updated yet (while the low 32-bits already wrapped around). After the handler runs, clksrc_high is updated, so there appear to be a 4294s gap between the 2 measurements. Fix this by recording the low 32-bit timer value only. There will never be more than 4294s between exceptions, and this fixes the wrap-around issue as well. BRANCH=none BUG=chromium:914208 TEST=Flash kukui (cortex-m0) and kukui_scp (cortex-m), let system run for 4300+s, no more accounting error in "Time in exceptions". Change-Id: If52855ef093ac1a1d38432555694c83742feb8f1 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1372876
* chip/stm32: Convert usb_endpoints to C so gcc's LTO knows about itPatrick Georgi2018-10-161-0/+4
| | | | | | | | | | | | | | | | | | | | | | If we keep it assembly-only, the link time optimizer gets confused and eliminates seemingly unused functions, to then replace references to them with the "no handler" defaults in a later step. Similar approach as with vecttable: Implement the table in C so LTO knows the entire story. BUG=b:65441143 BRANCH=none TEST=usb_ep_{rx,tx,event} and usb_iface_request look more reasonable in disassembly on whiskers. Change-Id: I35ccfd68cda2d0022aa464ecf622f4eef71c3398 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1177710 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
* cortex-m0: Generate vector table in CPatrick Georgi2018-10-166-67/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Different versions of the linker behave differently when mixing object built with lto enabled (desirable for code size reduction) and disabled (assembler code), especially when they refer to each other symbols: The file evaluation order of the linker becomes important as it eliminates dead code at various points in time, and LTO code referring to non-LTO code or vice versa, is not visible at early runs. Sadly, just changing the order on the command line isn't sufficient: What works for gcc8 breaks gcc6 (and may behave different in even more ways on gcc4 or other versions). Therefore, implement the vector table in C, so it's compiled in LTO mode, just like the code it refers to. This is a port of Change-Id: I9b75f6558f0357e18000ff1161096c8f9c94a8ac BUG=b:65441143 BRANCH=none TEST=with this change the vector table for whiskers looks much more reasonable (ie. not mostly empty) Change-Id: Ifd39289ecb16b81cdf41427ce190984510d3fd3c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/1120333 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1177382 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
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