| Commit message (Collapse) | Author | Age | Files | Lines |
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Rename atomic_read_clear to atomic_clear to be consistent with the rest
of the atomic functions, which return the previous value of the
variable.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I2588971bd7687879a28ec637cf5f6c3d27d393f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505143
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Remove deprecated_atomic_* functions since only atomic_* are now used.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I6b25cc81aec126662ed779cf0f9309dcb77a754e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505142
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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It is done as a part of porting to Zephyr.
Since the implementation of atomic functions is done for all architectures
use atomic_* instead of deprecated_atomic_*.
Sometimes there was a compilation error "discards 'volatile' qualifier"
due to dropping "volatile" in the argument of the functions, thus
some pointers casts need to be made. It shouldn't cause any issues,
because we are sure about generated asm (store operation will be
performed).
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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Add atomic functions with prototypes equal to the ones in Zephyr.
It is done as a part of porting to Zephyr, the next step is to use in
the code atomic_* instead of deprecated_atomic_*.
Some atomic functions in Zephyr return a value e.g. atomic_add - it
returns the value of the variable before the add operation.
The current state of ATOMIC_OP macro is not designed to return such value
so instead of reworking it or writing new custom asm code just use
builtin functions.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: Iccd7a4d674601271f11f88834c8b2db08c537534
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428945
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Change the name of atomic_clear to atomic_clear_bits to make to name more
clear - the function clears only selected bits, but the name may suggest
that it clears the whole variable.
It is done as a part of porting to Zephyr, where atomic_clear zeros the
variable.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943
Reviewed-by: Jett Rink <jettrink@chromium.org>
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1. In npcx7, the PSL (hibernation) wakeup source only can come from
physical PSL_IN pins. In npcx9, the LCT (Long Countdown Timer)
module is introduced to support wakeup from a configurable timeout.
2. support PSL wakeup from the VCC1_RST pin. This function is disabled
by default and enabled (and locked) in the firmware in the npcx9 A1
chip. In the npcx9 A2 chip, this function is enabled (and locked)
by booter.
3. Support pulse mode and open drain (if pulse mode is enabled) for
PSL_OUT pin.
4. support one PSL general-purpose output pin which is powered by VSBY.
BRANCH=none
BUG=b:165777478
TEST=pass "make buildall"
TEST="hibernate 10", check EC wakes up from hibernate after 10 seconds.
make sure the reset cause in the console is "power-on hibernate
rtc-alarm"
TEST="hibernate"; check EC wakes up from hibernate after pressing
VCC1_RST button on the internal test board.
Test=configure the PSL_OUT to pulse mode and "hibernate"; cut off VCC1
power; check EC can wake up from hibernate with any input event.
Test=configure the level of PSL_GPO before hibernation; check the level
is kept after entering hibernation.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Signed-off-by: CHLin <CHLin56@nuvoton.com>
Change-Id: I98ad41da8557222cf3d09fef9524880731cecde1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435164
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
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This change removes usage of PANIC_DATA_PTR where possible. Now panic
data is accessed through functions that performs more checks and in case
of writing also moves other data when necessary.
BUG=b:165773837, b:162254118
BRANCH=none
TEST=make -j buildall
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Id4099d2a205f5e6118e83514dc4b88c980054ea9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381710
Reviewed-by: Jett Rink <jettrink@chromium.org>
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We will move to an API compatible with Zephyr's API. See the bug for
complete rationale and plan.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507
Tested-by: Dawid Niedźwiecki <dn@semihalf.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This fixes a regression introduced by chromiun:2325768 that broke
software sync and forced recovery mode due to an incorrect EC image
size value when CONFIG_CHIP_DATA_IN_INIT_ROM is used.
also, __image_size was set twice in the linker script with the latter
taking precedence when CONFIG_CHIP_INIT_ROM_REGION is enabled. Made
the 1st occurrence conditional to avoid confusion.
BUG=none
BRANCH=none
TEST=EC console "hash" command now reports the correct image size and
we no longer end up in recovery due to software sync.
Change-Id: Ic0fb405f6918bdfa467be5919eed91eb17ef7c2a
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428566
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Reorganize the RO and RW images so the .data section remains in flash
and is not copied into code RAM by the bootloader. This frees effective
flash space for more code in the .text and .rodata sections.
The EC initialization is changed to copy the .data section directly from
flash into data RAM so the runtime access of objects linked into .data
are unchanged.
This is controlled with a new config option
CONFIG_CHIP_DATA_IN_INIT_ROM. This option is automatically enabled when
the board enables the ROM resident section with
CONFIG_CHIP_INIT_ROM_REGION and the EC chip supports memory mapped
access to flash (CONFIG_MAPPED_STORAGE).
On Volteer this change saves 1656 bytes of RW flash space.
BUG=none
BRANCH=none
TEST=make buildall
TEST=Run "ectool motionsense lid_angle" on Volteer.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I2eff814ad240dfb46bfba400b83d78d1f69a8310
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325768
Reviewed-by: caveh jalali <caveh@chromium.org>
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CL:2334389 broke the make debug output for the kukui_scp and
flapjack_scp boards. The actual EC image was not affected.
This change also cleans up the #ifdef usage to consolidate assignment of
the output sections into one place.
BUG=b:164696005
BRANCH=none
TEST=make buildall
TEST=Run "util/compare_board.sh -b cortex-m"
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: If69cb492e2aa5f1181e27be24ee66f63cc74ff62
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359492
Reviewed-by: caveh jalali <caveh@chromium.org>
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Instead of asserting that task_start() has not been called,
just return without doing any locking.
This avoids the need to fix every caller of mutex_lock() to check
task_start_called().
BUG=b:164461158
BRANCH=none
TEST=Esc+F3+Power enters recovery, does not assert.
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ic157d7e7041185a67f257f0f5710fd02e45cd77f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2357496
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
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EC images are copied in full from flash to RAM. When the code RAM size
is smaller than 1/2 the flash size, the EC image size is limited to the
code RAM size, leaving unused flash space.
Create a new linker section .init_rom used to store data objects that
are single use in the previously unused flash area. Data objects can be
used at runtime by copying into RAM using the flash_read() function.
This change is tied to the NPCX flash layout, with asserts to ensure
builds fail if the CONFIG_CHIP_INIT_ROM_REGION is not supported by
the chip.
CLs that enable CONFIG_CHIP_INIT_ROM_REGION should not be merged until
the predecessor CL:2325764 is available in CPFE images.
BUG=b:160330682
BRANCH=none
TEST=make buildall
TEST=With debug code, use the _init_rom macro and validate the data can
be read using flash_read().
TEST=Using hex editor, verify .init_rom section located at 192K boundary
and unused bytes are filled with 0xFF.
TEST=compare_build.sh passes when run against waddledoo (npcx, cortex-m)
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ia0785798fd1938ad6a1c254a070b219027ee82a3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311268
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
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mutex_lock() must not be used in interrupt context. Add an assert
to catch this.
Also assert task_start_called() since task ID is not valid
before this.
Also remove an old assert since comparing id with TASK_ID_INVALID
doesn't make sense.
Add check for task_start_called() for NPCX flash_lock, I2C port_mutex,
pwr_5v_ctl_mtx, STM32 bkpdata_write_mutex.
This was submitted CL:2309057, reverted CL:2323704, submitted
CL:2335738, reverted CL:2341706.
BUG=b:160975910
BRANCH=none
TEST=boot AP, jump to RW
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I0aadf29d073f0d3d798432099bd024a058332412
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343450
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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This reverts commit 8d46141f4d45c65712a9ca7509b7b60128fa4d89.
Reason for revert:
getting EC boot loop on volteer:
(note that you have to flash EC-RO to get this)
20-08-07 00:22:33.520 --- UART initialized after reboot ---
20-08-07 00:22:33.531 [Image: RO, volteer_1.1.9999-4284ce1 @caveh]
20-08-07 00:22:33.531 [Reset cause: reset-pin]
20-08-07 00:22:33.531 [0.005149 KB boot key mask 0]
20-08-07 00:22:33.543 [0.005438 init buttons]
20-08-07 00:22:33.543 [0.005669 VB Main]
20-08-07 00:22:33.543 [0.005872 VB Ping Cr50]
20-08-07 00:22:33.543 [0.007148 hash start 0x00040000 0x0002f61c]
20-08-07 00:22:33.833 [0.300169 hash done e4ddc3d0ffd015db085389d94faa38d3922e42290b6887baa8de3067ce846c13]
20-08-07 00:22:33.833 [0.300289 VB Verifying hash]
20-08-07 00:22:33.833 ��������������������������������EC\0\0 �������S��O�8Ӓ.B)h����0g΄l[0.317577 VB Received 0xec00]
20-08-07 00:22:33.850 [0.317899 Jumping to image RW]
20-08-07 00:22:33.850
20-08-07 00:22:33.850 ASSERTION FAILURE '!in_interrupt_context() && task_start_called()' in mutex_lock() at core/cortex-m/task.c:868
20-08-07 00:22:33.861
20-08-07 00:22:33.861 === HANDLER EXCEPTION: 00 ====== xPSR: 0000000a ===
20-08-07 00:22:33.861 r0 :00000364 r1 :100b6815 r2 :100b72ab r3 :100956bd
20-08-07 00:22:33.873 r4 :dead6663 r5 :00000364 r6 :200c1c20 r7 :00000001
20-08-07 00:22:33.873 r8 :00001388 r9 :100b4108 r10:100b4158 r11:00000013
20-08-07 00:22:33.884 r12:10095811 sp :200c0320 lr :200c1c20 pc :200c14f8
20-08-07 00:22:33.884
20-08-07 00:22:33.884 cfsr = 0, shcsr = 70000, hfsr = 0, dfsr = 0
20-08-07 00:22:33.884
20-08-07 00:22:33.884 =========== Process Stack Contents ===========
20-08-07 00:22:33.889 00000000: 100cfc00 00002a3d 00002751 00002731
20-08-07 00:22:33.901 00000010: 00002741 00002711 000027e1 00002791
20-08-07 00:22:33.901 00000020: 000027a1 000027b1 00002771 000027c1
20-08-07 00:22:33.901 00000030: 00002721 00002781 00002761 000027d1
20-08-07 00:22:33.906
20-08-07 00:22:33.906 Rebooting...
20-08-07 00:22:33.996
20-08-07 00:22:33.996
20-08-07 00:22:33.996 --- UART initialized after reboot ---
Original change's description:
> task: Fix mutex_lock() assert (reland)
>
> mutex_lock() must not be used in interrupt context. Add an assert
> to catch this.
>
> Also assert task_start_called() since task ID is not valid
> before this.
>
> Also remove an old assert since comparing id with TASK_ID_INVALID
> doesn't make sense.
>
> This was first submitted as CL:2309057, then reverted by CL:2323704
> because it broke jump to RW (b/162302011). Fix this by adding check
> for task_start_called() to chip/npcx/flash.c and common/i2c_master.c.
>
> BUG=b:160975910
> BRANCH=none
> TEST=boot AP, jump to RW
>
> Signed-off-by: Edward Hill <ecgh@chromium.org>
> Change-Id: I070a265a95d2128643b536814e608509d81adbe3
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335738
> Reviewed-by: Raul E Rangel <rrangel@chromium.org>
> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Bug: b:160975910
Change-Id: I9e37b1eac7344cddbd756fb45b130d7e0aee661b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2341706
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
Tested-by: caveh jalali <caveh@chromium.org>
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mutex_lock() must not be used in interrupt context. Add an assert
to catch this.
Also assert task_start_called() since task ID is not valid
before this.
Also remove an old assert since comparing id with TASK_ID_INVALID
doesn't make sense.
This was first submitted as CL:2309057, then reverted by CL:2323704
because it broke jump to RW (b/162302011). Fix this by adding check
for task_start_called() to chip/npcx/flash.c and common/i2c_master.c.
BUG=b:160975910
BRANCH=none
TEST=boot AP, jump to RW
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I070a265a95d2128643b536814e608509d81adbe3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335738
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Change the linker symbol used to track available flash from __image_size
to __flash_used. __image_size is now only used on the struct image_data
header.
BUG=b:160330682
BRANCH=none
TEST=make buildall
TEST=Run compare_build.sh against the following boards:
cortex-m: volteer (npcx chipset)
cortex-m0: honeybuns (stm32f0 chipset)
minute-ia: not changed
nds32: waddledee (it83xx)
riscv-rv32i: asurada (i8xxx2)
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I94f5b4827cc0da1055520685cfeb1fafc0119e1c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334389
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Add linker defined labels for the configured flash sizes. This is only
used for image analysis.
BUG=none
BRANCH=none
TEST=make buildall
TEST=To see the labels run
"nm -n build/<board>/RW/ec.RW.elf | grep __config"
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ib4db8478b19a8d93776c68fa24ee31fb21a50a24
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325765
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Google is working to change its source code to use more inclusive
language. To that end, replace the term "dummy" with inclusive
alternatives.
BUG=b:162781382
BRANCH=None
TEST=make -j buildall
`grep -ir dummy *`
The only results are in "private/nordic_keyboard/sdk8.0.0"
which is not our code.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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These hooks are only enabled through a new CONFIG.
The resume init hook will be used to initialize the SPI driver,
which goes to sleep on suspend. Require to initialize
it first such that it can receive a host resume event, that
notifies the normal resume hook.
The suspend complete hook is paired with the resume init hook,
which reverts the initialization of the SPI driver.
BRANCH=None
BUG=b:148149387
TEST=make buildall -j
TEST=Build successfully on both default off and defining this CONFIG.
Change-Id: I615e2bf92c75f83a7b0ab3eded61a1ef241dbdcf
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321875
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This reverts commit d53b71c17f7845a591fe4099b53717ec28bf5ccf.
Reason for revert: Breaks jump to RW due to assert failing in chip/npcx/flash.c. Reverting while I come up with a better fix.
Original change's description:
> task: Fix mutex_lock() assert
>
> mutex_lock() must not be used in interrupt context. Add an assert
> to catch this.
>
> Also add a check for task_start_called() since task ID is not valid
> before this.
>
> Also remove an old assert since comparing id with TASK_ID_INVALID
> doesn't make sense.
>
> BUG=b:160975910
> BRANCH=none
> TEST=boot AP
>
> Signed-off-by: Edward Hill <ecgh@chromium.org>
> Change-Id: I1a941fa78849a4efe586e66bb4787aa5a2a67732
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2309057
> Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Bug: b:160975910 b:160208802 b:162302011
Change-Id: Idb38bfc69892fd34a18b9fdc2b46bf8e086f97dd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2323704
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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mutex_lock() must not be used in interrupt context. Add an assert
to catch this.
Also add a check for task_start_called() since task ID is not valid
before this.
Also remove an old assert since comparing id with TASK_ID_INVALID
doesn't make sense.
BUG=b:160975910
BRANCH=none
TEST=boot AP
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I1a941fa78849a4efe586e66bb4787aa5a2a67732
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2309057
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
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Google is working to change its source code to use more inclusive
language. To that end, replace the terms "sane", "sanity check", and
similar with inclusive/non-stigmatizing alternatives.
BUG=b:161832469
BRANCH=None
TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows
results only in third-party code or documentation.
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169
Reviewed-by: Jett Rink <jettrink@chromium.org>
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A new hook HOOK_CHIPSET_SHUTDOWN_COMPLETE is introduced, which are
called from the chipset task, while the system has already shut down
and all the suspend rails are already off.
It will be used for executing pending EC reboot at the chipset shutdown.
The EC reboot should be executed when the chipset is completely off.
BRANCH=None
BUG=b:156981868
TEST=Built all boards.
Change-Id: I12f26957e46a1bb34ef079f127b0bddd133cd4e7
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2228395
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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MPU logic needs to represent RW with no more than 2 MPU regions
when locking RW. Add on-device unit test for this calculation.
BRANCH=none
BUG=b:155410753
TEST=make -j BOARD=bloonchipper
TEST=make -j BOARD=nucleo-f412zg test-mpu
Then flash the test binary to nucleo board
runtest on device ==> Pass
Change-Id: Idc746efa9419d31cdae9c6fccc499c92160ac593
Signed-off-by: Yicheng Li <yichengli@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2218595
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On chips with only 8 MPUs, we need to lock the rollback with unused
MPU regions. Since REGION_STORAGE2 may be used to lock RW, use
REGION_CODE_RAM instead.
BRANCH=none
BUG=b:155410753
TEST=make -j buildall
Change-Id: Iec0f33b668474ed539809a319bf94d11cb52f64a
Signed-off-by: Yicheng Li <yichengli@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2219578
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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On Cortex-M3, Cortex-M4, and Cortex-M7, the base address used for
an MPU region must be aligned to the size of the region:
https://developer.arm.com/docs/dui0553/a/cortex-m4-peripherals/optional-memory-protection-unit/mpu-region-base-address-register
https://developer.arm.com/docs/dui0552/a/cortex-m3-peripherals/optional-memory-protection-unit/mpu-region-base-address-register
https://developer.arm.com/docs/dui0646/a/cortex-m7-peripherals/optional-memory-protection-unit/mpu-region-base-address-register#BABDAHJG
Try to represent RW flash using aligned MPU regions before configuring
MPU. Otherwise configuring MPU will fail.
BRANCH=none
BUG=b:155410753
TEST=triggered mpu_lock_rw_flash() on bloonchipper and dartmonkey
and checked that configuring MPU succeeded.
TEST=on bloonchipper and dartmonkey, verified that the MPU
configurations make sense by adding logging.
Change-Id: Ib460354ea60e96d7b6ac4a4c12730b0db7c6aaac
Signed-off-by: Yicheng Li <yichengli@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213132
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Disable all a MPU regions using the smallest supported size.
BUG=chromium:1085868
TEST=Boot successfully on Puff
TEST=Boot successfully on Volteer
BRANCH=none
Change-Id: Ie6924c3d9691ba6f4b218c9897b4e42b35b12bb7
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2212010
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Tested-by: Keith Short <keithshort@chromium.org>
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BRANCH=none
BUG=b:151105339, b:155229277
TEST=make BOARD=bloonchipper test-mpu -j && \
./util/flash_jlink.py --board bloonchipper \
--image ./build/bloonchipper/mpu/mpu.bin
=> On console: "runtest"
=> All tests pass, except last which correctly panics:
Data access violation, mfar = 20000000
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I1c759f50da5075b1e9027cdba253d8c06843be5a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202852
Commit-Queue: Yicheng Li <yichengli@chromium.org>
Tested-by: Yicheng Li <yichengli@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Expose definitions that we want to use in unit tests, but are internal
details that should not be used by other EC code using the rollback
functionality.
BRANCH=none
BUG=b:155229277, b:156501835
TEST=make buildall -j
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Iab14a0cf17d4a986f1a1d9b77d27957976962078
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202851
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Yicheng Li <yichengli@chromium.org>
Tested-by: Yicheng Li <yichengli@chromium.org>
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BRANCH=none
BUG=b:155229277, b:156501835
TEST=Compile and flash "rollback" test on dragonclaw with region 0
On console: "runtest"
=> Reboots with "Data access violation, mfar = 8020000"
=> PASS
TEST=Compile and flash "rollback" test on dragonclaw with region 1
On console: "runtest"
=> Reboots with "Data access violation, mfar = 8040000"
=> PASS
TEST=Compile and flash "rollback" test on dragontalon with region 0
On console: "runtest"
=> Reboots with "Data access violation, mfar = 80c0000"
=> PASS
TEST=Compile and flash "rollback" test on dragontalon with region 1
On console: "runtest"
=> Reboots with "Data access violation, mfar = 80e0000"
=> PASS
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Ibba15e5319832ba0e0efde913275d618e249bc44
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202850
Commit-Queue: Yicheng Li <yichengli@chromium.org>
Tested-by: Yicheng Li <yichengli@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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The MPU was only being enabled when CONFIG_ARMV7_CACHE and
CONFIG_CHIP_UNCACHED_REGION were enabled; these are enabled for the
STM32H743 (dartmonkey), but not the STM32F412 (bloonchipper).
BRANCH=none
BUG=b:155229277, b:156501835
TEST=Compile and flash "rollback" test on dragonclaw with region 0
On console: "runtest"
=> Reboots with "Data access violation, mfar = 8020000"
=> PASS
TEST=Compile and flash "rollback" test on dragonclaw with region 1
On console: "runtest"
=> Reboots with "Data access violation, mfar = 8040000"
=> PASS
TEST=Compile and flash "rollback" test on dragontalon with region 0
On console: "runtest"
=> Reboots with "Data access violation, mfar = 80c0000"
=> PASS
TEST=Compile and flash "rollback" test on dragontalon with region 1
On console: "runtest"
=> Reboots with "Data access violation, mfar = 80e0000"
=> PASS
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I7bca3864205bd1dd6797732aa903bc3bc325ac6f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200201
Commit-Queue: Yicheng Li <yichengli@chromium.org>
Tested-by: Yicheng Li <yichengli@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Rollback MPU support was initially added for the Cortex-M7, which can
support 16 MPU regions. REGION_ROLLBACK was defined as MPU region 10.
For the Cortex-M4, there are at most 8 regions, so we have to repurpose
some of the existing (unused) regions.
BRANCH=none
BUG=b:155229277, b:156501835
TEST=Compile and flash "rollback" test on dragonclaw with region 0
On console: "runtest"
=> Reboots with "Data access violation, mfar = 8020000"
=> PASS
TEST=Compile and flash "rollback" test on dragonclaw with region 1
On console: "runtest"
=> Reboots with "Data access violation, mfar = 8040000"
=> PASS
TEST=Compile and flash "rollback" test on dragontalon with region 0
On console: "runtest"
=> Reboots with "Data access violation, mfar = 80c0000"
=> PASS
TEST=Compile and flash "rollback" test on dragontalon with region 1
On console: "runtest"
=> Reboots with "Data access violation, mfar = 80e0000"
=> PASS
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I748b7ea0654dee01d27bb560e82491665025d1ef
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200200
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Yicheng Li <yichengli@chromium.org>
Tested-by: Yicheng Li <yichengli@chromium.org>
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Add error checking for failures and use IS_ENABLED combined with helper
functions for readability.
BRANCH=none
BUG=b:155229277, b:156501835
TEST=Compile and flash "rollback" test on dragonclaw with region 0
On console: "runtest"
=> Reboots with "Data access violation, mfar = 8020000"
=> PASS
TEST=Compile and flash "rollback" test on dragonclaw with region 1
On console: "runtest"
=> Memory is successfully read
=> FAIL
TEST=Compile and flash "rollback" test on dragontalon with region 0
On console: "runtest"
=> Reboots with "Data access violation, mfar = 80c0000"
=> PASS
TEST=Compile and flash "rollback" on dragontalon with region 1
On console: "runtest"
=> Reboots with "Data access violation, mfar = 80e0000"
=> PASS
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I0f8d149c8c5c568241457a6779079c65eb38ce32
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200199
Commit-Queue: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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On Puff we need to increase some IRQ priorities to meet strict timing
requirements. To support that, provide a function encapsulating the bit
manipulations to adjust the priority of a single IRQ and update task.c
to take advantage of it.
BUG=None
BRANCH=None
TEST=Still builds.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I9534f5733db48b9650a55f30e5209918a5eb24b1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2192456
Reviewed-by: Andrew McRae <amcrae@chromium.org>
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The code originally comes from libaeabi-cortexm0. It is unclear
which exact git commit the code comes from, but since we have used
it without issue for 5 years, it is reliable, and a refresh is
probably not required at this stage.
BRANCH=none
BUG=chromium:884905
TEST=make buildall -j, which also include basic tests.
Change-Id: I910c1c4e6a46b2f0fe8b7a429f1b6f0f50c2dc21
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1599762
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Taken as as 32-bit register, ARM call the register at 0xe000ed28 CFSR;
the Configurable Fault Status Register. MMFS is the low byte of this
value, so it's misleading to refer to the whole 32-bit value as MMFS;
instead call it CFSR to make it clear that the value we store
encompasses the MMFSR, BFSR and UFSR.
BUG=None
BRANCH=None
TEST=make buildall
Change-Id: Ifd62e0a6f27a2e6ddfa509b84c389d960347ff85
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2104807
Reviewed-by: Keith Short <keithshort@chromium.org>
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BUG=b:149350081
BRANCH=none
TEST=build all, and emerged ec related packages for host and octopus.
$ make buildall -j
$ cros_workon --host list
chromeos-base/chromeos-cr50-dev
chromeos-base/chromeos-ec
chromeos-base/chromeos-ec-headers
chromeos-base/ec-devutils
chromeos-base/ec-utils
chromeos-base/ec-utils-test
dev-util/hdctools
$ sudo emerge chromeos-cr50-dev -j
$ sudo emerge chromeos-ec -j
$ sudo emerge chromeos-ec-headers -j
$ sudo emerge ec-devutils -j
$ sudo emerge ec-utils -j
$ sudo emerge ec-utils-test -j
$ sudo emerge hdctools -j
$ cros_workon-octopus list
chromeos-base/chromeos-ec
chromeos-base/chromeos-ec-headers
chromeos-base/ec-devutils
chromeos-base/ec-utils
chromeos-base/ec-utils-test
dev-util/hdctools
$ sudo emerge-octopus chromeos-ec -j
$ sudo emerge-octopus chromeos-ec-headers -j
$ sudo emerge-octopus ec-devutils -j
$ sudo emerge-octopus ec-utils -j
$ sudo emerge-octopus ec-utils-test -j
$ sudo emerge-octopus hdctools -j
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Change-Id: If751b26b0635b0021c077338e96eaa8e8dcf17a5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2080631
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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BRANCH=none
BUG=none
TEST=make buildall -j
TEST=make BOARD=nucleo-h743zi
# Reboot H743 into bootloader using boot0 pin and reset
# Flash nucleo over FTDI and STM32 bootloader
stm32mon -u -U -w build/nucleo-h743zi/ec.bin -d /dev/ttyUSB0 -b 115200
# Reset without boot0
# Open console
minicom -D/dev/ttyACM0
reboot soft
# Verify soft reset was used
reboot hard
# Verify hard reboot was used
Change-Id: If211198b853ad97cb96b39c063d3e04bfce68179
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1988232
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This is just a cleanup of the linker scripts for cortex-m chips.
This brings no functional change.
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: If9fa43157e8955fed7c7426b910c6af957794b0b
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1930392
Reviewed-by: Jett Rink <jettrink@chromium.org>
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In order to make our printf more standard, utilize %ll for long long
arguments, rather than %l. This does cost a little bit in flash space
for that extra l in a couple of places, but enables us to turn on
compile-time printf format checking.
For this commit only, the semantics are such that both %l and %ll
take 64-bit arguments. In the next commit, %l goes to its correct
behavior of taking a sizeof(long) argument.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=none
Cq-Depend:chrome-internal:1863686,chrome-internal:1860161,chrome-internal:1914029
Change-Id: I18081b55a8dbf5ef8ec15fc499ca75e59d31da58
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819652
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Enable CONFIG_PRESERVE_LOGS to gather more information
when SCP is crashed.
TEST=1. crash scp
2. restart scp
3. restart timberslide to ensure the logs are fetched
4. see that untransmitted logs are fetched into /var/log/cros_scp.log
BUG=b:140220117
BRANCH=none
Change-Id: I12635afa6c92fd8fa9cc889ce75999f855f18db0
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1833943
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Provide API to disable/enable tasks.
All the tasks are marked enabled after hook_task starts.
We need a way to control the tasks when it shouldn't run in some states.
BUG=b:136240895
TEST=Disable the tasks and see it won't be scheudled when task_wake().
BRANCH=None
Change-Id: I2662f3619b22ed28387fe3c783001ba2a745620c
Signed-off-by: Yilun Lin <yllin@google.com>
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1753562
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I had a hard time reading this section, so figured I may as well
rewrite it to use IS_ENABLED while I was here.
Gave CONFIG_{RO,RW}_HEAD_ROOM a default value of zero here, which
makes the math work out for boards without it anyway.
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I87dc2d73838c350088916b57aa51d5f368c5592f
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1727570
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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This option was only used with kunimitsu, which was removed from the
EC codebase a long time ago. The EC code won't even compile with this
option enabled anymore.
Remove it!
BUG=chromium:989301
BRANCH=none
TEST=buildall
Change-Id: I8ede226ec1e7b300ded6bb1769d82e142db1b0aa
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1727569
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Ran the following command:
git grep -l 'Copyright (c)' | \
xargs sed -i 's/Copyright (c)/Copyright/g'
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I6cc4a0f7e8b30d5b5f97d53c031c299f3e164ca7
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663262
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This CL fixes DRAM section loaded at the wrong location, and
also relayouts the DRAM section to have a smaller flat binary.
Current DRAM region layout is as below:
.dram.data LMA | LOAD
.dram.data VMA |
.dram.bss | NOLOAD
.dram.rodata | LOAD
.dram.text | LOAD
This will create a flat binary file as following layout:
.dram.data
.dram.bss
.dram.rodata
.dram.text
and loader will load .flat.dram to .dram.data LMA's starting section.
This leads to .dram.bss, .dram.rodata and .dram.text been loaded at
the wrong location, where .dram.data VMA resides.
This CL fixes the issue by reorganize the sections into:
.dram.text | LOAD
.dram.rodata | LOAD
.dram.data LMA | LOAD
.dram.data VMA |
.dram.bss | NOLOAD
and thus we have a flat binary as:
.dram.text
.dram.rodata
.dram.data
so that:
1. everything will be placed at the correct address.
2. have a smaller flat binary.
The CL also removes .dram.keep.* section, which is not used so far.
BUG=b:134079593
BRANCH=master
TEST=With crrev.com/c/1646691, check the output of object header:
1. SIZEOF(.dram.text + .dram.rodata + .dram.data) = SIZEOF(.image.RW.dram)
0x68 0x18 0x14 0x94
2. ADDR(.dram.data LMA) + SIZEOF(.dram.data) = ADDR(.dram.data VMA)
0x10000080 0x14 0x10000094
arm-none-eabi-objdump -h build/kukui_scp/RW/ec.RW.elf
Idx Name Size VMA LMA File off Algn
5 .dram.text 00000068 10000000 10000000 00030000 2**3
CONTENTS, ALLOC, LOAD, READONLY, CODE
6 .dram.rodata 00000018 10000068 10000068 00030068 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .dram.data 00000014 10000094 10000080 00030094 2**0
CONTENTS, ALLOC, LOAD, DATA
8 .dram.bss 00000004 100000a8 100000a8 000300a8 2**0
ALLOC
arm-none-eabi-objdump -h build/kukui_scp/ec.obj
Idx Name Size VMA LMA File off Algn
2 .image.RW.dram 00000094 50000000 50000000 00020000 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
TEST=With crrev.com/c/1646691, see the console has correct output:
dram_bss_val = 0
dram_data_val[0]= 1
dram_data_val[1]= 2
dram_data_val[2]= 3
dram_data_val[3]= 4
dram_data_val[4]= 5
dram_data_val[5]= 6
dram_data_val[6]= 7
dram_data_val[7]= 8
dram_data_val[8]= 9
dram_data_val[9]= 10
dram_data_val[10]= 11
dram_data_val[11]= 12
dram_data_val[12]= 13
dram_data_val[13]= 14
dram_data_val[14]= 15
dram_data_val[15]= 16
dram_data_val[16]= 17
dram_rodata_val[0]= 55
dram_rodata_val[1]= 56
dram_rodata_val[2]= 57
dram_rodata_val[3]= 58
dram_rodata_val[4]= 59
dram_rodata_val[5]= 60
Change-Id: Ic6836c6ad553d0ceae4d55df92caa1896fee905d
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1646690
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Yilun Lin <yllin@chromium.org>
Auto-Submit: Yilun Lin <yllin@chromium.org>
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get_interrupt_context is only called from code inside #ifdef
CONFIG_TASK_PROFILING.
clang emits an unused function warning for this:
core/cortex-m/task.c:238:19: error: unused function
'get_interrupt_context' [-Werror,-Wunused-function]
static inline int get_interrupt_context(void)
BRANCH=none
BUG=chromium:931797
TEST=make buildall -j
Change-Id: I5ba68d1a58a966eeecb5abdb3cb87fa2684f359b
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660017
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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.dram.bss section is like .bss section that all the contents should
be initialized to zero.
TEST=build a image with .dram.bss section, and verify it only has
ALLOC attribute.
$ arm-none-eabi-objdump -h build/kukui_scp/RW/ec.RW.elf
7 .dram.bss 00000acb 3009aaa8 3009aaa8 0010aaa8 2**2
ALLOC
BUG=b:134079593, b:122058243
BRANCH=master
Change-Id: I853b2977465b83458f566c5dd953458147d4e10e
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1646689
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
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This patch adds a hook for USB PD connect event.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/127228934
BRANCH=none
TEST=buildall. Verify a hook is called on BC12 charger connection.
Change-Id: I88fcd65d1afce07b6275398c5d0b902ecd7a44a3
Reviewed-on: https://chromium-review.googlesource.com/1597794
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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