| Commit message (Collapse) | Author | Age | Files | Lines |
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Normally we don't do this, but enough changes have accumulated that
we're doing a tree-wide one-off update of the name & style.
BRANCH=none
BUG=chromium:1098010
TEST=`repo upload` works
Change-Id: I5b357b85ae9473a192b80983871bef4ae0d4b16f
Signed-off-by: Mike Frysinger <vapier@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3893394
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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.func and .endfunc were used to emit STABS debug information (not
DWARF). These only have an effect with -gstabs, which we're not using. I
suspect their inclusion was not intentional.
STABS is not supported when building with clang, so it generates the
following errors:
core/minute-ia/switch.S:27:1: error: unknown directive
.func __task_start
^
core/minute-ia/switch.S:42:1: error: unknown directive
.endfunc
See https://bugs.llvm.org/show_bug.cgi?id=20424 and
https://sourceware.org/gdb/current/onlinedocs/stabs.html.
As indicated by the TEST line, the output is indentical before and after
this change.
BRANCH=none
BUG=b:172020503
TEST=make CC=clang V=1 BOARD=arcada_ish
TEST=./util/compare_build.sh -b all -j 70
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I1e1e5f57fb382797e01dcf797d72de0468150054
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3193271
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add a function that will provide information if interrupts are enabled.
This information will be used to fix shortcomings in common code for
UART buffering and usleep().
BUG=b:190597666
BRANCH=none
TEST=make -j buildall
TEST=make runhosttests
TEST=Note for running tests: this patch only adds function
implementation so, to test this it is necessary to add some code
which uses the function eg. console command which prints
information if interrupt is enabled.
Minute-ia core: It is necessary to compile firmware for
ISH (Intel Sensor Hub) which is available on drallion board
(eg. chromeos6-row1-rack9-host19). Firmware must be placed in
/lib/firmware/intel/drallion_ish.bin (partition must be writeable,
if not use /usr/share/vboot/bin/make_dev_ssd.sh on DUT tu unlock
it, don't forget about reboot). After copying firmware to
/lib/firmware/intel/ it is necessary to reboot DUT. After reboot
use `ectool --name=cros_ish version` to check if correct version
is running.
NDS32 core. This core is used in it8320dx chip which is present in
ampton (octopus family). EC can be compiled using
'make BOARD=ampton' and flashed using
'chromeos-firmwareupdate -e ec.bin', but EC software sync needs to
be disabled using 'set_gbb_flags.sh 0x200'
Riscv-rv32i core, hayato (asurada family) uses it81202 as EC which
is based on risc-v. EC can be compiled using 'make BOARD=hayato'
and flashed using 'chromeos-firmwareupdate -e ec.bin', but EC
software sync needs to be disabled using 'set_gbb_flags.sh 0x200'
Cortex-M, this is the most common core. Just compile EC for
platform which contains Cortex-M core (eg. bloonchipper) and test
if it works.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I502553cd57e6ce897d5845a3aad01a44a9058405
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953227
Commit-Queue: Marcin Wojtas <mwojtas@google.com>
Tested-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add a "math.h" to "builtin" and rename "math.h" in the "core"
directories to "fpu.h". "builtin" is the directory containing headers
that mirror those in the standard library and is used for device builds.
The host builds exclude the "builtin" directory and use the standard
library. Without this change, building host tools such as "ectool" and
attempting to include "math.h" would result in incorrectly picking up
the "math.h" from the device "core" directory, not the standard library
version.
BRANCH=none
BUG=b:144959033
TEST=make buildall
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Id6b2df42cb0ff5ec2cfc07aa8f29861da6804bdf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3130625
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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make the api consistent with other atomic methods
BUG=b:192422592
TEST=make
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I6cae4d521b44706cf7f44c669bf6964a08855b4c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058080
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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Add a new hook called HOOK_CHIPSET_HARD_OFF which is called upon entry
to the G3 power state.
BRANCH=None
BUG=b:166787955,b:167996216,chromium:1045209
TEST=make -j buildall, runs on waddledee with no linking errors
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If260207910d882d17aeb766c9e99a7a6099006c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2415171
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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There is an option in the task_set_event function which force
the calling task to wait for an event. However, the option is never
used thus remove it.
This also will help in the Zephyr migration process.
BUG=b:172360521
BRANCH=none
TEST=make buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: Ic152fd3d6862d487bcc0024c48d136556c0b81bc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2521599
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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Rename atomic_read_clear to atomic_clear to be consistent with the rest
of the atomic functions, which return the previous value of the
variable.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I2588971bd7687879a28ec637cf5f6c3d27d393f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505143
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Remove deprecated_atomic_* functions since only atomic_* are now used.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I6b25cc81aec126662ed779cf0f9309dcb77a754e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505142
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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It is done as a part of porting to Zephyr.
Since the implementation of atomic functions is done for all architectures
use atomic_* instead of deprecated_atomic_*.
Sometimes there was a compilation error "discards 'volatile' qualifier"
due to dropping "volatile" in the argument of the functions, thus
some pointers casts need to be made. It shouldn't cause any issues,
because we are sure about generated asm (store operation will be
performed).
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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Add atomic functions with prototypes equal to the ones in Zephyr.
It is done as a part of porting to Zephyr, the next step is to use in
the code atomic_* instead of deprecated_atomic_*.
Some atomic functions in Zephyr return a value e.g. atomic_add - it
returns the value of the variable before the add operation.
The current state of ATOMIC_OP macro is not designed to return such value
so instead of reworking it or writing new custom asm code just use
builtin functions.
The __atomic_* builtins support variables with different sizes so use
them in *_u8 functions as well.
For "and" operation, it compiles to "andb" for u8 and to "andl" for u32.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I498ca3dbb14aea6afc2f7a525c530eede7f31fe2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2448497
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Change the name of atomic_clear to atomic_clear_bits to make to name more
clear - the function clears only selected bits, but the name may suggest
that it clears the whole variable.
It is done as a part of porting to Zephyr, where atomic_clear zeros the
variable.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change removes usage of PANIC_DATA_PTR where possible. Now panic
data is accessed through functions that performs more checks and in case
of writing also moves other data when necessary.
BUG=b:165773837, b:162254118
BRANCH=none
TEST=make -j buildall
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I7f32eec1f03cccf8ddd3af29ac2821459a99629b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381714
Reviewed-by: Jett Rink <jettrink@chromium.org>
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We will move to an API compatible with Zephyr's API. See the bug for
complete rationale and plan.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507
Tested-by: Dawid Niedźwiecki <dn@semihalf.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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_Noreturn was added in C11 and the convenience macro "noreturn" is
specified by stdnoreturn.h:
https://en.cppreference.com/w/c/language/_Noreturn.
BRANCH=none
BUG=none
TEST=make buildall -j
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I30361bb5290cea1c776a7356f7e3a68edf1f8e39
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2324816
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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EC images are copied in full from flash to RAM. When the code RAM size
is smaller than 1/2 the flash size, the EC image size is limited to the
code RAM size, leaving unused flash space.
Create a new linker section .init_rom used to store data objects that
are single use in the previously unused flash area. Data objects can be
used at runtime by copying into RAM using the flash_read() function.
This change is tied to the NPCX flash layout, with asserts to ensure
builds fail if the CONFIG_CHIP_INIT_ROM_REGION is not supported by
the chip.
CLs that enable CONFIG_CHIP_INIT_ROM_REGION should not be merged until
the predecessor CL:2325764 is available in CPFE images.
BUG=b:160330682
BRANCH=none
TEST=make buildall
TEST=With debug code, use the _init_rom macro and validate the data can
be read using flash_read().
TEST=Using hex editor, verify .init_rom section located at 192K boundary
and unused bytes are filled with 0xFF.
TEST=compare_build.sh passes when run against waddledoo (npcx, cortex-m)
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ia0785798fd1938ad6a1c254a070b219027ee82a3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311268
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
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These hooks are only enabled through a new CONFIG.
The resume init hook will be used to initialize the SPI driver,
which goes to sleep on suspend. Require to initialize
it first such that it can receive a host resume event, that
notifies the normal resume hook.
The suspend complete hook is paired with the resume init hook,
which reverts the initialization of the SPI driver.
BRANCH=None
BUG=b:148149387
TEST=make buildall -j
TEST=Build successfully on both default off and defining this CONFIG.
Change-Id: I615e2bf92c75f83a7b0ab3eded61a1ef241dbdcf
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321875
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Google is working to change its source code to use more inclusive
language. To that end, replace the terms "sane", "sanity check", and
similar with inclusive/non-stigmatizing alternatives.
BUG=b:161832469
BRANCH=None
TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows
results only in third-party code or documentation.
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169
Reviewed-by: Jett Rink <jettrink@chromium.org>
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A new hook HOOK_CHIPSET_SHUTDOWN_COMPLETE is introduced, which are
called from the chipset task, while the system has already shut down
and all the suspend rails are already off.
It will be used for executing pending EC reboot at the chipset shutdown.
The EC reboot should be executed when the chipset is completely off.
BRANCH=None
BUG=b:156981868
TEST=Built all boards.
Change-Id: I12f26957e46a1bb34ef079f127b0bddd133cd4e7
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2228395
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Enable ip accessible power gating for ish 5.4 on tgl rvp platform.
BUG=b:154891699
BRANCH=none
TEST=ISH can successfully enter into IPAPG on tgl rvp.
Change-Id: Iee30124a0928389f4c75dffff065fab7a5a2d970
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2164091
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
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Infrastructure related changes to support enabling power management
for ish5.4 on tgl rvp platform.
BUG=b:149238813
BRANCH=none
TEST=ISH can successfully enter into D0i1/D0i2/D0i3 on tgl rvp.
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Change-Id: I50b6f1a4fe9c14f9479af2a2a438ec7395ec27a1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056149
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
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This is a cleanup/reformat of the linker script.
This brings no functional change.
BRANCH=none
BUG=b:146083406
TEST=make buildall
Change-Id: I481233b20c017355b1c3c9b6e4010ea9e7ef8560
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1966289
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Chip level enablement of ish5.4 on tgl rvp platform.
BUG=b:141519691
BRANCH=none
TEST=tested on tgl rvp
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Change-Id: I3f6249e1816d81deec0420a12b093918ee7fbddc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1846788
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Commit-Queue: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
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This change removes uses of %l from the EC side of the EC codebase.
This is done because the semantics of %l within printf have changed,
and there are concerns that new calls to printf will be cherry-picked
into old firmware branches without the printf changes. So, in
preparation for disallowing %l in master, remove occurrences of %l.
This change was done by manually fixing up anything found under the EC
directory with the following regex: %[0-9*.-]*l[^l]
Remember that anything on the host machine is fine as-is, since the host
printf never changed.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=None
Change-Id: I2a97433ddab5bfb8a6031ca4ff1d3905289444e2
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834603
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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This change fixes the printf formatting errors found by the
compile-time prinf format checker. The errors fall into a few
categories:
1. Incorrect size specifier (missing or extra l).
2. Missing or extra arguments.
3. Bad line splitting.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=none
Change-Id: I5618097a581210b9fcbfc81560dec050ae30b61c
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819653
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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In order to make our printf more standard, utilize %ll for long long
arguments, rather than %l. This does cost a little bit in flash space
for that extra l in a couple of places, but enables us to turn on
compile-time printf format checking.
For this commit only, the semantics are such that both %l and %ll
take 64-bit arguments. In the next commit, %l goes to its correct
behavior of taking a sizeof(long) argument.
BUG=chromium:984041
TEST=make -j buildall
BRANCH=none
Cq-Depend:chrome-internal:1863686,chrome-internal:1860161,chrome-internal:1914029
Change-Id: I18081b55a8dbf5ef8ec15fc499ca75e59d31da58
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819652
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Provide API to disable/enable tasks.
All the tasks are marked enabled after hook_task starts.
We need a way to control the tasks when it shouldn't run in some states.
BUG=b:136240895
TEST=Disable the tasks and see it won't be scheudled when task_wake().
BRANCH=None
Change-Id: I2662f3619b22ed28387fe3c783001ba2a745620c
Signed-off-by: Yilun Lin <yllin@google.com>
Signed-off-by: Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1753562
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ISH has native support for storing the hardware ticks in a 64-bit
integer. With CONFIG_HWTIMER_64BIT, we can use this instead of relying
on the periodic rollover interrupt.
BUG=b:133190570,chromium:976804
BRANCH=none
TEST=ran arcada_ish for more than 2³² μs, observed timer worked as
normal
Change-Id: I3b608c49081842f28d2ef8c16279992af1cb4fad
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1668056
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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The errorcode is pushed to the stack by hardware for vectors
8, 10-14 and 17. The others will be missing that parameter
when exception_panic is called. So make sure to push a 0 for
these other exceptions to line up parameter values.
BUG=b:135671664
BRANCH=none
TEST=make buildall -j
TEST=verify errorcode 0 on exceptions that hw does not push a value
Change-Id: I7aad96278408a5e38cf973c868e05d92b52469dd
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1669884
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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For interrupt vectors (as opposed to exception handlers), the eip
value is on top of the stack (referentially the return address by C
calling convention). Use separate code for WDT vector.
BUG=b:129983997
BRANCH=none
TEST='crash watchdog' showing correct EIP, CS values
Change-Id: I7efb2c71aba63eefd89fc71af089bc14034b7d08
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1663188
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
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Change AON_ROM references to be AON_PERSISTENT, these are not readonly
Use the linker to set a snowball structure in the right place so we do
not have to maintain hardcoded addresses in the register file
BUG=b:132690500
BRANCH=none
TEST=make buildall -j and check map location of snowball to be correct
Change-Id: I4983a078fbd067b9c7ec9f0c49f962a4cb1581b7
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1664593
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Removed many of the #if conditions and replaced them with IS_ENABLED
BUG=b:132178013
BRANCH=none
TEST=make buildall -j
TEST=verify basic ish ec functionality
Change-Id: I39c1d2dfdb39baa06e53746789d0b6a648275ed9
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660021
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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In order to receive better debug info from panic reports, include the
current task when the panic was encountered.
BUG=b:134071217
BRANCH=none
TEST=saw that task was "CONSOLE" when typing "crash divzero" from
console
Change-Id: I2fa9f931eea0274a762f812b6a7a8281cb8fcc5f
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1660018
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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By moving the __irq_data extern declaration into link_defs.h, the
struct can be used in more than just interrupts.c.
In addition, this provides a common struct definiton for IRQ
definitions consisting of an IRQ number, the assigned routine, and a
handler function, which is a fairly common way to store IRQ
definitions.
BUG=none
BRANCH=none
TEST=arcada ISH functions as normal
Change-Id: Idbb5780ae965faeade74cfe319364f61dd933d9e
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1649375
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Adding functions for software panic to ISH. This includes
panic_set_reason, panic_get_reason and software_panic.
Added extra output when a software panic is detected.
Had to touch nds32/panic.c in order to make panic_sw_reasons
common.
BUG=b:134502392
BRANCH=none
TEST=Verified with crash assert, with CONFIG_DEBUG_ASSERT defined
Change-Id: Iebfe62a7dcd59b4bbed82b450dfd44cc8eaed1da
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1648958
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Move persistent data definitions to a structure and have linker script
define the address of the symbol into the AON ROM (persistent data
storage). Use the magic number "ISHd" to verify persistent data
storage and copy to static memory when valid. Commit changes from the
local copy during reset.
BUG=b:133779707,b:133647823,b:132059981
BRANCH=none
TEST=power-on is only reset flag under cold reset, panic data
persists, watchdog reset produces correct reset flags, UART always
printing system info on boot
Change-Id: I65a458cc2656f8fe26361ef2117ceb5439edff6c
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636293
Legacy-Commit-Queue: Commit Bot <commit-bot@chromium.org>
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Reload the watchdog timer immediately after exiting from D0ix before
re-enabling the reset of the IRQs.
Also re-enable all ISRs in a batch while interrupts are disabled to
limit the number of context switched if multiple interrupts are pending.
BRANCH=none
BUG=b:133190570
TEST=let arcada enter and exit D0i[0123] without issue for a couple of
minutes. There are not adverse affects of this change.
Change-Id: I3ef5878b0618a0c1858664cad061d415329d4302
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1640304
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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When we switched to using REG32 macros for registers, we made
a mistake in using address of LAPIC's ISR.
The original CL that changed this was CL:1586458
BRANCH=none
BUG=none
TEST=Tested on Arcada platform
Change-Id: Ia64806a4cb0fa5d150b41407b0f6c9f34f0168e8
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1611746
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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When we switched to using REG32 macros for registers, we also changed
the math for the offset of the lapic. Fixing the pointer math.
The original CL that changed this was CL:1586458
BRANCH=ish
BUG=none
TEST=ISH runs normally
Change-Id: I1beea99ede496a2eee2adf96adeec21b3f1e1fd4
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1600158
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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watchdog_warning implements similar functionality to exception_panic,
but worse, as the value it prints for EIP is wrong, and it does not
have the no-double-panic logic of the panic handler. This commit
removes watchdog_warning and integrates the relevant functionality
into exception_panic.
BUG=b:129983997
BRANCH=none
TEST=observed watchdog reset with 'waitms 10500'
Change-Id: I78375337aa85be5424850e29a8204c409384d019
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1599732
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This patch adds a hook for USB PD connect event.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/127228934
BRANCH=none
TEST=buildall. Verify a hook is called on BC12 charger connection.
Change-Id: I88fcd65d1afce07b6275398c5d0b902ecd7a44a3
Reviewed-on: https://chromium-review.googlesource.com/1597794
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This commit stores panic data across reset by storing panic data in
the last 256 bytes of AON memory (before AON ROM).
> crash divzero
========== PANIC ==========
Reason: Divide By Zero
Error Code = 0xFF00B60C
EIP = 0xFF010008
CS = 0x00010202
EFLAGS = 0x00103085
EAX = 0x00000001
EBX = 0xFF01B118
ECX = 0x00000000
EDX = 0x00000000
ESI = 0x00000000
EDI = 0xFF017E0E
Resetting system...
===========================
... ISH reset ...
> panicinfo
Saved panic data: (NEW)
Reason: Divide By Zero
Error Code = 0xFF00B60C
EIP = 0xFF010008
CS = 0x00010202
EFLAGS = 0x00103085
EAX = 0x00000001
EBX = 0xFF01B118
ECX = 0x00000000
EDX = 0x00000000
ESI = 0x00000000
EDI = 0xFF017E0E
BUG=b:129425206
BRANCH=none
TEST=see console output above (on arcada_ish)
Change-Id: I5c9e458b53076eafe7fa50ba851f2c6e863f2247
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1593418
Reviewed-by: Jett Rink <jettrink@chromium.org>
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libgcc provides 64bit division operation functions for 32bit arch,
such as '__udivdi3', link libgcc for general 64bit division on ish.
please note for critical performance required case, do not use these
functions from libgcc.
examples:
scale_us2ticks() in chip/ish/hwtimer.c
BRANCH=none
BUG=b:131590864
TEST=tested on arcada platform
Change-Id: I554e4c79f017e098ab83972928376f82fe7b92d1
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1587396
Commit-Ready: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This is a good portion of the fixes needed for b:130573158, but we
still have the HECI registers to deal with. I have those in a separate
CL as they were giving me a significant amount of trouble.
BUG=b:130573158
BRANCH=none
TEST=arcada_ish is functioning as normal after changes
Change-Id: I9c209a329d61f7f55c260006cdffbfc705521195
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1586458
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Current s/w generated IRQ uses LAPIC's ICR but it causes pending
interrupts for other IRQs in IOAPIC and leads LVT error with
illegal vector. So instead of using ICR, we use "int" instruction.
BRANCH=none
BUG=b:129937881,b:124128140
TEST=Tested on Arcada platform
Change-Id: I49c4120e7355f9a98d20d5ed259c4fdf6bad5196
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1568786
Commit-Ready: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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ish_pm_reset is a rather complex procedure, and encountering a panic
while it is happening could lead to an infinte loop of handling
panics. This will preform a reset of the Minute-IA core if a panic
occurs and the system is already resetting from panic.
BUG=b:130752748,b:130587334
BRANCH=none
TEST=copied some invalid opcodes into switch_to_aontask procedure,
observed the hard reset after forcing a panic
Change-Id: I43459d78da9b67297f84e3a736d3f92da42a814c
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1576835
Reviewed-by: Jett Rink <jettrink@chromium.org>
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I had forgotten to remove this from testing the panic handler. This is
a duplicate command of "crash divzero" and should be removed.
BUG=b:126691187
BRANCH=none
TEST=divzero console command is gone on arcada
Change-Id: Id37d3f3749bd4228045cca93a38315ee9c94b2e9
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1576837
Reviewed-by: Jett Rink <jettrink@chromium.org>
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on ish, need fw clean fabric agent error status, otherwise will
cause ish wakeup immediately after entered low power mode.
this operaion has no impact for other functions.
BUG=b:130193448
BRANCH=none
TEST=verified on arcada platform
Change-Id: Iecd85d1ab037aafa988d6c32ad47b51003913198
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1563470
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
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Currently we can LAPIC's ISR registers to find vector number but
it's already know to the IRQ handler.
BRANCH=none
BUG=none
TEST=Tested on Arcada platform
Change-Id: If6626eee0b2548eb26d15cf97b220403b6afcfdb
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1573203
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Variable "start_called" is never updated due to bug in __task_start.
this patch fixes the bug.
BRANCH=none
BUG=none
TEST=Tested on Arcada platform
Change-Id: Icdea8adf5a06c891188fc84bc49cb643a7e009ec
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1570150
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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