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* Fix inconsistent task function declarationsStefan Reinauer2018-02-121-1/+1
| | | | | | | | | | | | | | | | | | | Tasks are defined inconsistently across the code base. Signed-off-by: Stefan Reinauer <reinauer@google.com> BRANCH=none TEST=make buildall -j, also verify kevin boots to OS BUG=none Change-Id: I4e5ef4137cc17307848a8365b26b403a61cbbaed Signed-off-by: Duncan Laurie <dlaurie@google.com> Original-Commit-Id: 9939855231350875737f9b05e208454451e3bb4a Original-Change-Id: I19a076395a9a8ee1e457e67a89d80d2f70277c97 Original-Reviewed-on: https://chromium-review.googlesource.com/602739 Original-Commit-Ready: Shawn N <shawnn@chromium.org> Original-Tested-by: Shawn N <shawnn@chromium.org> Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/914641
* task: Wait for HOOK_INIT completion before scheduling tasksShawn Nematbakhsh2017-07-101-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until HOOK_INIT has completed, do not allow any tasks other than HOOKS or IDLE to be scheduled. Programmers often make the assumption that a HOOK_INIT function is guaranteed to be run before task code that depends on it, so let's make it so. BUG=chromium:649398 BRANCH=None TEST=Manual on kevin, compare boot without patch: ... [0.004 power state 0 = G3, in 0x0008] <-- from chipset task RTC: 0x00000000 (0.00 s) [0.004 power state 4 = G3->S5, in 0x0008] RTC: 0x00000000 (0.00 s) [0.005 clear MKBP fifo] [0.006 clear MKBP fifo] [0.006 KB init state: ... <-- from keyscan task [0.012 SW 0x05] [0.155 hash start 0x00020000 0x00019a38] [0.158 HOOK_INIT DONE!] ... to boot with patch: ... RTC: 0x58cc614c (1489789260.00 s) [0.004 clear MKBP fifo] [0.005 clear MKBP fifo] [0.010 SW 0x05] [0.155 hash start 0x00020000 0x000198e0] [0.157 HOOK_INIT DONE!] ... Also, verify kevin boots to OS and is generally functional through sysjump and basic tasks, and verify elm (stm32f0 / cortex-m0) boots. Change-Id: I44a1db0ae72fdd4245acc8bfc29b029fa90eac5b Signed-off-by: Duncan Laurie <dlaurie@google.com> Original-Commit-Id: 8a16e6483ab80a85af44e8ba164e5e91a51ec43a Original-Change-Id: If56fab05ce9b9650feb93c5cfc2d084aa281e622 Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/456628 Original-Commit-Ready: Shawn N <shawnn@chromium.org> Original-Tested-by: Shawn N <shawnn@chromium.org> Original-Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/565813
* chip: it83xx: add support for floating point unitDino Li2017-06-052-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because N8 CPU doesn't have floating point unit, so we implement an extra floating point engine (single-precision addition, subtraction, multiplication, and division) into it8320 to improve performance of floating point operation. To make CPU's instruction compatible, we use register (DLMB) to switch ALU (Arithmetic Logic Unit). eg: Instruction 'ADD45' adds the contents of two registers then writes the result to the source register. But if we switch ALU to floating point operation mode, this instruction will do a floating-point addition instead. For the other FPU that we don't support as far, we have to use soft float library routines of nds32. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=add the following console command and test different scenarios by changing variable a and b. static int it83xx_fpu_test(int argc, char **argv) { volatile float a = 1.23f; volatile float b = 4.56f; volatile float c; c = a + b; ccprintf("__addsf3: (%d)\n", PRINTF_FLOAT(c)); c = a - b; ccprintf("__subsf3: (%d)\n", PRINTF_FLOAT(c)); c = a * b; ccprintf("__mulsf3: (%d)\n", PRINTF_FLOAT(c)); c = a / b; ccprintf("__divsf3: (%d)\n", PRINTF_FLOAT(c)); return EC_SUCCESS; } DECLARE_CONSOLE_COMMAND(fpu, it83xx_fpu_test, "", ""); Change-Id: Ifcd1caf2ef08c71cc90130d874668bb4248874da Signed-off-by: Duncan Laurie <dlaurie@google.com> Original-Commit-Id: c35fad0f2bc16fffe25dfe3b86f0df508d6d0b87 Original-Change-Id: I4fc1c08d8c2376156bec9f098491187675c4a88f Original-Reviewed-on: https://chromium-review.googlesource.com/427640 Original-Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Original-Tested-by: Dino Li <Dino.Li@ite.com.tw> Original-Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/524380
* nds32: lds: compute image size at link timeDino Li2017-03-201-2/+1
| | | | | | | | | | | | | | | Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=b:36228568 TEST=Check '__image_size' of map file and binary size for both RO and RW images. Change-Id: I43b58a199a30827293531505de30f0ddfb72b917 Reviewed-on: https://chromium-review.googlesource.com/456664 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* system: Use stored size in image_data for determining image_usedShawn Nematbakhsh2017-03-161-11/+2
| | | | | | | | | | | | | | | | | | Image used size is now part of the image_data struct present in all images at a fixed offset, so use it rather than scanning from the end of the image. BUG=chromium:577915 TEST=Verify on kevin + lars + lars_pd that system_get_image_used() returns the same value as the old implementation, for both RO and RW images. BRANCH=None Change-Id: I35f0aa87f5ab1371dbd8b132f22b9d0044358223 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/450859 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* version: Store image size data in version structShawn Nematbakhsh2017-03-161-1/+1
| | | | | | | | | | | | | | | | | | | | | Store our image size (known at build time) in our version struct (now renamed to image_data). This will allow us to more efficiently determine the size of an image in a follow-up CL. Note that compatibility is broken for old ROs that do not include this CL. BUG=chromium:577915 TEST=Verify on kevin + lars + lars_pd that stored image size matches output of system_get_image_used() for both RO and RW images. BRANCH=None Change-Id: I7b8dc3ac8cf2df3184d0701a0e0ec8032de8d81b Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/450858 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Remove charge_state_v1Sam Hurst2017-02-061-4/+0
| | | | | | | | | | | | | | | | All boards have been transitioned to charge_state_v2.c So charge_state_v1.c, HOOK_CHARGE_STATE_CHANGE, and CONFIG_CHARGER_TIMEOUT_HOURS can be removed BUG=chrome-os-partner:36272 TEST=make -j buildall BRANCH=none Change-Id: I3f20c5198ea75185f9894deb792575a1be31432a Reviewed-on: https://chromium-review.googlesource.com/435467 Commit-Ready: Sam Hurst <shurst@google.com> Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* Revert "version: Store image size data in version struct"Vadim Bendebury2017-02-011-1/+1
| | | | | | | | | | | | | This is a dependency of the uderlyaing patch which breaks header composition of g chip based boards. This reverts commit 7cbb815732d7434f5985d3b50a869aa71ba5c507. Change-Id: I4d94647cf5cb09fd338e5a581c956df6b5d83081 Reviewed-on: https://chromium-review.googlesource.com/435551 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Bendebury <vbendeb@chromium.org>
* Revert "system: Use stored size in image_data for determining image_used"Vadim Bendebury2017-02-011-1/+11
| | | | | | | | | | | | This breaks header composition of g chip based boards. This reverts commit 93951a491dd00e20addc1ff99c2896bb9752e665. Change-Id: Ia52cf1d9c56fbb588317cec73487b2c9e89b7234 Reviewed-on: https://chromium-review.googlesource.com/435550 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Bendebury <vbendeb@chromium.org>
* system: Use stored size in image_data for determining image_usedShawn Nematbakhsh2017-01-301-11/+1
| | | | | | | | | | | | | | | | | | | Image used size is now part of the image_data struct present in all images at a fixed offset, so use it rather than scanning from the end of the image. BUG=chromium:577915 TEST=Verify on kevin + lars + lars_pd that system_get_image_used() returns the same value as the old implementation, for both RO and RW images. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ic8db5c706d82f7ca2ded2e90129747e7fbefdb38 Reviewed-on: https://chromium-review.googlesource.com/427959 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* version: Store image size data in version structShawn Nematbakhsh2017-01-301-1/+1
| | | | | | | | | | | | | | | | | | | | | Store our image size (known at build time) in our version struct (now renamed to image_data). This will allow us to more efficiently determine the size of an image in a follow-up CL. Note that compatibility is broken for old ROs that do not include this CL. BUG=chromium:577915 TEST=Verify on kevin + lars + lars_pd that stored image size matches output of system_get_image_used() for both RO and RW images. BRANCH=None Change-Id: I49ea5fc27a7f11f66daba485a87d0dfe7d0c770f Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/427408 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* nds32: Add fabsf and sqrtf functionDino Li2017-01-183-1/+131
| | | | | | | | | | | | | | | | | | | | | | | | The magnetometer online calibration requires these two functions and taken from newlib. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=fabsf(): fabsf(1.23) = 1.23 fabsf(-1.23) = 1.23 sqrtf(): sqrtf(4.56) = 2.135 sqrtf(0.123) = 0.350 sqrtf(-0.123) = an exception is triggered. Change-Id: I808ca7f1bd03c6d6c1b32861ede4ecbfeeaa3da6 Reviewed-on: https://chromium-review.googlesource.com/429730 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* iec: Improve efficiency of host command dispatcherSam Hurst2017-01-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use binary search in host command lookup dispatcher BUG=chromium:570895 TEST=manual testing on kevin - Kevin boots - ectool hello make buildall -j Verify *.smap hcmds section is sorted: BOARD with host commands and private host commands 0004d0ec R __hcmds 0004d0ec R __host_cmd_0x00000x0000 0004d0f8 R __host_cmd_0x00000x0001 0004d104 R __host_cmd_0x00000x0002 0004d110 R __host_cmd_0x00000x0003 0004d11c R __host_cmd_0x00000x0004 0004d128 R __host_cmd_0x00000x0005 0004d134 R __host_cmd_0x00000x0007 0004d140 R __host_cmd_0x00000x0008 0004d14c R __host_cmd_0x00000x000a 0004d158 R __host_cmd_0x00000x000d 0004d164 R __host_cmd_0x00000x0010 0004d170 R __host_cmd_0x00000x0011 0004d17c R __host_cmd_0x00000x0012 0004d188 R __host_cmd_0x00000x0013 0004d194 R __host_cmd_0x00000x0015 0004d1a0 R __host_cmd_0x00000x0016 0004d1ac R __host_cmd_0x00000x0017 0004d1b8 R __host_cmd_0x00000x0087 0004d1c4 R __host_cmd_0x00000x008c 0004d1d0 R __host_cmd_0x00000x008f 0004d1dc R __host_cmd_0x00000x0092 0004d1e8 R __host_cmd_0x00000x0093 0004d1f4 R __host_cmd_0x00000x0097 0004d200 R __host_cmd_0x00000x0098 0004d20c R __host_cmd_0x00000x00b6 0004d218 R __host_cmd_0x00000x00d2 0004d224 R __host_cmd_0x00000x00d3 0004d230 R __host_cmd_0x3E000x0000 0004d23c R __host_cmd_0x3E000x0002 0004d248 R __evt_src_EC_MKBP_EVENT_HOST_EVENT 0004d248 R __hcmds_end BOARD with host commands only 100bc888 R __hcmds 100bc888 R __host_cmd_0x00000x0000 100bc894 R __host_cmd_0x00000x0001 100bc8a0 R __host_cmd_0x00000x0002 100bc8ac R __host_cmd_0x00000x0003 100bc8b8 R __host_cmd_0x00000x0004 100bc8c4 R __host_cmd_0x00000x0005 100bc8d0 R __host_cmd_0x00000x0006 100bc8dc R __host_cmd_0x00000x0007 100bc8e8 R __host_cmd_0x00000x0008 100bc8f4 R __host_cmd_0x00000x0009 100bc900 R __host_cmd_0x00000x000a 100bc90c R __host_cmd_0x00000x000b 100bc918 R __host_cmd_0x00000x000d 100bc924 R __host_cmd_0x00000x0010 100bc930 R __host_cmd_0x00000x0011 100bc93c R __host_cmd_0x00000x0012 100bc948 R __host_cmd_0x00000x0013 100bc954 R __host_cmd_0x00000x0015 100bc960 R __host_cmd_0x00000x0016 100bc96c R __host_cmd_0x00000x0017 100bc978 R __host_cmd_0x00000x0025 100bc984 R __host_cmd_0x00000x0026 100bc990 R __host_cmd_0x00000x0029 100bc99c R __host_cmd_0x00000x002a 100bc9a8 R __host_cmd_0x00000x002b 100bc9b4 R __host_cmd_0x00000x002c 100bc9c0 R __host_cmd_0x00000x0044 100bc9cc R __host_cmd_0x00000x0045 100bc9d8 R __host_cmd_0x00000x0046 100bc9e4 R __host_cmd_0x00000x0047 100bc9f0 R __host_cmd_0x00000x0061 100bc9fc R __host_cmd_0x00000x0062 100bca08 R __host_cmd_0x00000x0064 100bca14 R __host_cmd_0x00000x0065 100bca20 R __host_cmd_0x00000x0067 100bca2c R __host_cmd_0x00000x0087 100bca38 R __host_cmd_0x00000x008c 100bca44 R __host_cmd_0x00000x008d 100bca50 R __host_cmd_0x00000x008f 100bca5c R __host_cmd_0x00000x0092 100bca68 R __host_cmd_0x00000x0093 100bca74 R __host_cmd_0x00000x0096 100bca80 R __host_cmd_0x00000x0097 100bca8c R __host_cmd_0x00000x0098 100bca98 R __host_cmd_0x00000x0099 100bcaa4 R __host_cmd_0x00000x009e 100bcab0 R __host_cmd_0x00000x00a0 100bcabc R __host_cmd_0x00000x00a1 100bcac8 R __host_cmd_0x00000x00a8 100bcad4 R __host_cmd_0x00000x00a9 100bcae0 R __host_cmd_0x00000x00b6 100bcaec R __host_cmd_0x00000x00b7 100bcaf8 R __host_cmd_0x00000x00d2 100bcb04 R __host_cmd_0x00000x00d3 100bcb10 R __host_cmd_0x00000x00db 100bcb1c R __host_cmd_0x00000x0101 100bcb28 R __host_cmd_0x00000x0102 100bcb34 R __host_cmd_0x00000x0103 100bcb40 R __host_cmd_0x00000x0104 100bcb4c R __host_cmd_0x00000x0110 100bcb58 R __host_cmd_0x00000x0111 100bcb64 R __host_cmd_0x00000x0112 100bcb70 R __host_cmd_0x00000x0113 100bcb7c R __host_cmd_0x00000x0114 100bcb88 R __host_cmd_0x00000x0115 100bcb94 R __host_cmd_0x00000x0116 100bcba0 R __host_cmd_0x00000x0117 100bcbac R __host_cmd_0x00000x0118 100bcbb8 R __host_cmd_0x00000x011a 100bcbc4 R __evt_src_EC_MKBP_EVENT_KEY_MATRIX 100bcbc4 R __hcmds_end BRANCH=none Change-Id: I5d13d2a7fe7fa9a0fbeed43177cc612f572a58bb Reviewed-on: https://chromium-review.googlesource.com/419702 Commit-Ready: Sam Hurst <shurst@google.com> Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* nds32: lds: reduce gap of flashDino Li2017-01-052-23/+31
| | | | | | | | | | | | | | | | | | | | | - Before the change was made, the "__ro_end" was at 00013520h. We change to 00012760h. - Rename "CONFIG_IT83XX_ILM_BLOCK_SIZE" to "IT83XX_ILM_BLOCK_SIZE" this is because we don't support reconfiguration at board-level. - Put some task functions into "__ram_code" section to fill the gap and improving performance of code-fetch. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console commands: flasherase, flashwrite, and flashread. Change-Id: I2f2906a2a0b6971aadd00120c282801161447808 Reviewed-on: https://chromium-review.googlesource.com/424248 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* nds32: pre-fix for the latest official toolchainDino Li2016-12-202-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use the latest nde32 official toolchain to verify the bug of GP-related instruction was fixed (we can remove "-mno-gp-direct" flag to save code space), and code optimization. We got some error on official toolchain, so we fix them as well: - "break" instead of "trap". N8 CPU does not support "trap" instruction to generate an unconditional trap exception, but no error occurred while compiling by using current GCC toolchain (this will trigger a reserved instruction exception, so "ASSERT()" still work). We use "break" to generate a exception in this change. - "li" instead of "la". To fix the error: "Error: la must use with symbol". Also fix: - The "_bss_start" has to be word-aligned because we use "lwi" instruction to load a word from the memory into the general register. BRANCH=none BUG=none TEST=1. console command "crash assert". 2. check registers settings: f02030h, f0203eh, and f02044h. Change-Id: I33404a1d60eeebfa135bf43d3a7d5e73ab35c678 Reviewed-on: https://chromium-review.googlesource.com/422608 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Revert "ec: Improve efficiency of host command dispatcher"Vadim Bendebury2016-11-261-1/+1
| | | | | | | | | | | | | | This reverts commit c459c8278ed2dc84100693eab93389a0df9429bd as the fix is not straightforwad, some host command codes in private repos are expressed using C preprecessor which breaks the assumption of this patch that all host commands are expressed as four digit hex numbers. Change-Id: I922de9ae8dbab6eef048463c5c09b1f338152083 Reviewed-on: https://chromium-review.googlesource.com/414492 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Bendebury <vbendeb@chromium.org>
* ec: Improve efficiency of host command dispatcherSam Hurst2016-11-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use binary search in host command lookup dispatcher BUG=chrome-os-partner:570895 TEST=manual testing on kevin - Kevin boots - ectool hello make buildall -j Verify *.smap hcmds section is sorted: 100bca94 R __hcmds 100bca94 R __host_cmd_0x0000 100bcaa0 R __host_cmd_0x0001 100bcaac R __host_cmd_0x0002 100bcab8 R __host_cmd_0x0003 100bcac4 R __host_cmd_0x0004 100bcad0 R __host_cmd_0x0005 100bcadc R __host_cmd_0x0006 100bcae8 R __host_cmd_0x0007 100bcaf4 R __host_cmd_0x0008 100bcb00 R __host_cmd_0x0009 100bcb0c R __host_cmd_0x000a 100bcb18 R __host_cmd_0x000b 100bcb24 R __host_cmd_0x000d 100bcb30 R __host_cmd_0x0010 100bcb3c R __host_cmd_0x0011 100bcb48 R __host_cmd_0x0012 100bcb54 R __host_cmd_0x0013 100bcb60 R __host_cmd_0x0015 100bcb6c R __host_cmd_0x0016 100bcb78 R __host_cmd_0x0017 100bcb84 R __host_cmd_0x0025 100bcb90 R __host_cmd_0x0026 100bcb9c R __host_cmd_0x0029 100bcba8 R __host_cmd_0x002a 100bcbb4 R __host_cmd_0x002b 100bcbc0 R __host_cmd_0x002c 100bcbcc R __host_cmd_0x0044 100bcbd8 R __host_cmd_0x0045 100bcbe4 R __host_cmd_0x0046 100bcbf0 R __host_cmd_0x0047 100bcbfc R __host_cmd_0x0061 100bcc08 R __host_cmd_0x0062 100bcc14 R __host_cmd_0x0064 100bcc20 R __host_cmd_0x0065 100bcc2c R __host_cmd_0x0067 100bcc38 R __host_cmd_0x0087 100bcc44 R __host_cmd_0x008c 100bcc50 R __host_cmd_0x008d 100bcc5c R __host_cmd_0x008f 100bcc68 R __host_cmd_0x0092 100bcc74 R __host_cmd_0x0093 100bcc80 R __host_cmd_0x0096 100bcc8c R __host_cmd_0x0097 100bcc98 R __host_cmd_0x0098 100bcca4 R __host_cmd_0x0099 100bccb0 R __host_cmd_0x009e 100bccbc R __host_cmd_0x00a0 100bccc8 R __host_cmd_0x00a1 100bccd4 R __host_cmd_0x00a8 100bcce0 R __host_cmd_0x00a9 100bccec R __host_cmd_0x00b6 100bccf8 R __host_cmd_0x00b7 100bcd04 R __host_cmd_0x00d2 100bcd10 R __host_cmd_0x00d3 100bcd1c R __host_cmd_0x00db 100bcd28 R __host_cmd_0x0101 100bcd34 R __host_cmd_0x0102 100bcd40 R __host_cmd_0x0103 100bcd4c R __host_cmd_0x0104 100bcd58 R __host_cmd_0x0110 100bcd64 R __host_cmd_0x0111 100bcd70 R __host_cmd_0x0112 100bcd7c R __host_cmd_0x0113 100bcd88 R __host_cmd_0x0114 100bcd94 R __host_cmd_0x0115 100bcda0 R __host_cmd_0x0116 100bcdac R __host_cmd_0x0117 100bcdb8 R __host_cmd_0x0118 100bcdc4 R __host_cmd_0x011a 100bcdd0 R __evt_src_EC_MKBP_EVENT_KEY_MATRIX 100bcdd0 R __hcmds_end BRANCH=none Change-Id: Ideb9951b318763f71915e2c4e5052f4b4bfab173 Reviewed-on: https://chromium-review.googlesource.com/405528 Commit-Ready: Sam Hurst <shurst@google.com> Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fix various misspellings in commentsMartin Roth2016-11-151-1/+1
| | | | | | | | | | | | | No functional changes. BUG=none BRANCH=none TEST=make buildall passes Change-Id: Ie852feb8e3951975d99dce5a49c17f5f0e8bc791 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/403417 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
* task: Don't propagate TASK_EVENT_TIMER between between waitsShawn Nematbakhsh2016-10-261-1/+4
| | | | | | | | | | | | | | | | | | | | In __wait_evt(), if a timer expiration occurs after we read event status, before the timer is canceled, then TASK_EVENT_TIMER will be propagated to the next task wait, likely leading to premature timeout. Prevent this by clearing TASK_EVENT_TIMER after canceling our timer. BUG=chrome-os-partner:58658 BRANCH=gru TEST=Manual on gru, run 'pd # hard' for 12 hours with charger attached, verify no TCPC I2C read errors occur. Change-Id: Iac2f05a768b4ef29f82e7c3eb899f4c7dd5c3744 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/400968 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* common: Add TABLET_MODE hook.Gwendal Grignou2016-09-071-0/+4
| | | | | | | | | | | | | Add a hook to act when the a device is going in tablet mode and back. BUG=chromium:606718 BRANCH=kevin TEST=Test with evtest that an event is sent to the AP. Change-Id: Ic9c3b158f1178504af41abff18b28de8e07fc7a7 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/380412 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cleanup: DECLARE_CONSOLE_COMMAND only needs 4 argsBill Richardson2016-08-241-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since pretty much always, we've declared console commands to take a "longhelp" argument with detailed explanations of what the command does. But since almost as long, we've never actually used that argument for anything - we just silently throw it away in the macro. There's only one command (usbchargemode) that even thinks it defines that argument. We're never going to use this, let's just get rid of it. BUG=none BRANCH=none CQ-DEPEND=CL:*279060 CQ-DEPEND=CL:*279158 CQ-DEPEND=CL:*279037 TEST=make buildall; tested on Cr50 hardware Everything builds. Since we never used this arg anyway, there had better not be any difference in the result. Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/374163 Reviewed-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* core: Don't discard irqprio table entries due to LTOShawn Nematbakhsh2016-08-071-5/+5
| | | | | | | | | | | | | | | | | Add __keep attribute to irqprio entries to ensure they are not dropped when CONFIG_LTO is enabled. BUG=chrome-os-partner:55920 BRANCH=None TEST=Manual on kevin. Check build/RO/ec.RO.map, verify that .rodata.irqprio section is not empty. Change-Id: I51ae23556d6f46b2cd7ba098f0e7a785292b2853 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/366571 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* it83xx: Support different PLL frequencies setting (24/48/96 MHz)Dino Li2016-06-142-8/+5
| | | | | | | | | | | | | | | | | | | | | | | Default setting is at 48MHz. For PLL frequency at 24MHz: 1. USB module can't work, it requires 48MHz to work. 2. SSPI clock frequency is divide by two. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. uart, i2c, timer, and pd modules are function normally at different PLL frequency settings. 2. use 'flashrom' utility to flash EC binary with different PLL settings. Change-Id: Iabce4726baff493a6136136af18732b58df45d7f Reviewed-on: https://chromium-review.googlesource.com/347551 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Remove SHIFT_CODE_FOR_TEST handlingShawn Nematbakhsh2016-06-031-4/+0
| | | | | | | | | | | | | | | | | | SHIFT_CODE_FOR_TEST images were used for an old FAFT test but is no longer in use today. BUG=chromium:616806 BRANCH=None TEST=`make buildall -j` CQ-DEPEND=CL:349281 Change-Id: I1b4e8c2560e2a7ff507cf2275dbbbdabf435866b Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/349272 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Tom Tam <waihong@google.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* chip: it83xx: Optimize interrupt usage of LPC accessDino Li2016-05-181-10/+0
| | | | | | | | | | | | | | | | | | LPC access interrupt only enabled when EC entering deep doze mode. This will reduce interrupt of LPC access. Also, this interrupt is always enabled for LPC platform to support "CONFIG_LOW_POWER_S0". Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=Tested ectool command 'version' x 10000. Change-Id: I9053c4018b38a8a852c3c6254e1fcde625f3fa3a Reviewed-on: https://chromium-review.googlesource.com/336112 Commit-Ready: Dino Li <dino0303@gmail.com> Tested-by: Dino Li <dino0303@gmail.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Deferred: Remove hard coded number of deferredsAnton Staaf2016-04-191-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | Previously the maximum number of deferred routines was specified by the the default maximum number of deferred routines you had to override this, and if you wanted fewer, you still payed the price of having the defer_until array statically allocated to be the maximum size. This change removes that define and instead creates the RAM state of the deferred routine (the time to wait until to call the deferred) when the deferred is declared. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j manually test on discovery-stm32f072 Change-Id: Id3db84ee1795226b7818c57f68c1f637567831dc Reviewed-on: https://chromium-review.googlesource.com/335597 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* core/*/ec.lds.S: quote paths containing OUTDIRPatrick Georgi2016-02-101-4/+7
| | | | | | | | | | | | | | | | | | | If OUTDIR brings in a "@", the build breaks because that delimits the path, leading to invalid file names. This can happen (and happened) when building on a Jenkins CI instance which uses jobname@number as path for parallel checkouts on a single build node. BRANCH=none BUG=none TEST=build with make out=foo@bar ... failed and works now. Change-Id: Id0594f0d7312419110091443755ec11b5f8ee2d8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/327110 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Martin Roth <martinroth@chromium.org>
* chip: it83xx: fix EC interrupt vector registers issueDino Li2016-01-282-29/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have a limitation for EC interrupt vector registers. System may read incorrect interrupt number in ISR so we need to add a workaround to prevent it. The following is a example that got incorrect interrupt number: 1. REG IVCTx = 0x10. (no interrupt pending) 2. EC INT6 interrupt occurs (IVCTx = 0x16) and jump to ISR. 3. Read interrupt vector register to determine interrupt number. 4. Higher priority interrupt of same interrupt group occurs (for example: INT134, IVCTx = 0x96) while the system is reading the interrupt vector register for EC INT6, we may end up with an incorrect interrupt number between 0x16 and 0x96. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. EC interrupts work normally: WUI (GPIO interrupt), timer, uart, LPC, I2C, and PECI. 2. Console command 'taskinfo'. Change-Id: I54e61f417ad506eb3b4cd5d0652f64eed9a28a17 Reviewed-on: https://chromium-review.googlesource.com/322097 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ec: Add a chipset reset hookDuncan Laurie2016-01-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | There are hooks for chipset power sequencing but not one to indicate that the system has reset at runtime. Add a hook for this and implement for lm4 and mec1322. The hook is notified on any platform reset, including those that happen on the way into S3/S5 state. There is a new config variable added because the hook is notified in the interrupt handler and needs a deferrable function that needs to be added to every board. BUG=chrome-os-partner:46049 BRANCH=none TEST=tested on glados and samus Change-Id: I3be639414e18586344e0ec84632a50dfc1df586b Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/315221 Commit-Ready: Aaron Durbin <adurbin@chromium.org> Tested-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* core: nds32: add task_wait_event_mask() function to nds32 coreDino Li2016-01-051-3/+29
| | | | | | | | | | | | | | | | | | | | | [task] 1. Copy task_wait_event_mask() function of cortex-m0. [system] 2. Include host_command.h for host_command_pd_request_hibernate(). [i2c] 3. Update i2c handler to use task_wait_event_mask. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=chromium:435611,chromium:435612 TEST=1. console commands: i2cscan, i2cxfer, and battery. Change-Id: If5bb4407460d28c0b021ab133ca4b635ff7bc3c9 Reviewed-on: https://chromium-review.googlesource.com/320440 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* nds32: start_irq_handler() use system stackDino Li2015-12-163-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [symptom] The 'vboot_hash_start()' always return busy error and variable 'in_progress' got a strange value(should be 0 or 1). 'start_irq_handler()' causes scratchpad overflow in first context switch. It must be called after SP switch to system stack in ISR. NOTE: The scratchpad is still also need more size even if 'start_irq_handler()' is using system stack. following is detail: 1. uint32_t scratchpad[19] 0x81d34 ~ 0x81d7f [__task_start:] 2. /* put the dummy stack pointer at the top of the stack in scratchpad */ addi $sp, $r3, 4 * 18 -> SP 0x81d7c 3. syscall push return address (-4) -> SP 0x81d78 [ISR:] 4. push r15, fp, lp, and sp (-0x10) -> SP 0x81d68 5. push r0 ~ r5 (-0x18) -> SP 0x81d50 [__switch_task:] 6. /* save ipsw, ipc, r6, r7, r8, r9, r10 on the current process stack */ (-0x1C) -> SP 0x81d34 Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. hash done. 2. console command 'taskinfo'. 3. the scratchpad does not overflow after first context switch. Change-Id: If5d89ff5c945a777010492fcfb54bf41f434ed69 Reviewed-on: https://chromium-review.googlesource.com/317468 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* nds32: fix ldsDino Li2015-11-121-0/+1
| | | | | | | | | | | | | | | | | | symptom: .bss.slow won't be cleared during initialization. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=.bss.slow = 0. Change-Id: I6a8b84807b36a64f29732f09f56947e17d5ba898 Reviewed-on: https://chromium-review.googlesource.com/312155 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: modify hwtimer and LPC wake upDino Li2015-11-051-34/+7
| | | | | | | | | | | | | | | | | | | | | | | | | 1. In combinational mode and clock source is 8MHz, if timer 3 counter register always equals to 7, then timer 4 will be a 32-bit MHz free-running counter. 2. Fix TIMER_32P768K_CNT_TO_US(), each count should be 30.5175 us, not 32.768us. 3. Fix TIMER_CNT_8M_32P768K(). 4. Make sure LPC wake up interrupt is enabled before entering doze / deep doze mode. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. Console commands: 'gettime', 'timerinfo', 'waitms', and 'forcetime'. 2. Enabled Hook debug, no warning message received (48hrs). 3. Tested ectool command 'version' x 2000. Change-Id: I796d985361d3c18bc5813c58705b41923e28c5b1 Reviewed-on: https://chromium-review.googlesource.com/310039 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* nds32: fix interruptDino Li2015-11-012-0/+22
| | | | | | | | | | | | | | | | | | | | | | 1. To enable INT_PRI (hardware interrupt priority level 0~3) register, bit0@INT_CTRL = 0. 2. GIE need to be enabled before UART is initialized. [symptom] To define CONFIG_RWSIG / CONFIG_RSA / CONFIG_SHA256, then power on: after RW image is verified, firmware stuck in uart_flush_output(). Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. bit0@INT_CTRL = 0. 2. The RW image is verified and jump to image RW. Change-Id: I393a3d5f87ea257885b872c91bfce43aecbaea8b Reviewed-on: https://chromium-review.googlesource.com/309400 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: Increase DLM sizeDino Li2015-10-251-0/+12
| | | | | | | | | | | | | | | | 1. Total DLM size is 48KB. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=DLM 0x84000 ~ 0x8BFFF read/write OK. Change-Id: I2340aeefca60ad59062254ddd363c703c30cfd24 Reviewed-on: https://chromium-review.googlesource.com/307006 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: fix clock moduleDino Li2015-10-251-5/+40
| | | | | | | | | | | | | | | | | | | | 1. Implement deep doze mode for CONFIG_LOW_POWER_IDLE. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=test the following items in deep doze mode. 1. WUI interrupts wake-up OK. (For example, power button, lid, uart rx, keyboard ksi, and so on) 2. LPC access interrupt wake-up OK. 3. Enabled Hook debug, no warning message received (48hrs). Change-Id: I8702a112632cb6c1c0fa75d682badf272130a7d4 Reviewed-on: https://chromium-review.googlesource.com/307060 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* nds32: fix panicDino Li2015-10-073-5/+193
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support saving panic data for nds32 core. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console commands 'crash' and 'panicinfo'. 2. ectool command 'panicinfo' crash assert ASSERTION FAILURE '0' in command_crash() at common/panic_output.c:162 === EXCEP: ITYPE=1 === R0 00000000 R1 000000a2 R2 00000060 R3 00000000 R4 00080c40 R5 00000000 R6 dead6663 R7 000000a2 R8 00000002 R9 00000000 R10 00081960 R15 00000000 FP 00000000 GP 000818d8 LP 0000079a SP 00080c60 IPC 000007a2 IPSW 70009 SWID of ITYPE: 0 Software panic reason PANIC_SW_ASSERT Software panic info 0xa2 Rebooting... panicinfo Saved panic data: (NEW) === EXCEP: ITYPE=1 === R0 00000000 R1 000000a2 R2 00000060 R3 00000000 R4 00080c40 R5 00000000 R6 dead6663 R7 000000a2 R8 00000002 R9 00000000 R10 00081960 R15 00000000 FP 00000000 GP 000818d8 LP 0000079a SP 00080c60 IPC 000007a2 IPSW 70009 SWID of ITYPE: 0 Software panic reason PANIC_SW_ASSERT Software panic info 0xa2 > crash divzero === EXCEP: ITYPE=10003 === R0 00000000 R1 00f02705 R2 00000060 R3 00081a09 R4 00000000 R5 00000000 R6 00000001 R7 00080cc0 R8 00000002 R9 00000000 R10 00081961 R15 00000000 FP 00000000 GP 000818d8 LP 00009bce SP 00080c90 IPC 00009bee IPSW 70009 SWID of ITYPE: 1 Exception type: General exception [Arithmetic] Exception is caused by a data memory access Rebooting... panicinfo Saved panic data: (NEW) === EXCEP: ITYPE=10003 === R0 00000000 R1 00f02705 R2 00000060 R3 00081a09 R4 00000000 R5 00000000 R6 00000001 R7 00080cc0 R8 00000002 R9 00000000 R10 00081961 R15 00000000 FP 00000000 GP 000818d8 LP 00009bce SP 00080c90 IPC 00009bee IPSW 70009 SWID of ITYPE: 1 Exception type: General exception [Arithmetic] Exception is caused by a data memory access > crash stack +1+2+3+4+5+6+7+8+9+10+11+12+13+14+15+16+17 Stack overflow in CONSOLE task! === EXCEP: ITYPE=8 === R0 00000002 R1 00000002 R2 00000060 R3 00080458 R4 0000ebdd R5 00000000 R6 dead6661 R7 00000002 R8 00000bc8 R9 00000002 R10 00000000 R15 00000000 FP 00000000 GP 000818d8 LP 0000079a SP 00080448 IPC 00000a92 IPSW 70009 SWID of ITYPE: 0 Software panic reason PANIC_SW_STACK_OVERFLOW Software panic info 0x2 Rebooting... panicinfo Saved panic data: (NEW) === EXCEP: ITYPE=8 === R0 00000002 R1 00000002 R2 00000060 R3 00080458 R4 0000ebdd R5 00000000 R6 dead6661 R7 00000002 R8 00000bc8 R9 00000002 R10 00000000 R15 00000000 FP 00000000 GP 000818d8 LP 0000079a SP 00080448 IPC 00000a92 IPSW 70009 SWID of ITYPE: 0 Software panic reason PANIC_SW_STACK_OVERFLOW Software panic info 0x2 > crash watchdog Pre-watchdog warning! IPC: 00009c6c panicinfo Saved panic data: (NEW) === EXCEP: ITYPE=0 === R0 00000000 R1 00000000 R2 00000000 R3 00000000 R4 00000000 R5 00000000 R6 dead6664 R7 00000000 R8 00000000 R9 00000000 R10 00000000 R15 00000000 FP 00000000 GP 00000000 LP 00000000 SP 00000000 IPC 00009c6c IPSW 00000 SWID of ITYPE: 0 Software panic reason PANIC_SW_WATCHDOG Software panic info 0x0 > Change-Id: I3d491ecd0789335db4633f9bf2ca09cf85503ed9 Reviewed-on: https://chromium-review.googlesource.com/303286 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* it8380dev: fix hw timer and related function.Dino Li2015-10-014-2/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [chip config] 1. No hardware specific udelay(). 2. Enable watchdog. [watchdog] 3. Watchdog period is "CONFIG_WATCHDOG_PERIOD_MS" of config.h. 4. Watchdog auxiliary timer period is "CONFIG_AUX_TIMER_PERIOD_MS". [task and irq] 5. Write 1 to clear interrupt pending status, no |. 6. A global variable for store interrupt number of software interrupt. [uart] 7. Always reset UART module before config it. [hwtimer] 8. Use more external timers for HW timer module. [task] 9. Fix task profiling. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=[watchdog] 1. console "waitms 1100", only pre-watchdog warning message. 2. console "waitms 1600", warning message and watchdog reset. [hwtimer] 3. console commands "gettime", "timerinfo", and "forcetime". 4. enable hook debug and there is no delayed by more than 10% warning message over 48 hours. 5. There is no watchdog reset too. [task] 6. console 'taskinfo' Task Ready Name Events Time (s) StkUsed 0 R << idle >> 00000000 32.927724 308/512 1 HOOKS 00000000 0.034267 372/768 2 R CONSOLE 00000000 0.116763 468/768 3 HOSTCMD 00000000 0.000641 372/512 4 KEYPROTO 00000000 0.000042 212/512 5 KEYSCAN 00000000 0.000908 356/512 IRQ counts by type: 38 2932 155 1 158 261 160 67 Service calls: 87 Total exceptions: 3348 Task switches: 167 Task switching started: 0.001999 s Time in tasks: 33.282819 s Time in exceptions: 0.164717 s Change-Id: I234085cec231cd855d2a5e639ea1b0966c61d796 Reviewed-on: https://chromium-review.googlesource.com/296939 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common: Add __fls functionGwendal Grignou2015-09-211-3/+3
| | | | | | | | | | | | | | | Returns the most significant bit set. Replace 31 - __builtin_clz(x), so x must be different from 0. Use get_next_bit when not on the performance path, on performance path set the bit field just after reading it. BRANCH=smaug BUG=none TEST=compile, check Ryu still works. Change-Id: Ie1a4cda4188f45b4bf92d0549d5c8fb401a30e5d Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/301300
* it8380dev: fix idle task and chip idDino Li2015-09-181-1/+23
| | | | | | | | | | | | | | | | | | | | | 1. Fix system_get_chip_name() and system_get_chip_revision(). 2. Fix EC doze mode. 3. Enable LPC cycle wake-up EC from doze / deep doze function. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console "version". Chip: ite it8390 cx 2. EC doze mode is normally. 3. ectool "version" command x 2000. Change-Id: I167dbfb965e557eb86ed83f45a945e4315f5fa9f Reviewed-on: https://chromium-review.googlesource.com/299110 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Rename geometry constantsShawn Nematbakhsh2015-09-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename and add geometry constants to match spec doc - https://goo.gl/fnzTvr. CONFIG_FLASH_BASE becomes CONFIG_PROGRAM_MEMORY_BASE CONFIG_FLASH_MAPPED becomes CONFIG_MAPPED_STORAGE Add CONFIG_INTERNAL_STORAGE, CONFIG_EXTERNAL_STORAGE and CONFIG_MAPPED_STORAGE_BASE where appropriate. This CL leaves chip/npcx in a broken state -- it's fixed in a follow-up CL. BRANCH=None BUG=chrome-os-partner:23796 TEST=With entire patch series, on both Samus and Glados: - Verify 'version' EC console command is correct - Verify 'flashrom -p ec -r read.bin' reads back EC image - Verify software sync correctly flashes both EC and PD RW images Change-Id: Idb3c4ed9f7f6edd0a6d49ad11753eba713e67a80 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297484 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Cleanup: Remove COMPILE_FOR_RAM option from linker scriptsBill Richardson2015-09-081-12/+0
| | | | | | | | | | | | | | | This option was added way back in January 2012 for early EC bringup, and never used since. We can probably remove it. BUG=none BRANCH=none TEST=make buildall Change-Id: Idc8c3099388f2e28d620848a0e78b555b02fba9c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297334 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* UART: Remove unused uart.h header includesAnton Staaf2015-09-082-2/+0
| | | | | | | | | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: Ife068807f79f6435292643c49afa1a9a30ae7080 Reviewed-on: https://chromium-review.googlesource.com/296733 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* nds32: use INT_MASK instead of GIEDino Li2015-08-203-34/+66
| | | | | | | | | | | | | | | | | | | | | | | | | When there is an interrupt event, N8 CPU will save PSW register to IPSW register and clear GIE then jump to interrupt service routine. N8 will restore PSW from IPSW after "iret" instruction (the above are purely hardware mechanism). Nested interrupt will occur if we set GIE again in interrupt context. symptom: power button pressed while LID open -> exception or unknown reset. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. Manually pressed power button x200. 2. Console "eflash" erase and write eflash OK. Change-Id: Ic04a23d473ebc6417dffea814a27583cb8d63a1f Reviewed-on: https://chromium-review.googlesource.com/289437 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* it8380dev: add __muldi3.SDino Li2015-08-142-1/+41
| | | | | | | | | | | | | | | | | | | | symptom: Enable debugging and profiling statistics for hook functions (#define CONFIG_HOOK_DEBUG), and __muldi3 function is missing while link. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. compile successful and hook_notify starting to print message. 2. console "hookstats" Change-Id: Ia2815bcefd0f9ac06dab9c75ea6ee06312878ca2 Reviewed-on: https://chromium-review.googlesource.com/293432 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* Atomic: Mark the modified uint32_t volatileAnton Staaf2015-07-271-5/+5
| | | | | | | | | | | | | | | | | | | | | | The atomic_* functions are often used in contexts where the data they will operate on are volatile (due to being shared between tasks or a task and an interrupt handler). Adding volatile here makes using the atomic_* functions a little easier in those cases and removes a cast from the call sites (which could be obscuring a bug, if for instance the variable was modified to be a uint16_t). Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I71356eb3cf2c0506df38532eee767c7d78f9240e Reviewed-on: https://chromium-review.googlesource.com/287516 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* hooks: Move HOOK_INIT to after task switching.Aseda Aboagye2015-07-131-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | This commit changes the way in which tasks are started. Instead of having all tasks marked as ready to run upon initialization, only the hooks task is marked as ready to run. HOOK_INITs are now run at the beginning of the hooks task. After the HOOK_INITs, the hooks task calls back to enable the rest of the tasks, reschedules, and proceeds as usual. This also allows the removal of checks for task_start_called(). BUG=chrome-os-partner:27226 BRANCH=None TEST=Built and flash EC image for samus and verified that EC boot was successful as well as AP boot. Additionally, verified that charging, keyboard, tap-for-battery were all still functional. TEST=make -j buildall tests Change-Id: Iea53670222c803c2985e9c86c96974386888a4fe Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/283657 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* it8380dev: add flash module and fix system jumpDino Li2015-07-082-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add flash control module for emulation board. 2. Fix system jump for Andes core. 3. Change the physical size of the flash on the chip to 256KB. note: 1. Only IT839x series supports flash write protect by registers. 2. Static DMA method of flash code only for IT839x series and IT838x Dx. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command flashwp and flashinfo 1-a. flashwp enable 1-b. WP asserted and reboot 1-c. flashinfo RO protected now 1-d. WP deasserted and reboot 1-e. No protected 1-f. flashwp disable 1-g. WP asserted and reboot 1-h. No protected 2. console sysjump and sysinfo 2-a. sysjump rw 2-b. jumping to image RW 2-c. sysinfo, Copy : RW, Jumped : yes 2-d. sysjump ro 2-e. jumping to image RO 2-f. sysinfo, Copy : RO, Jumped : yes 3. RO/RW firmware image test 3-a. sysjump rw 3-b. use console command "eflash" to erase RO region, erase OK and system still work. 3-c. reflash firmware 3-d. sysjump rw, sysjump ro 3-e. use console command "eflash" to erase RW region, erase OK and system still work. Change-Id: I7666a095e73026a02fb812e5143bc5172ab713e8 Reviewed-on: https://chromium-review.googlesource.com/271390 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* nds32: remove macro "RO"Dino Li2015-07-011-13/+0
| | | | | | | | | | | | | | | | | | | "RO" is a workaround for GP base instructions. And now we have added "-mno-gp-direct" option in the NDS32 toolchain. So the compiler would not generate GP base instructions directly, and we can remove this "RO". Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=chrome-os-partner:24378 TEST=console "version" and "gpioget" Change-Id: I23cb6374fb8eb57081d713bf5c70b80a87dd2fb5 Signed-off-by: Dino Li <dino.li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/281862 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* cleanup: fix all the header guardsBill Richardson2015-06-184-12/+12
| | | | | | | | | | | | | | | This unifies all the EC header files to use __CROS_EC_FILENAME_H as the include guard. Well, except for test/ util/ and extra/ which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively. BUG=chromium:496895 BRANCH=none TEST=make buildall -j Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029 Reviewed-on: https://chromium-review.googlesource.com/278121 Reviewed-by: Randall Spangler <rspangler@chromium.org>
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