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* core: Add forward declaration for IRQ handler routineTom Hughes2021-09-271-0/+1
* Provide 'is_interrupt_enabled' function for all coresPatryk Duda2021-09-061-0/+10
* builtin: Add math.hTom Hughes2021-08-311-3/+3
* riscv: panic: S0/S1 are clobbered registers in software_panic()Dino Li2021-08-231-2/+2
* atomic.h: atomic_clear_bits: return previously stored valueTing Shen2021-07-291-2/+2
* config: rename CONFIG_FLASH to CONFIG_FLASH_CROSJeremy Bettis2021-04-271-3/+3
* Revert "config: rename CONFIG_FLASH to CONFIG_FLASH_CROS"stabilize-13935.B-mainJack Rosenthal2021-04-241-3/+3
* config: rename CONFIG_FLASH to CONFIG_FLASH_CROSEric Yilun Lin2021-04-231-3/+3
* riscv-rv32i/task: Remove the remove_me functionDino Li2021-04-081-12/+0
* it8xxx2: add support option CONFIG_PRESERVE_LOGSDino Li2021-04-071-0/+19
* Hooks: Add HOOK_CHIPSET_HARD_OFFDiana Z2021-03-181-0/+4
* core/riscv-rv32i: rearrange symbols in ILMTing Shen2021-03-031-19/+21
* core/riscv-rv32i: set in_interrupt at beginning of exception handlerTzung-Bi Shih2021-02-192-4/+8
* riscv-rv32i: store EC interrupt number in panic infoDino Li2021-02-042-24/+26
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-151-1/+1
* core/riscv-rv32i: correct inline assembly constraint modifierTzung-Bi Shih2021-01-141-1/+1
* Revert "core/riscv-rv32i: Add exception_panic"Nicolas Boichat2021-01-112-16/+7
* core/riscv-rv32i: Use -fsanitize-undefined-trap-on-errorNicolas Boichat2021-01-112-11/+3
* core/riscv-rv32i: Enable integer division by zero UBSANNicolas Boichat2020-12-302-0/+12
* core/riscv-rv32i: Add exception_panicNicolas Boichat2020-12-302-7/+16
* core/riscv-rv32i: Make it possible to enable LTONicolas Boichat2020-12-291-0/+5
* it8xxx2: enable ILM0Dino Li2020-12-171-0/+6
* it83xx/flash: workaround of IMMU tag is nds32 onlyDino Li2020-12-171-2/+0
* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-141-6/+15
* core/riscv-rv32i: support DRAM cacheTzung-Bi Shih2020-11-191-0/+64
* core/riscv-rv32i: move essential code to ram_code only if supportsTzung-Bi Shih2020-11-191-1/+3
* it83xx: pull more functions into __ram_code sectionDino Li2020-11-181-1/+2
* COIL: Rename CONFIG_I2C_PERIPHERALDiana Z2020-11-051-3/+3
* atomic: rename atomic_read_clear to atomic_clearDawid Niedzwiecki2020-11-022-2/+2
* atomic: remove deprecated atomic functionsDawid Niedzwiecki2020-10-301-56/+0
* tree: Use new atomic_* implementationDawid Niedzwiecki2020-10-271-11/+10
* core/riscv-rv32i: add Zephyr compatible atomic functionsDawid Niedzwiecki2020-10-131-0/+38
* core/riscv-rv32i: rename atomic inc and decDawid Niedzwiecki2020-10-071-4/+4
* core: rename atomic_clear to atomic_clear_bitsDawid Niedzwiecki2020-10-062-6/+6
* riscv-rv32i/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-19/+25
* tree: rename atomic_* functions to deprecated_atomic_*Jack Rosenthal2020-09-292-17/+29
* it83xx: read_clear_int_mask() read and clear interrupt bit.Dino Li2020-09-241-8/+8
* riscv-rv32i: Enable FPU extension only if CONFIG_FPU is enabledDino Li2020-08-201-1/+3
* npcx: add support for rom resident sectionsKeith Short2020-08-131-0/+13
* linker: change symbol used to track available flashKeith Short2020-08-051-2/+8
* linker: Add flash sizes as linker defined labelsKeith Short2020-08-051-0/+11
* ec: change usage of dummySam Hurst2020-08-051-2/+2
* hooks: Introduce chipset resume init and suspend complete hooksWai-Hong Tam2020-07-301-0/+10
* core: nds32/riscv-rv32i: fix issue of time in exceptions is negativeDino Li2020-07-241-7/+8
* ec: change usage of "sane" per inclusive languagePaul Fagerburg2020-07-222-2/+2
* riscv-rv32i: correct printf formatEric Yilun Lin2020-07-221-7/+7
* core/riscv-rv32i: add atomic_inc and atomic_decTzung-Bi Shih2020-07-031-6/+11
* core/riscv-rv32i: set volatile for in_interruptTzung-Bi Shih2020-06-101-1/+1
* hooks: Introduce HOOK_CHIPSET_SHUTDOWN_COMPLETEWai-Hong Tam2020-06-061-0/+4
* core/riscv-rv32i: remove return valuesTzung-Bi Shih2020-06-041-6/+3
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