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* atomic: remove deprecated atomic functionsDawid Niedzwiecki2020-10-306-329/+0
| | | | | | | | | | | | | | Remove deprecated_atomic_* functions since only atomic_* are now used. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I6b25cc81aec126662ed779cf0f9309dcb77a754e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505142 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* tree: Use new atomic_* implementationDawid Niedzwiecki2020-10-276-62/+56
| | | | | | | | | | | | | | | | | | | | | | | It is done as a part of porting to Zephyr. Since the implementation of atomic functions is done for all architectures use atomic_* instead of deprecated_atomic_*. Sometimes there was a compilation error "discards 'volatile' qualifier" due to dropping "volatile" in the argument of the functions, thus some pointers casts need to be made. It shouldn't cause any issues, because we are sure about generated asm (store operation will be performed). BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949 Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* core/nds32: to avoid race conditiontim2020-10-271-3/+12
| | | | | | | | | | | | | | | | | | | | | After the program to line 628(original program), we have determined that the local variable of waiter is 0 because a task is getting the mutex lock then clearing waiter to 0(line 608). If another task enters mutex lock at this time, mtx->waiters will be written to 1 and go to sleep waiting, but the local variable of waiter is still 0. This will cause latter task which cannot be woke up when previous task leaves the mutex unlock. BUG=none BRANCH=none TEST=create two tasks and respectively access mutex_lock and mutex_unlock. There would not happen that latter task cannot be woke up when previous task leaves the mutex unlock. Change-Id: I566a14c1120716af8e9ac99e183a989274a4e72e Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438084 Reviewed-by: Jett Rink <jettrink@chromium.org>
* core/nds32: add Zephyr compatible atomic functionsDawid Niedzwiecki2020-10-201-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | Add atomic functions with prototypes equal to the ones in Zephyr. It is done as a part of porting to Zephyr, the next step is to use in the code atomic_* instead of deprecated_atomic_*. Some atomic functions in Zephyr return a value e.g. atomic_add - it returns the value of the variable before the add operation. Adjust the atomic functions' code to support that. GCC builtin functions are not used, because those functions are not available for nds32. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I9e181d3c64117b30a08179f84c16162ab70b25fc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2444992 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Dino Li <Dino.Li@ite.com.tw>
* core/cortex-m0: add Zephyr compatible atomic functionsDawid Niedzwiecki2020-10-151-4/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add atomic functions with prototypes equal to the ones in Zephyr. It is done as a part of porting to Zephyr, the next step is to use in the code atomic_* instead of deprecated_atomic_*. Some atomic functions in Zephyr return a value e.g. atomic_add - it returns the value of the variable before the add operation. To support such functionality the new ATOMIC_OP define is introduced. The "memory" clobber is added to the asm statement to inform compiler that memory pointed by the input parameter (a) is changed. This is needed, because atomic_* functions are inline. GCC builtin functions are not used, because those functions are not available for cortex-m0. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I713daf388cb279704ae1b3767bd84b71a255f7cd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438425 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* core/minute-ia: add Zephyr compatible atomic functionsDawid Niedzwiecki2020-10-131-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | Add atomic functions with prototypes equal to the ones in Zephyr. It is done as a part of porting to Zephyr, the next step is to use in the code atomic_* instead of deprecated_atomic_*. Some atomic functions in Zephyr return a value e.g. atomic_add - it returns the value of the variable before the add operation. The current state of ATOMIC_OP macro is not designed to return such value so instead of reworking it or writing new custom asm code just use builtin functions. The __atomic_* builtins support variables with different sizes so use them in *_u8 functions as well. For "and" operation, it compiles to "andb" for u8 and to "andl" for u32. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I498ca3dbb14aea6afc2f7a525c530eede7f31fe2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2448497 Reviewed-by: Jett Rink <jettrink@chromium.org>
* core/riscv-rv32i: add Zephyr compatible atomic functionsDawid Niedzwiecki2020-10-131-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | Add atomic functions with prototypes equal to the ones in Zephyr. It is done as a part of porting to Zephyr, the next step is to use in the code atomic_* instead of deprecated_atomic_*. Some atomic functions in Zephyr return a value e.g. atomic_add - it returns the value of the variable before the add operation. Use GCC builtin functions instead of the custom asm code in order be sure there are no bugs and be consistent with other architectures. atomic_read_add/sub work the same as atomic_add/sub. atomic_read_add/sub should be replaced and deleted in the next step - use atomic_* instead of deprecated_atomic_*. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I1f4f4ef26acb9e388da75125a4dd8e2f0dba9fe8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2444995 Reviewed-by: Jett Rink <jettrink@chromium.org>
* core/host: add Zephyr compatible atomic functionsDawid Niedzwiecki2020-10-131-0/+28
| | | | | | | | | | | | | | | | | | | | | | Add atomic functions with prototypes equal to the ones in Zephyr. It is done as a part of porting to Zephyr, the next step is to use in the code atomic_* instead of deprecated_atomic_*. Some atomic functions in Zephyr return a value e.g. atomic_add - it returns the value of the variable before the add operation. Use __atomic insead of __sync atomic functions as it is a recommended way (https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html). BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I4617e2f4c4b9e7021f3df572ba98f1f52bcd8975 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2453253 Reviewed-by: Jett Rink <jettrink@chromium.org>
* core/cortex-m: add Zephyr compatible atomic functionsDawid Niedzwiecki2020-10-081-0/+29
| | | | | | | | | | | | | | | | | | | | | | Add atomic functions with prototypes equal to the ones in Zephyr. It is done as a part of porting to Zephyr, the next step is to use in the code atomic_* instead of deprecated_atomic_*. Some atomic functions in Zephyr return a value e.g. atomic_add - it returns the value of the variable before the add operation. The current state of ATOMIC_OP macro is not designed to return such value so instead of reworking it or writing new custom asm code just use builtin functions. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Iccd7a4d674601271f11f88834c8b2db08c537534 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428945 Reviewed-by: Jett Rink <jettrink@chromium.org>
* core/riscv-rv32i: rename atomic inc and decDawid Niedzwiecki2020-10-071-4/+4
| | | | | | | | | | | | | | | | | Rename atomic_inc function to deprecated_atomic_read_add and atomic_dec to deprecated_atomic_read_add to be more precise what the functions do. It is done as a part of porting to Zephyr, where atomic_inc increments by 1 and atomic_dec decrements by 1. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: Ide852ac32ce9027698cb937a06543da689c2e136 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428944 Reviewed-by: Jett Rink <jettrink@chromium.org>
* core: rename atomic_clear to atomic_clear_bitsDawid Niedzwiecki2020-10-0611-34/+34
| | | | | | | | | | | | | | | | | | Change the name of atomic_clear to atomic_clear_bits to make to name more clear - the function clears only selected bits, but the name may suggest that it clears the whole variable. It is done as a part of porting to Zephyr, where atomic_clear zeros the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943 Reviewed-by: Jett Rink <jettrink@chromium.org>
* npcx: support enhanced PSL functions in npcx9CHLin2020-10-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. In npcx7, the PSL (hibernation) wakeup source only can come from physical PSL_IN pins. In npcx9, the LCT (Long Countdown Timer) module is introduced to support wakeup from a configurable timeout. 2. support PSL wakeup from the VCC1_RST pin. This function is disabled by default and enabled (and locked) in the firmware in the npcx9 A1 chip. In the npcx9 A2 chip, this function is enabled (and locked) by booter. 3. Support pulse mode and open drain (if pulse mode is enabled) for PSL_OUT pin. 4. support one PSL general-purpose output pin which is powered by VSBY. BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST="hibernate 10", check EC wakes up from hibernate after 10 seconds. make sure the reset cause in the console is "power-on hibernate rtc-alarm" TEST="hibernate"; check EC wakes up from hibernate after pressing VCC1_RST button on the internal test board. Test=configure the PSL_OUT to pulse mode and "hibernate"; cut off VCC1 power; check EC can wake up from hibernate with any input event. Test=configure the level of PSL_GPO before hibernation; check the level is kept after entering hibernation. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Signed-off-by: CHLin <CHLin56@nuvoton.com> Change-Id: I98ad41da8557222cf3d09fef9524880731cecde1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435164 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* minute-ia/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-29/+34
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I7f32eec1f03cccf8ddd3af29ac2821459a99629b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381714 Reviewed-by: Jett Rink <jettrink@chromium.org>
* riscv-rv32i/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-19/+25
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I156225d90ea3c7bc5a09e899afd0935e04d71680 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381713 Reviewed-by: Jett Rink <jettrink@chromium.org>
* nds32/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-19/+25
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ic42ab9e334abf95f8437b41e828abe74d065b9d8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381712 Reviewed-by: Jett Rink <jettrink@chromium.org>
* cortex-m0/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-9/+17
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I2a5b474b03a65ce4a5c77cf5f5b671d1d72095f2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381711 Reviewed-by: Jett Rink <jettrink@chromium.org>
* cortex-m/panic: Use newly provided functions to access panic dataPatryk Duda2020-10-011-9/+17
| | | | | | | | | | | | | | | This change removes usage of PANIC_DATA_PTR where possible. Now panic data is accessed through functions that performs more checks and in case of writing also moves other data when necessary. BUG=b:165773837, b:162254118 BRANCH=none TEST=make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Id4099d2a205f5e6118e83514dc4b88c980054ea9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2381710 Reviewed-by: Jett Rink <jettrink@chromium.org>
* tree: rename atomic_* functions to deprecated_atomic_*Jack Rosenthal2020-09-2912-91/+154
| | | | | | | | | | | | | | | | We will move to an API compatible with Zephyr's API. See the bug for complete rationale and plan. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* coretex-m: fix __image_size value in linker scriptCaveh Jalali2020-09-251-0/+6
| | | | | | | | | | | | | | | | | | | | | This fixes a regression introduced by chromiun:2325768 that broke software sync and forced recovery mode due to an incorrect EC image size value when CONFIG_CHIP_DATA_IN_INIT_ROM is used. also, __image_size was set twice in the linker script with the latter taking precedence when CONFIG_CHIP_INIT_ROM_REGION is enabled. Made the 1st occurrence conditional to avoid confusion. BUG=none BRANCH=none TEST=EC console "hash" command now reports the correct image size and we no longer end up in recovery due to software sync. Change-Id: Ic0fb405f6918bdfa467be5919eed91eb17ef7c2a Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428566 Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* it83xx: read_clear_int_mask() read and clear interrupt bit.Dino Li2020-09-243-26/+31
| | | | | | | | | | | | | | | | | | This change pulled the operation of interrupt disable into read_clear_int_mask(). Because riscv core supports instruction csrrc to atomic read and clear bit in CSR register. With this change, we won't need to separate operations of reading and clearing interrupt bit on riscv core. BUG=none BRANCH=none TEST=read_clear_int_mask() is able to disable interrupt and return saved interrupt bit on both nds32 and riscv cores. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I871aab747b950b7948cdeb7911fcf8c09d55df5d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2419739 Reviewed-by: Jett Rink <jettrink@chromium.org>
* cortex-m: support locating .data section in ROM residentKeith Short2020-09-242-9/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Reorganize the RO and RW images so the .data section remains in flash and is not copied into code RAM by the bootloader. This frees effective flash space for more code in the .text and .rodata sections. The EC initialization is changed to copy the .data section directly from flash into data RAM so the runtime access of objects linked into .data are unchanged. This is controlled with a new config option CONFIG_CHIP_DATA_IN_INIT_ROM. This option is automatically enabled when the board enables the ROM resident section with CONFIG_CHIP_INIT_ROM_REGION and the EC chip supports memory mapped access to flash (CONFIG_MAPPED_STORAGE). On Volteer this change saves 1656 bytes of RW flash space. BUG=none BRANCH=none TEST=make buildall TEST=Run "ectool motionsense lid_angle" on Volteer. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I2eff814ad240dfb46bfba400b83d78d1f69a8310 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325768 Reviewed-by: caveh jalali <caveh@chromium.org>
* core/nds32: remove unnecessary conditionDino Li2020-09-154-11/+20
| | | | | | | | | | | | | | | | | In the previous implementation, we added conditions to prevent stack overflow panic or memory get overwritten at first context switch. Actually, we won't hit these two situation if scratchpad size is correct. Let's remove them. BUG=none BRANCH=none TEST=EC boots, and the "runtime" is saved in scratchpad at first context switch. Change-Id: I647e1ebb01dbb8fe24adc9f22b6581bb8f8f97fb Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1980097 Reviewed-by: Jett Rink <jettrink@chromium.org>
* riscv-rv32i: Enable FPU extension only if CONFIG_FPU is enabledDino Li2020-08-201-1/+3
| | | | | | | | | | | | | | | | | | | At default, CONFIG_FPU option isn't enabled. But currently, FPU extension is always enabled when building FW image. This will cause problem if hardware doesn't support the extension and floating-point instructions are generated. So we fix it. BUG=none BRANCH=none TEST=Floating-point instructions are used for floating point operation if CONFIG_FPU is enabled. Otherwise, library routines are used. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Ifb77bd0cca1158ca7f6637fa9ec025ac8712bbfd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227779 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* cortex-m: Fix flash size calculation boards without flashKeith Short2020-08-181-25/+25
| | | | | | | | | | | | | | | | | | CL:2334389 broke the make debug output for the kukui_scp and flapjack_scp boards. The actual EC image was not affected. This change also cleans up the #ifdef usage to consolidate assignment of the output sections into one place. BUG=b:164696005 BRANCH=none TEST=make buildall TEST=Run "util/compare_board.sh -b cortex-m" Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: If69cb492e2aa5f1181e27be24ee66f63cc74ff62 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359492 Reviewed-by: caveh jalali <caveh@chromium.org>
* Replace __attribute__((noreturn)) with noreturnTom Hughes2020-08-174-6/+8
| | | | | | | | | | | | | | | _Noreturn was added in C11 and the convenience macro "noreturn" is specified by stdnoreturn.h: https://en.cppreference.com/w/c/language/_Noreturn. BRANCH=none BUG=none TEST=make buildall -j Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I30361bb5290cea1c776a7356f7e3a68edf1f8e39 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2324816 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* task: Change mutex_lock() assertEdward Hill2020-08-151-4/+13
| | | | | | | | | | | | | | | | | | | Instead of asserting that task_start() has not been called, just return without doing any locking. This avoids the need to fix every caller of mutex_lock() to check task_start_called(). BUG=b:164461158 BRANCH=none TEST=Esc+F3+Power enters recovery, does not assert. Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ic157d7e7041185a67f257f0f5710fd02e45cd77f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2357496 Reviewed-by: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Wai-Hong Tam <waihong@google.com>
* npcx: add support for rom resident sectionsKeith Short2020-08-135-1/+168
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EC images are copied in full from flash to RAM. When the code RAM size is smaller than 1/2 the flash size, the EC image size is limited to the code RAM size, leaving unused flash space. Create a new linker section .init_rom used to store data objects that are single use in the previously unused flash area. Data objects can be used at runtime by copying into RAM using the flash_read() function. This change is tied to the NPCX flash layout, with asserts to ensure builds fail if the CONFIG_CHIP_INIT_ROM_REGION is not supported by the chip. CLs that enable CONFIG_CHIP_INIT_ROM_REGION should not be merged until the predecessor CL:2325764 is available in CPFE images. BUG=b:160330682 BRANCH=none TEST=make buildall TEST=With debug code, use the _init_rom macro and validate the data can be read using flash_read(). TEST=Using hex editor, verify .init_rom section located at 192K boundary and unused bytes are filled with 0xFF. TEST=compare_build.sh passes when run against waddledoo (npcx, cortex-m) Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ia0785798fd1938ad6a1c254a070b219027ee82a3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311268 Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* task: Fix mutex_lock() assert (reland)Edward Hill2020-08-121-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | mutex_lock() must not be used in interrupt context. Add an assert to catch this. Also assert task_start_called() since task ID is not valid before this. Also remove an old assert since comparing id with TASK_ID_INVALID doesn't make sense. Add check for task_start_called() for NPCX flash_lock, I2C port_mutex, pwr_5v_ctl_mtx, STM32 bkpdata_write_mutex. This was submitted CL:2309057, reverted CL:2323704, submitted CL:2335738, reverted CL:2341706. BUG=b:160975910 BRANCH=none TEST=boot AP, jump to RW Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I0aadf29d073f0d3d798432099bd024a058332412 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343450 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* Revert "task: Fix mutex_lock() assert (reland)"caveh jalali2020-08-071-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 8d46141f4d45c65712a9ca7509b7b60128fa4d89. Reason for revert: getting EC boot loop on volteer: (note that you have to flash EC-RO to get this) 20-08-07 00:22:33.520 --- UART initialized after reboot --- 20-08-07 00:22:33.531 [Image: RO, volteer_1.1.9999-4284ce1 @caveh] 20-08-07 00:22:33.531 [Reset cause: reset-pin] 20-08-07 00:22:33.531 [0.005149 KB boot key mask 0] 20-08-07 00:22:33.543 [0.005438 init buttons] 20-08-07 00:22:33.543 [0.005669 VB Main] 20-08-07 00:22:33.543 [0.005872 VB Ping Cr50] 20-08-07 00:22:33.543 [0.007148 hash start 0x00040000 0x0002f61c] 20-08-07 00:22:33.833 [0.300169 hash done e4ddc3d0ffd015db085389d94faa38d3922e42290b6887baa8de3067ce846c13] 20-08-07 00:22:33.833 [0.300289 VB Verifying hash] 20-08-07 00:22:33.833 ��������������������������������EC\0 \0 �������S��O�8Ӓ.B) h����0g΄l[0.317577 VB Received 0xec00] 20-08-07 00:22:33.850 [0.317899 Jumping to image RW] 20-08-07 00:22:33.850 20-08-07 00:22:33.850 ASSERTION FAILURE '!in_interrupt_context() && task_start_called()' in mutex_lock() at core/cortex-m/task.c:868 20-08-07 00:22:33.861 20-08-07 00:22:33.861 === HANDLER EXCEPTION: 00 ====== xPSR: 0000000a === 20-08-07 00:22:33.861 r0 :00000364 r1 :100b6815 r2 :100b72ab r3 :100956bd 20-08-07 00:22:33.873 r4 :dead6663 r5 :00000364 r6 :200c1c20 r7 :00000001 20-08-07 00:22:33.873 r8 :00001388 r9 :100b4108 r10:100b4158 r11:00000013 20-08-07 00:22:33.884 r12:10095811 sp :200c0320 lr :200c1c20 pc :200c14f8 20-08-07 00:22:33.884 20-08-07 00:22:33.884 cfsr = 0, shcsr = 70000, hfsr = 0, dfsr = 0 20-08-07 00:22:33.884 20-08-07 00:22:33.884 =========== Process Stack Contents =========== 20-08-07 00:22:33.889 00000000: 100cfc00 00002a3d 00002751 00002731 20-08-07 00:22:33.901 00000010: 00002741 00002711 000027e1 00002791 20-08-07 00:22:33.901 00000020: 000027a1 000027b1 00002771 000027c1 20-08-07 00:22:33.901 00000030: 00002721 00002781 00002761 000027d1 20-08-07 00:22:33.906 20-08-07 00:22:33.906 Rebooting... 20-08-07 00:22:33.996 20-08-07 00:22:33.996 20-08-07 00:22:33.996 --- UART initialized after reboot --- Original change's description: > task: Fix mutex_lock() assert (reland) > > mutex_lock() must not be used in interrupt context. Add an assert > to catch this. > > Also assert task_start_called() since task ID is not valid > before this. > > Also remove an old assert since comparing id with TASK_ID_INVALID > doesn't make sense. > > This was first submitted as CL:2309057, then reverted by CL:2323704 > because it broke jump to RW (b/162302011). Fix this by adding check > for task_start_called() to chip/npcx/flash.c and common/i2c_master.c. > > BUG=b:160975910 > BRANCH=none > TEST=boot AP, jump to RW > > Signed-off-by: Edward Hill <ecgh@chromium.org> > Change-Id: I070a265a95d2128643b536814e608509d81adbe3 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335738 > Reviewed-by: Raul E Rangel <rrangel@chromium.org> > Reviewed-by: Denis Brockus <dbrockus@chromium.org> Bug: b:160975910 Change-Id: I9e37b1eac7344cddbd756fb45b130d7e0aee661b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2341706 Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org> Tested-by: caveh jalali <caveh@chromium.org>
* task: Fix mutex_lock() assert (reland)Edward Hill2020-08-061-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | mutex_lock() must not be used in interrupt context. Add an assert to catch this. Also assert task_start_called() since task ID is not valid before this. Also remove an old assert since comparing id with TASK_ID_INVALID doesn't make sense. This was first submitted as CL:2309057, then reverted by CL:2323704 because it broke jump to RW (b/162302011). Fix this by adding check for task_start_called() to chip/npcx/flash.c and common/i2c_master.c. BUG=b:160975910 BRANCH=none TEST=boot AP, jump to RW Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I070a265a95d2128643b536814e608509d81adbe3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335738 Reviewed-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* linker: change symbol used to track available flashKeith Short2020-08-054-30/+41
| | | | | | | | | | | | | | | | | | | | | | Change the linker symbol used to track available flash from __image_size to __flash_used. __image_size is now only used on the struct image_data header. BUG=b:160330682 BRANCH=none TEST=make buildall TEST=Run compare_build.sh against the following boards: cortex-m: volteer (npcx chipset) cortex-m0: honeybuns (stm32f0 chipset) minute-ia: not changed nds32: waddledee (it83xx) riscv-rv32i: asurada (i8xxx2) Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I94f5b4827cc0da1055520685cfeb1fafc0119e1c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334389 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* linker: Add flash sizes as linker defined labelsKeith Short2020-08-054-0/+44
| | | | | | | | | | | | | | | | | Add linker defined labels for the configured flash sizes. This is only used for image analysis. BUG=none BRANCH=none TEST=make buildall TEST=To see the labels run "nm -n build/<board>/RW/ec.RW.elf | grep __config" Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ib4db8478b19a8d93776c68fa24ee31fb21a50a24 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2325765 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ec: change usage of dummySam Hurst2020-08-057-9/+9
| | | | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the term "dummy" with inclusive alternatives. BUG=b:162781382 BRANCH=None TEST=make -j buildall `grep -ir dummy *` The only results are in "private/nordic_keyboard/sdk8.0.0" which is not our code. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* hooks: Introduce chipset resume init and suspend complete hooksWai-Hong Tam2020-07-305-0/+50
| | | | | | | | | | | | | | | | | | | | | These hooks are only enabled through a new CONFIG. The resume init hook will be used to initialize the SPI driver, which goes to sleep on suspend. Require to initialize it first such that it can receive a host resume event, that notifies the normal resume hook. The suspend complete hook is paired with the resume init hook, which reverts the initialization of the SPI driver. BRANCH=None BUG=b:148149387 TEST=make buildall -j TEST=Build successfully on both default off and defining this CONFIG. Change-Id: I615e2bf92c75f83a7b0ab3eded61a1ef241dbdcf Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321875
* Revert "task: Fix mutex_lock() assert"Edward Hill2020-07-281-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit d53b71c17f7845a591fe4099b53717ec28bf5ccf. Reason for revert: Breaks jump to RW due to assert failing in chip/npcx/flash.c. Reverting while I come up with a better fix. Original change's description: > task: Fix mutex_lock() assert > > mutex_lock() must not be used in interrupt context. Add an assert > to catch this. > > Also add a check for task_start_called() since task ID is not valid > before this. > > Also remove an old assert since comparing id with TASK_ID_INVALID > doesn't make sense. > > BUG=b:160975910 > BRANCH=none > TEST=boot AP > > Signed-off-by: Edward Hill <ecgh@chromium.org> > Change-Id: I1a941fa78849a4efe586e66bb4787aa5a2a67732 > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2309057 > Reviewed-by: Raul E Rangel <rrangel@chromium.org> Bug: b:160975910 b:160208802 b:162302011 Change-Id: Idb38bfc69892fd34a18b9fdc2b46bf8e086f97dd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2323704 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* core: nds32/riscv-rv32i: fix issue of time in exceptions is negativeDino Li2020-07-242-14/+16
| | | | | | | | | | | | | | | | | | | | If 32-bit counter is overflowed in ISR, the high word of the system time (clksrc_high) can't be updated until return from interrupt. So we will get a negative delta time if the overflow occurs between getting start time and end time. This patch fixes the issue. BUG=b:161768286 BRANCH=none TEST=Making a overflow emulation to see what delta time we will get: s = __hw_clock_source_read() = 0xfffffff0; e = __hw_clock_source_read() = 123; e - s = 139; Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I91e6c4d83de3e074388c1a4fc926b05e791b7b47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311997 Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* task: Fix mutex_lock() assertEdward Hill2020-07-241-1/+14
| | | | | | | | | | | | | | | | | | | | mutex_lock() must not be used in interrupt context. Add an assert to catch this. Also add a check for task_start_called() since task ID is not valid before this. Also remove an old assert since comparing id with TASK_ID_INVALID doesn't make sense. BUG=b:160975910 BRANCH=none TEST=boot AP Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I1a941fa78849a4efe586e66bb4787aa5a2a67732 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2309057 Reviewed-by: Raul E Rangel <rrangel@chromium.org>
* ec: change usage of "sane" per inclusive languagePaul Fagerburg2020-07-227-7/+7
| | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the terms "sane", "sanity check", and similar with inclusive/non-stigmatizing alternatives. BUG=b:161832469 BRANCH=None TEST=`make buildall -j` succeeds. `grep -Eir "sane|sanity" .` shows results only in third-party code or documentation. Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: I29e78ab27f84f17b1ded75cfa10868fa4e5ae88c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311169 Reviewed-by: Jett Rink <jettrink@chromium.org>
* riscv-rv32i: correct printf formatEric Yilun Lin2020-07-221-7/+7
| | | | | | | | | | | | | | unsigned integer should use '%u' rather than '%d' BUG=b:161768286 TEST=make BOARD=asurada BRANCH=none Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Change-Id: I84a5419ce813a4378657c4fbfeba967262faef3f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2310220 Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org> Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
* host: Fix task_wait_event() to return TASK_EVENT_TIMEREdward Hill2020-07-131-0/+3
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make -j runhosttests Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ibd753b2eec5d81438dc0884b1a0c12c4c319afe2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2294164 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* core/riscv-rv32i: add atomic_inc and atomic_decTzung-Bi Shih2020-07-031-6/+11
| | | | | | | | | | | | BRANCH=none BUG=b:146213943 TEST=make BOARD=asurada_scp Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: I3d87c9906df1b631fa3733eeae92d356ec287611 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2275710 Reviewed-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* core/riscv-rv32i: set volatile for in_interruptTzung-Bi Shih2020-06-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | Given that: - in_interrupt is modified in interrupt context. - Some normal task context call in_interrupt_context() and in_soft_interrupt_context(). To safely share the variable, sets it to volatile. BRANCH=none BUG=b:146213943 BUG=b:157521370 BUG=b:156223049 TEST=1. make BOARD=asurada 2. flash_ec --board=asurada --image build/asurada/ec.bin 3. (EC console)> version Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: Ibd1bf9556d8376f6f6389a17cc792a6f21227d4f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2237495 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* hooks: Introduce HOOK_CHIPSET_SHUTDOWN_COMPLETEWai-Hong Tam2020-06-066-0/+24
| | | | | | | | | | | | | | | | | | | A new hook HOOK_CHIPSET_SHUTDOWN_COMPLETE is introduced, which are called from the chipset task, while the system has already shut down and all the suspend rails are already off. It will be used for executing pending EC reboot at the chipset shutdown. The EC reboot should be executed when the chipset is completely off. BRANCH=None BUG=b:156981868 TEST=Built all boards. Change-Id: I12f26957e46a1bb34ef079f127b0bddd133cd4e7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2228395 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* core/riscv-rv32i: remove return valuesTzung-Bi Shih2020-06-042-12/+6
| | | | | | | | | | | | | | | | | | Return values of chip_enable_irq(), chip_disable_irq(), and chip_clear_pending_irq() are not using. Removes them. BRANCH=none BUG=b:146213943 BUG=b:157521370 TEST=1. make BOARD=asurada 2. flash_ec --board=asurada --image build/asurada/ec.bin 3. (EC console)> version Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: Ic7e3e80483f76f35bfe7781ddea48515ab8e3361 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227778 Reviewed-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org>
* core/riscv-rv32i: add error handling for chip_get_ec_int()Tzung-Bi Shih2020-06-042-10/+21
| | | | | | | | | | | | | | | | | | chip_get_ec_int() returns -1 if it cannot find the corresponding interrupt source. BRANCH=none BUG=b:146213943 BUG=b:157521370 TEST=1. make BOARD=asurada 2. flash_ec --board=asurada --image build/asurada/ec.bin 3. (EC console)> version Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: I5021ed80f50a99b15d9b9a90a9181077f63bd4be Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227777 Reviewed-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* core/riscv-rv32i: add in_soft_interrupt_context()Tzung-Bi Shih2020-06-031-0/+6
| | | | | | | | | | | | | | BRANCH=none BUG=b:146213943 BUG=b:156218912 TEST=1. make BOARD=asurada 2. flash_ec --board=asurada --image build/asurada/ec.bin 3. (EC console)> version Change-Id: If8df1fb768ea9c83f025d8bd17010481389d7aa1 Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2217596 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* test: Pass commandline arguments to run_testTom Hughes2020-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | run_test is called by the "runtest" console command. Console commands can take arguments, so pass along the arguments to run_test to allow parameters to be passed to run_test. The following command was used for automatic replacement: git grep --name-only 'void run_test(void)' |\ xargs sed -i 's#void run_test(void)#void run_test(int argc, char **argv)##' BRANCH=none BUG=b:155897971 TEST=make buildall -j TEST=Build and flash flash_write_protect test > runtest 1 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Ib20b955d5ec6b98f525c94c24aadefd7a6a320a5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2209418 Reviewed-by: Yicheng Li <yichengli@chromium.org> Commit-Queue: Yicheng Li <yichengli@chromium.org> Tested-by: Yicheng Li <yichengli@chromium.org>
* test: Add on-device test for calculating MPU regions for RWYicheng Li2020-05-303-18/+36
| | | | | | | | | | | | | | | | MPU logic needs to represent RW with no more than 2 MPU regions when locking RW. Add on-device unit test for this calculation. BRANCH=none BUG=b:155410753 TEST=make -j BOARD=bloonchipper TEST=make -j BOARD=nucleo-f412zg test-mpu Then flash the test binary to nucleo board runtest on device ==> Pass Change-Id: Idc746efa9419d31cdae9c6fccc499c92160ac593 Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2218595
* cortex-m: Use MPU REGION_CODE_RAM to lock rollback if neededYicheng Li2020-05-291-1/+1
| | | | | | | | | | | | | | | On chips with only 8 MPUs, we need to lock the rollback with unused MPU regions. Since REGION_STORAGE2 may be used to lock RW, use REGION_CODE_RAM instead. BRANCH=none BUG=b:155410753 TEST=make -j buildall Change-Id: Iec0f33b668474ed539809a319bf94d11cb52f64a Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2219578 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* cortex-m: Lock RW flash using aligned MPU regionsYicheng Li2020-05-291-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | On Cortex-M3, Cortex-M4, and Cortex-M7, the base address used for an MPU region must be aligned to the size of the region: https://developer.arm.com/docs/dui0553/a/cortex-m4-peripherals/optional-memory-protection-unit/mpu-region-base-address-register https://developer.arm.com/docs/dui0552/a/cortex-m3-peripherals/optional-memory-protection-unit/mpu-region-base-address-register https://developer.arm.com/docs/dui0646/a/cortex-m7-peripherals/optional-memory-protection-unit/mpu-region-base-address-register#BABDAHJG Try to represent RW flash using aligned MPU regions before configuring MPU. Otherwise configuring MPU will fail. BRANCH=none BUG=b:155410753 TEST=triggered mpu_lock_rw_flash() on bloonchipper and dartmonkey and checked that configuring MPU succeeded. TEST=on bloonchipper and dartmonkey, verified that the MPU configurations make sense by adding logging. Change-Id: Ib460354ea60e96d7b6ac4a4c12730b0db7c6aaac Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2213132 Reviewed-by: Jett Rink <jettrink@chromium.org>
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