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* Update license boilerplate text in source code filesMike Frysinger2022-09-121-1/+1
| | | | | | | | | | | | | | | Normally we don't do this, but enough changes have accumulated that we're doing a tree-wide one-off update of the name & style. BRANCH=none BUG=chromium:1098010 TEST=`repo upload` works Change-Id: Icd3a1723c20595356af83d190b2c6a9078b3013b Signed-off-by: Mike Frysinger <vapier@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3891203 Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* driver/ppc/sn5s330.c: Format with clang-formatJack Rosenthal2022-06-291-72/+51
| | | | | | | | | | | BUG=b:236386294 BRANCH=none TEST=none Change-Id: I23b01861eeeb75000d0ab46dc82e8aad89be2f2a Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730050 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* sn5s330: return when PP FET cannot be enabledTristan Honscheid2022-03-181-0/+3
| | | | | | | | | | | | | | | | | | Bug fixed identified while writing unit tests: the init function should return an error code when the sn5s330_pp_fet_enable() function fails. The fixed code is the intended behavior according to Aseda (aaboagye@google.com), who wrote the original driver. BRANCH=None BUG=b:225245353 TEST=zmake -D configure --test test-drivers Signed-off-by: Tristan Honscheid <honscheid@google.com> Change-Id: Ib85b67da98832cef6b0f820323eae270392bc4f8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3535000 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* atomic: use atomic_t where it is possibleDawid Niedzwiecki2021-12-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | There are several places where atomic_t can be a type variables that are use with atomic_* operation, so use it. It sometimes has an impact on the asm code, but it is not significant. The change will be useful for incoming commits related to modifying atomic_t caused by a change in Zephyr upstream (atomic_t from int to long). BUG=b:207082842 TEST=make buildall && zmake testall BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I5c7fa6b74b84454b22074a2a00b5f10003ee9843 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3306358 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Dawid Niedzwiecki <dawidn@google.com>
* zephyr: test: sn5s330 set vbus current limit apiAaron Massey2021-12-021-0/+2
| | | | | | | | | | | | | | Verify set_vbus_source_current_limit function correctly sets registers. BRANCH=none BUG=b:203364783 TEST=zmake configure --test test-drivers TEST=make runhosttests Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: I076eb8df42f56a9ed6a7f71df42abec8adc768f9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3311880 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* zephyr: test: sn5s330 dead battery boot initAaron Massey2021-11-221-1/+8
| | | | | | | | | | | | | Verify sn5s330 PP2 are force enabled. BRANCH=none BUG=b:203364783 TEST=zmake configure --test zephyr/test/drivers Signed-off-by: Aaron Massey <aaronmassey@google.com> Change-Id: I118b05140228b89d27790863a3c8ddc62793fedc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3271367 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* ppc: add an interrupt pointer to the ppc driver APIDawid Niedzwiecki2021-11-111-0/+1
| | | | | | | | | | | | | | | Add a pointer to interrupt handler to ppc driver API. It allows calling the pointer from ppc_chips array instead of hardcoded functions. BUG=b:194432779 TEST=build EC for all boards BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I163a8ec91a02f8095d8dca76a56b9c9c91962228 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3270681 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* sn5s330: Set RCP threshold to 3 mV for PP1Scott Collyer2021-10-151-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL adjusts the RCP (reverse current protection) voltage threshold for PP1 to 3 mV when in ideal diode mode. This change fixes an issue on honeybuns for port C0 when connecting to M1 based host machines and charging at higher VBUS values ( > 15V). BRANCH=quiche BUG=b:199339421 TEST=verfied bit 4 of function set 10 register is clear > ppc 0 dump FUNC_SET1 [50h] = 0x05 FUNC_SET2 [51h] = 0x18 FUNC_SET3 [52h] = 0x68 FUNC_SET4 [53h] = 0xfc FUNC_SET5 [54h] = 0x37 FUNC_SET6 [55h] = 0xc1 FUNC_SET7 [56h] = 0x70 FUNC_SET8 [57h] = 0xbd FUNC_SET9 [58h] = 0x34 FUNC_SET10 [59h] = 0x60 ODM partner verified this change fixed the ~3% devices that were failing and did interop testing with other host machines to verify no regressions. Those results are linked in the buganizer issue. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Id798debc11f8586acc6c9feef104478375ee4fea Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3219573 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* driver: ppc: Drop paths from driver/ppc filesSimon Glass2020-12-181-1/+1
| | | | | | | | | | | | | | | These paths don't seem to be necessary and don't currently work with Zephyr. Drop them. BUG=b:175434113 BRANCH=none TEST=build zephyr for volteer emerge-volteer -q chromeos-ec Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I482a4a701265631439e3302c4a360e4cb5dba051 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2595220 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* atomic: rename atomic_read_clear to atomic_clearDawid Niedzwiecki2020-11-021-1/+1
| | | | | | | | | | | | | | | | | Rename atomic_read_clear to atomic_clear to be consistent with the rest of the atomic functions, which return the previous value of the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I2588971bd7687879a28ec637cf5f6c3d27d393f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505143 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* tree: Use new atomic_* implementationDawid Niedzwiecki2020-10-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | It is done as a part of porting to Zephyr. Since the implementation of atomic functions is done for all architectures use atomic_* instead of deprecated_atomic_*. Sometimes there was a compilation error "discards 'volatile' qualifier" due to dropping "volatile" in the argument of the functions, thus some pointers casts need to be made. It shouldn't cause any issues, because we are sure about generated asm (store operation will be performed). BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949 Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* tree: rename atomic_* functions to deprecated_atomic_*Jack Rosenthal2020-09-291-2/+2
| | | | | | | | | | | | | | | | We will move to an API compatible with Zephyr's API. See the bug for complete rationale and plan. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ppc: string de-duplicationKeith Short2020-07-021-31/+30
| | | | | | | | | | | | | | | De-duplicate strings in PPC drivers. Saves 312 bytes on Volteer. Average flash increase of 211 bytes. BUG=b:158572770 BRANCH=none TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I5ca5c935f974b04216ce4d90e6f6d6b9103e8b75 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278586 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* sn5s330: initialize chip after EFS2 sysjumpCaveh Jalali2020-06-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | this fixes an issue where the pcc was not fully initialized as intended due to EFS2 interactions. when EFS2 is enabled, we sysjump to RW very early - before INIT_HOOKS run. any code in pd_task that is predicated by system_jumped_to_this_image() will either always run or never run. this is not the intended behavior. sn5s330_init() is called from ppc_init() which runs as part of initialization done by pd_task(). we now need to check system_jumped_late() instead of system_jumped_to_this_image() to get the intended behavior. BRANCH=none BUG=b:159769490, chromium:1072743 TEST=verified all of sn5s330_init() now runs using additional debug printfs. Change-Id: I3a8e6627e6e57e22b287b3f97bc79b0f3a07e5fa Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2265608 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org>
* ppc/sn5s330: set the deglitch time to 1000 us for PP2James_Chao2020-05-121-4/+8
| | | | | | | | | | | | | | | | | | | | | | | Some type-c device (eg. ASUS MB16ACE) and dongle (eg. Hub-type-c-promate-0001) can't be detect when system resume from S5. After modulating PPC parameter PP1_ILIM_DEGLITCH_0 from 200us to 1ms, those devices can be detect work normally. BUG=b:155109735 BRANCH=octopus TEST=Check the devices can work normally 1.Promate Hub-type-c-promate-0001 2.Apple USB-C Digital AV Multiport Adapter 3.Dell S2718D 4.MONITOR-PHILIPS-258B6QU 5.BENQ EW3270U 6.ASUS MB16ACE,MX27UC 7.LG-34WK95U-W Change-Id: I8a62cb309055b8e64babf1d447eacacc518f9bbd Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2193251 Reviewed-by: Diana Z <dzigterman@chromium.org>
* ppc: Use hard reset to recover from CC overvoltageEdward Hill2019-12-061-66/+27
| | | | | | | | | | | | | | | When sn5s330 PPC detects CC overvoltage, recover via hard reset and don't enable PP2 sink FET directly. Also clean up the interrupt unmasking in sn5s330_init(). BUG=b:144892533 BRANCH=grunt TEST=Do ESD test to trigger CC1/CC2 OVP, device recovers to sink Change-Id: I662bf164b55508be4d5cc1b3ad639c9613bd1935 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949264 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Add a board specific helper to return USB PD port countKarthikeyan Ramasubramanian2019-11-091-1/+1
| | | | | | | | | | | | | | | | | | | | | Certain SKUs of certain boards have less number of USB PD ports than configured in CONFIG_USB_PD_PORT_MAX_COUNT. Hence define an overrideable board specific helper to return the number of USB PD ports. This helps to avoid initiating a PD firmware update in SKUs where there are less number of USB PD ports. Also update charge manager to ensure that absent/ invalid PD ports are skipped during port initialization and management. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS in bobba(2A + 2C config) and garg(2A + 1C + 1HDMI config). Change-Id: Ie345cef470ad878ec443ddf4797e5d17cfe1f61e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879338 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-2/+2
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* helios: Detect PPC sn5s330 CC1/CC2 OVP and release OVP.Michael5 Chen2019-10-141-14/+49
| | | | | | | | | | | | | | | | If PPC have CC OVP protection, check VBUS_GOOD. If VBUS_GOOD is ok, release CC OVP. BUG=b:141587322 BRANCH=Master TEST=Manual Do ESD test to trigger CC1/CC2 OVP. Using EC console command PPC_DUMP to check ppc regiset is correct. Change-Id: I3b817cc1dcec4c14ed4e2098b7ad7582b938f613 Signed-off-by: Michael5 Chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1826098 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* printf: Fix formatting errorsEvan Green2019-10-051-1/+2
| | | | | | | | | | | | | | | | | | | This change fixes the printf formatting errors found by the compile-time prinf format checker. The errors fall into a few categories: 1. Incorrect size specifier (missing or extra l). 2. Missing or extra arguments. 3. Bad line splitting. BUG=chromium:984041 TEST=make -j buildall BRANCH=none Change-Id: I5618097a581210b9fcbfc81560dec050ae30b61c Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819653 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-31/+31
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-42/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-2/+2
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* sn5s330: Add VCONN overcurrent logging.Aseda Aboagye2019-03-261-0/+20
| | | | | | | | | | | | | | | | | | | | | | | The TI SN5S330 has VCONN overcurrent protection and will automatically latch off VCONN if a port overcurrents it. Keeping VCONN latched off is allowed per the USB Type-C spec. This commit simply logs a message on the EC console such that it will be easier to tell when it happens. BUG=none BRANCH=firmware-nocturne-10984.B TEST=flash nocturne, plug in a Type-C adapter which overcurrents VCONN, verify that a console message indicating the overcurrent event is shown. Change-Id: I22da6e8d43ac7739dc213d5a1f049b98d7ee829d Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1328321 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1330162 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* sn5s330: Add support for SBU FET control.Aseda Aboagye2019-03-261-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 has FETs for the SBU lines which need to be controlled by the TCPM. This commit adds a function to control the SBU FETs and enables them when configuring the USB mux. This commit also fixes a bug with the external VBUS current limit setting by setting it appropriately to a min of ~3A. BUG=b:114340064 BRANCH=firmware-nocturne-10984.B TEST=Flash nocturne; plug in hoho; verify that external display is shown. Bounce thru S5, verify that external display still works. TEST=Repeat above with superspeed hub instead. Change-Id: I931f7a47d4eb28e8d9e3cb188601ce0889a44f8d Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1244382 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1530125 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* USB PD: PPC: Add overcurrent handling.Aseda Aboagye2019-01-171-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Type-C Power Path Controllers provide overcurrent protection. This commit adds support into the USB PD task for overcurrent events while we are in source role. The USB PD 3.0 spec recommends that ports issue a hard reset when an overcurrent condition occurs on a port. Additionally, we'll allow a source port to overcurrent 3 times before latching off VBUS from the port entirely. The source path will be re-enabled after ~1s after each overcurrent event. BUG=b:69935262,b:114680657 BRANCH=None TEST=Boot to ChromeOS in grabbiter. No overcurrent events reported when the sink is drawing <= 3.20 A. Overcurrent events are reported when the sink is drawing > 3.25 A. After 3 reports, the port is latched off and power delivery is stopped. The port is re-enabled only after the sink is disconnected. Also when the sink is drawing current at 3.24 A, there is one report of overcurrent. The port gets disabled in response to that event. But the port is re-enabled after 1 second since overcurrent event is reported only once. After the port is re-enabled, the sink is able to draw the set current. When the overcurrent event is reported, I can see in the kernel logs that the overcurrent condition is detected by the kernel. EC Logs: [3391.984462 C1: PPC detected Vbus overcurrent!] [3391.984953 C1: overcurrent!] [3392.044935 C1: PPC detected Vbus overcurrent!] [3392.045425 C1: overcurrent!] [3392.061404 C1: PPC detected Vbus overcurrent!] [3392.061894 C1: overcurrent!] [3392.062142 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.077226 C1: PPC detected Vbus overcurrent!] [3392.077532 C1: overcurrent!] [3392.077891 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.092660 C1: PPC detected Vbus overcurrent!] [3392.092966 C1: overcurrent!] [3392.093213 C1: OC event limit reached! Source path disabled until physical disconnect.] Kernel Logs: [ 3356.560456] usb usb2-port1: over-current condition [ 3356.768434] usb usb2-port2: over-current condition [ 3356.976446] usb usb2-port4: over-current condition [ 3357.184441] usb usb2-port5: over-current condition [ 3357.392445] usb usb2-port6: over-current condition Change-Id: Ib070f261e98264cd88725ebce7d10e0798267e3b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1286300 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/807633 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* SN5S330: treat interrupts as level-sensitiveDiana Z2018-11-131-22/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 PPC will pull its /INT pin low until all interrupts are cleared. Since the interrupt pin is treated as edge-sensitive, its handler needs to provide level-checking before exiting. Otherwise, if not all interrupts are cleared before the handler exits, the EC won't see another edge to call the handler again. Boards which share the PPC interrupt pin with other sources may choose to implement their own callback, if they are able to determine which chip was the source of the interrupt. BUG=b:118846062 BRANCH=None TEST=performed several power swaps and unplugs on a pair of Careenas, verifying that in instances where the handler had to loop around we correctly cleared the interrupts and the "ectool usbpdpower" output was normal Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1327123 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ppc: Increase deglitch time on SN5S330Jonathan Brandmeyer2018-09-141-0/+21
| | | | | | | | | | | | | | | | | | | The default deglitch time is short enough to trip the current limit with some commercially available USB-C -> HDMI adapters. Increase the deglitch timeout to improve compatibility with those adapters. BUG=b:113777138, b:113365815 BRANCH=none TEST=Insert 7 different USB-C to HDMI adapters, including both single-function and multifunction devices, and observe that a Careena clamshell will extend the screen to include the attached monitor on both USB-C ports 0 and 1. Brands tested include SIIG, StarTech, Amazon basics, iogear, Apple, and an unlabeled device. Change-Id: I403e4a65e90c85bdaa8078230751d611d04c9c67 Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1225354 Reviewed-by: Jett Rink <jettrink@chromium.org>
* sn5s330: add low power modeJett Rink2018-08-231-4/+53
| | | | | | | | | | | | | | | | Add a low power mode method for PPCs behind a new config. Implement the low power method for SN5S330 based off of TI AE recommendation. BRANCH=none BUG=b:111520593,b:111006203 TEST=CL stack produce lower power during bip hibernate Change-Id: Icd22f88a8f65c2cd5ab1c95b0750b1eb61e91923 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1166183 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* sn5s330: add helper methods for common access patternJett Rink2018-08-081-58/+41
| | | | | | | | | | | | | | | Reading, toggling bits, and then writing is common in this file, so add helper methods that clean up it up. BRANCH=none BUG=none TEST=PPC operation is unaffected on bip. Change-Id: I97bac3750cc6afff5799fdfa03b05a74bd5334ef Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1166182 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* ppc: sn5s330: Set VCONN ILIM to 0.6A (min).Aseda Aboagye2018-06-191-4/+6
| | | | | | | | | | | | | | | | | | | | | It seems that several charge through hubs have inrush currents that exceed 350mA when VCONN is applied. This in turn causes the SN5S330 to latch off VCONN due to the overcurrent condition. This commit simply sets the VCONN current limit to the 600mA (min) setting. BUG=b:110370179 BRANCH=None TEST=Flash nocturne; Use a variety of charge through hubs, verify that VCONN is not latched off. Change-Id: I7a0e5d1aa7c42d22b43a596520790debee47163b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1105309 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* sn5s330: Track source enabled state locallyEdward Hill2018-06-071-34/+5
| | | | | | | | | | | | | | | | | | | | | | | | | sn5s330_init() will turn off the PP1 (source) FET, but sn5s330_is_sourcing_vbus() can be called before PPC init: by usb_charger_init() and pd_power_supply_reset() from pd_task(). Keep track of the PP1 (source) FET state locally, and use this for sn5s330_is_sourcing_vbus(), instead of reading the state from the PPC chip over I2C every time. This solves the problem of sn5s330_is_sourcing_vbus() being called before sn5s330_init(), and also avoids other problems caused by sn5s330_is_sourcing_vbus() doing I2C communication: crrev.com/c/969701/7/board/cheza/board.c#85 BUG=b:80203727 BRANCH=none TEST=Reboot Grunt EC while one USB-C port is VBUS source. Change-Id: Ie0fdd3d672bc747fcdbb746586149e194165fdac Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1086115 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* sn5s330: disable under voltage protectionJett Rink2018-05-241-1/+9
| | | | | | | | | | | | | | | | | | We need to disable under voltage protection because it prevents us from enabling the sink path when there is not Vbus on the connector side. We need to enable the sink path before we hibernate otherwise there is no power power to get to the charger which will then assert ACOK. Without this we won't wake up with the ACOK wake when USB power is inserted. BRANCH=none BUG=b:79948623 TEST=bip wakes with USB power insertion Change-Id: Idf16a92dacde63cf943ef68b0258b320d11de44c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1070867 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* ppc: flush console regularly during console dumpJett Rink2018-05-241-0/+14
| | | | | | | | | | | | | I noticed data was getting dropped from my console output on bip. Adding the cflush fixes it. BRANCH=none BUG=none TEST=ppc_dump 0 on bip works Change-Id: Ib71cb37c4c8728a7ab958905d3b2627b8c163faa Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1070626
* ppc: sn5s330: Add port number to error messagesScott Collyer2018-05-161-28/+29
| | | | | | | | | | | | | | | | | | This CL adds the port number to the error messages for the TI sn5330 PPC driver. It also adds 'ppc' so that its clear where the messages are coming from. BRANCH=none BUG=b:79640678 TEST=Tested on Bip MLB and verfied that PPC EC console log errors display the port number. Change-Id: I7988e5e4008c005bb1ef9a78331d4a2597fdcb62 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1060105 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* ppc: Add driver for NX20P3483Scott Collyer2018-03-201-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | The NX20P3483 is a USB PD and Type C high voltage sink/source combo switch. This CL adds support for this PPC variant. Unlike the TI SN5S330, the NX20P3483 does not support VCONN and does not need to be informed of CC polarity by the TCPM. To account for these differences, 2 new PPC config options are added and the driver for the TI SN5S330 was modified to include these new options. The SNK/SRC switch mode for the NX20P3483 is controlled by 2 GPIO signals which may be connected the EC or directly to the TCPC. To handle both cases, the ppc_chips structure was modified with a flags, snk_gpio, and src_gpio elements. BUG=b:74206647 BRANCH=none TEST=make -j buildall and verified there are no build errors. Change-Id: Ic4415ab7571b80e7661ea673434eaf4cf1f1fd2d Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/966926 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* sn5s330: Disable vSafe0V interruptsEdward Hill2018-02-091-10/+11
| | | | | | | | | | | | | | | | | | | | | | | Turn off vSafe0V interrupts. They were not being handled or cleared causing the interrupt line to be stuck low after unplugging a USB device. Also don't use read-modify-write for INT_STATUS_REG4 since this would clear the dead battery mode bit before it has been checked. BUG=b:73076662 BRANCH=none TEST=unplug USB device, see USB_C1_SWCTL_INT_ODL=1 TEST=USB2 mouse can be connected multiple times, PPC VBUS detection works, BC1.2 chip turns on and off correctly (USB_C1_BC12_VBUS_ON_L). Change-Id: I96980ee330dd6e5f98e447e5e87f11dd60768a5d Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/909549 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ppc: Add Vconn and CC polarity settings.Aseda Aboagye2018-02-011-0/+36
| | | | | | | | | | | | | | | BUG=b:72292985 BRANCH=None TEST=Flash meowth; Verify with twinkie that Vconn is provided for a sink that requires it. Change-Id: I8168d2e4c46e04810dcf5c2898b2c337424eefec Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/888224 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cleanup: Correcting VBUS discharge commentJett Rink2018-02-011-1/+2
| | | | | | | | | | | BRANCH=none BUG=none TEST=none Change-Id: I0e7f21bd56a796d2261ffafa26f603924ac0d66d Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/896395 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* sn5s330: Enable VBUS interruptsEdward Hill2018-01-311-9/+34
| | | | | | | | | | | | | | | | | | | | | | | | | If the sn5s330 PPC is being used to detect VBUS presence (CONFIG_USB_PD_VBUS_DETECT_PPC), then enable interrupts and call usb_charger_vbus_change when VBUS_GOOD changes. BUG=b:72007153,b:72007492 BRANCH=none TEST=Connect 3A and 1A USB-A chargers to each of Grunt's USB-C ports, check that BC1.2 detection is working: With 1A: > chgsup port=0/1, type=7, cur=500mA, vtg=5000mV, lsm=1 With 3A: > chgsup port=0/1, type=7, cur=2400mA, vtg=5000mV, lsm=1 TEST=Boot Grunt to OS, then connect USB2 mouse or USB3 flash drive to each of Grunt's USB-C ports. Devices do not work due to b:71772180, but gpioget shows EC is setting USB_C0/1_BC12_VBUS_ON_L correctly. Change-Id: Iffc352105a321997adb364b9fbb8bafef248c224 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/887938 Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb pd: Adding PPC vbus discharge pathJett Rink2018-01-311-0/+24
| | | | | | | | | | | | | | Boards with a PPC will use the PPC to discharge the VBUS line instead of the TCPC or GPIO discharge path. BRANCH=none BUG=b:72179253 TEST=Fall time after device removal on grunt within spec now Change-Id: I822923a1cedb32a20efc3610cce4437ade3387f0 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/886563 Reviewed-by: Edward Hill <ecgh@chromium.org>
* ppc: Add API to set Vbus source ILIM.Aseda Aboagye2017-12-131-0/+37
| | | | | | | | | | | | | | | | | | | | The PPC needs to update its Vbus source current limits whenever our policy changes on the PD ports. This commit simply adds and API to do so. BUG=None BRANCH=None TEST=With some extra code to enable 3A out, flash zoombini; Plug in a PD device to a port, verify that it gets 5V @ 3A. Plug in a second device, verify that we re-send new source caps of 5V @ 1.5A. TEST=Repeat above for meowth. Change-Id: Ifa4bc8b7df87f7730f2bcded842906d43171394b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/818335 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ppc: sn5s330: Add interrupt handler.Aseda Aboagye2017-12-121-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | Right now, the only events that are unmasked by default are overcurrent conditions on PP1. This commit adds a simple interrupt handler and introduces a board specific callback when the overcurrent status changes on a port. This way, a board can take whatever action it desires with the notification. BUG=b:69139844 BRANCH=None TEST=Flash zoombini with SN5S330 stuffed. Verify that board boots okay. TEST=With some extra code to setup the interrupt handler, attempt to exceed the current limit set, verify that interrupt handler is called. Reduce the current pulled to under the current limit, verify that the condition is no longer present. CQ-DEPEND=CL:797937 Change-Id: Id3321c5703f9608da895be0ed5841f2fb76e734e Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/797936 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* sn5s330: Add support for Vbus detection.Aseda Aboagye2017-12-061-5/+20
| | | | | | | | | | | | | | | | | | | The SN5S330 has support for detecting when Vbus is present on a port. This commit simply adds an API to query the PPC. BUG=None BRANCH=None TEST=`make -j buildall`. TEST=Flash a board with the SN5S330, with some extra code, verify that Vbus can be detected with this API. Change-Id: I45bf7ff24bcdc447efe12932f51f8094108e29d5 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/791502 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ppc: sn5s330: Fix current limit setting.Aseda Aboagye2017-12-061-7/+17
| | | | | | | | | | | | | | | | | | | | | | | The default sourcing current limit can be set by the following config option: CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT However, the way that this macro was being used was incorrect for the SN5S330 driver. Since, enum values are not known at compile time, the check needs to happen during runtime. This commit makes this change. BUG=None BRANCH=None TEST=Enable CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT on a board that uses the SN5S330, verify that there are no build errors. Change-Id: I04a1fa1e2e42c2f4ba49f1769857a8796b2f0a6f Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/791501 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ppc: Create generic PPC driver framework.Aseda Aboagye2017-12-061-70/+45
| | | | | | | | | | | | | | | | | | | | | This commit introduces a driver framework for power path controllers. It provides some common PPC APIs as well as allowing a board to use multiple different PPCs drivers/parts. This should make it easier to add PPC drivers in the future. BUG=None BRANCH=None TEST=`make -j buildall` TEST=Flash zoombini; verify PPC works as expected. TEST=Flash meowth; verify PPC works as expected. Change-Id: Icfb99f384610590b431456cfd28d4aff18442cb2 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/807630 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ppc: Add common APIs.Aseda Aboagye2017-12-051-0/+25
| | | | | | | | | | | | | | | It'll be easier to add support for new PPCs if we make a generic API. BUG=None BRANCH=None TEST=make -j buildall Change-Id: I9aac1750eb4c163eb2b94aa8975c797f86d0a25a Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/791499 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* ppc: sn5s330: Add API to determine if FET is on.Aseda Aboagye2017-12-051-15/+63
| | | | | | | | | | | | | | | | | | It will be useful to determine if a FET is enabled or not. For example, to determine if we are sourcing power to a downstream device. This commit simply adds an API to check if a FET is enabled or not. BUG=None BRANCH=None TEST=`make -j buildall` Change-Id: I1f8198342cf225ce9a10d218607bcfbe6aef618c Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/791498 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* sn5s330: Clear interrupts and setup masks at init.Aseda Aboagye2017-12-051-2/+90
| | | | | | | | | | | | | | | | | | | | | | | When the SN5S330 is powered initially, there will be certain events set that will assert its interrupt line. As part of the initialization for this part, we should clear all the pending interrupts and setup the masks for the events that we care about. This commit clears all interrupts at init time and masks all interrupts except for overcurrent condition for PP1. BUG=b:69139844 BRANCH=None TEST=Flash zoombini; With nothing plugged in, verify that the interrupt line is deasserted at boot. TEST=Repeat the above test with a charger plugged in. Change-Id: I7acc030184b76d6c38a729cb64658f71e376c819 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/783510 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* driver: ppc: Add support for TI SN5S330.Aseda Aboagye2017-10-231-0/+305
This commit adds a basic driver for the TI SN5S330. This driver just sets up the IC and provides an API to turn on or off the PP2 FET. BUG=b:67663166, b:67663124 BRANCH=None TEST=Enable code for zoombini; Flash a board which has the SN5S330 stuffed; Verify that we're able to perform PD negotiation and negotiate all the way up to 20V. TEST=Boot only on AC. sysjump to RW, verify that board does not brownout. Change-Id: I9c147ee8465eed878843cf902db301d62e8f627e Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/722104 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
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