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* ppc/rt1718s: notify charger task about vbus changeTing Shen2021-07-291-6/+39
| | | | | | | | | | | | | | | | | | | PPC driver is responsible to notify charger task about vbus change. Original driver didn't implementation this. Also make BC1.2 driver correctly enables BC1.2 detection on vbus change. BUG=b:192422592 TEST=manually verify PD and BC1.2 works BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I0bcbe0a1a43d9a9bcae61d69e247829648dd0d7c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3045249 Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com>
* nx20p348x: Fix DB_EXIT flag handlingCaveh Jalali2021-07-281-1/+1
| | | | | | | | | | | | | | | | This fixes a typo where the CTRL_DB_EXIT was being set on the wrong variable. this appears to date back to the very first commit of this driver with chromium:966926. BRANCH=none BUG=b:74206647 TEST=buildall passes Change-Id: I2c389419c09b0bed1e341dcd6ae6d187a698efcd Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058078 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* ppc/nx20p348x: Initialize device control regCaveh Jalali2021-07-221-0/+5
| | | | | | | | | | | | | | | | This initializes the Device Control Register (0x0b) to its power-on reset value. This chip is not connected to the system reset signal, so we need to explicitly set registers to their power-on reset value so we start from the same configuration when we reboot as we do on system power on. BRANCH=none BUG=b:193211352 TEST=charging from another chromebook is reliable now Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I82ce3fd624091b89668a682cb8748af171552d72 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044412
* ppc/nx20p348x: Disable VBUS discharge in sink modeCaveh Jalali2021-07-221-4/+26
| | | | | | | | | | | | | | | | | This explicitly disables VBUS discharge when entering sink mode. According to the vendor, keeping VBUS discharge enabled can cause some noise and that explains some of the instability we had observed when charging from another chromebook and 5V3A charger. BRANCH=none BUG=b:193211352 TEST=charging from another chromebook is reliable now Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I117dd3f7f9efddce00f903c2b290fa85c6052c5d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044411 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* ppc/nx20p348x: Improve nx20p3483 supportstabilize-14093.B-mainCaveh Jalali2021-07-152-85/+145
| | | | | | | | | | | | | | | | | | | | This improves support for the nx20p3483 PPC. The original driver supports both the nx20p3481 as well as nx20p3483, but did not capture some of the differences. VBUS source and sink control has been improved as that is one of the main functional differences between these chips. The nx20p3481 controls these using a switch control register while the nx20p3483 uses external signals from the TCPC. BRANCH=none BUG=b:192370665 TEST=delbin can charge reliably from brya USB3 DB Change-Id: Ic7f90a92f1ead50673157a0255021c49d70e8a80 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3003965 Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* driver/tcpc: implement rt1718s tcpc/ppc driverTing Shen2021-06-012-0/+189
| | | | | | | | | | | | | BUG=b:177391887 TEST=none BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I8f017e21b74c1e27ca7f257b76b0ef74fd0343f2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2639734 Reviewed-by: Eric Yilun Lin <yllin@google.com> Tested-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* NX20P348x: Only check sink bit for sink_enable errorDiana Z2021-05-071-1/+1
| | | | | | | | | | | | | | | | | | | When a port is sourcing (ex. to a dongle), running sink disable on the port will currently return failure because the 5VSRC bit is set. However, sinking has been successfully disabled. Reflect this in the error return by only checking the specific sinking bit in the status register. BRANCH=None BUG=b:187220141 TEST=on guybrush, plug and unplug AC on C0 with a dongle on C1. Verify no failures to disable sinking are present. Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I529d33b41dc4bc55f7c647742c70832a125fd367 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2877866 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* TCPC: Cleanup: Get Sink & SRC state from PD or PPCVijay Hiremath2021-04-211-7/+2
| | | | | | | | | | | | | | Added option to get the Sinking or Sourcing state from either PD or PPC. BUG=none BRANCH=none TEST=make buildall -j Change-Id: Ibb21ef69b5825ea5722ceacd5d7ef6f535aad17c Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2838127 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ppc/syv682x: support C versionEric Yilun Lin2021-04-012-11/+50
| | | | | | | | | | | | | | | | | | | | | | C version won't block I2C accessing to CONTROL4(to on/off Vconn) reg when smart discahrge enabled. This allows us to re-enable the smart discahrge on boards using SYV682C. This CL support the feature by adding: 1. CONFIG_USBC_PPC_SYV682C 2. CONFIG_USBC_PPC_SYV682X_SMART_DISCHARGE also, hayato uses different SYV682 versions across revisions, add a overridable function syv682x_board_is_syv682c() for handling board revision issue. BUG=b:160548079 b:176876036 TEST=Hayato meets tVconnOff, and tVbusDischarge BRANCH=asurada Change-Id: I89b57b8c20907249d5d97140289fb0570bd58b46 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2738506 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* SYV682x: Fix Source OCP for SYV682B revisionEric Herrmann2021-03-312-14/+19
| | | | | | | | | | | | | | | | | | | | Force the EC to wait at least 15ms before checking to see if the alerts are cleared. This will fix source OCP for the SYV682B, which added a 10ms HW deglitch to the source OC alert. BUG=b:183761055 TEST=Check that OCP is triggered instead of TSD when the port is overloaded on SYV682B TEST=Check that the SYV682A OCP still works with 100ms deglitch TEST=make buildall BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: I40207fecc034a8e8238f0deaa7beeaf8dab2a2d6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2787706 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* SYV682: Update Driver for B revision siliconEric Herrmann2021-01-202-69/+60
| | | | | | | | | | | | | | | | | | | | They SYV682B made some meaningful changes to FRS. Update to remove the workaround put in place for the SYV682A and replace with the FRS logic for the SYV682B. The RVS alert can now be masked, so remove the message for an RVS event and repurpose the flag. There are some other changes, but none require driver changes. BUG=b:148144711 TEST=Enable FRS in board config, check that FRS works with with a 5V and 20V supply on a fast and slow-discharge FRS device. BRANCH=none Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: I78e1c7d5eca593661a7d67346c83775ca990e38d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2606508 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* SYV682x: Improve Sink OCP HandlingEric Herrmann2021-01-141-35/+85
| | | | | | | | | | | | | | | | | | | | | | | | Previously the sink OCP was calling the source OCP handler, which is incorrect. Remove that, and replace it with equivalent messages and retries in the driver. Since TSD was previously treated the same as OCP, split that into its own message. There is no PD significance to a sink OCP, so just re-enable the sink path 2 times. The 3rd time disables the sink path and requires a device reconnect. This will make us more robust to non-compliant sources. BUG=b:175444003 TEST=Short PPVAR_VBUS_IN to GND with a 2 ohm resistor on Voxel while charging at 15V. See that OCP is reported 3 times, then disabled. On unplug/replug, make sure it begins sinking again. TEST=make buildall BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: Id5eb04819f1e9e2001e3e68283da09a812faeff3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2612008 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* Create public headers for a few PPC/TCPM driversSimon Glass2021-01-072-28/+3
| | | | | | | | | | | | | | | | | | | | | | At present boards includes the private header of some of the drivers. This is not ideal but it works. For Zephyr we don't really want to access headers in private driver directories. Instead, create public headers for the five drivers needed by the Zephyr volteer build. For now, include the public header in the private header (the one included by the EC code), so that fewer code changes are required. BUG=b:175434113 BRANCH=none TEST=make buildall -j30 (way too verbose to see what is happening) build volteer on zephyr Change-Id: I5b810f53cdf545a885f3977849f9f2ca1d04d60a Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607506 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* tcpm: Move tcpm.h into an include directorySimon Glass2020-12-222-2/+2
| | | | | | | | | | | | | | | | | | This header file is used from quite a few files, relying on the EC build system to find includes in the driver/tcpm directory. For Zephyr we don't want to add that as an include. It makes more sense for header files to be in an include directory, so move it and fix up the users. BUG=b:175434113 BRANCH=none TEST=build Zephyr and ECOS on volteer Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I5851914b1a7d3fdc1ba911c0fbe9046afbaf6f5d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597985 Reviewed-by: Keith Short <keithshort@chromium.org>
* SYV682x: Stop VCONN configuration if there is OVPEric Herrmann2020-12-211-3/+8
| | | | | | | | | | | | | | | | | | | If a VBAT OVP is triggered while VCONN is being configured, a PPC re-init will reset the PPC. But, the VCONN configuration would undo this because it is a RMW. Instead, if VBAT OVP is triggered, don't update the VCONN state. BUG=b:171461736 TEST=On a Voxel which experiences VBAT OVPs, ensure that it recovers from these TEST=make buildall BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: I427c43144c8774627783908c0d921fa170686f7f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2572236 Reviewed-by: Keith Short <keithshort@chromium.org>
* driver: ppc: Drop paths from driver/ppc filesSimon Glass2020-12-184-4/+4
| | | | | | | | | | | | | | | These paths don't seem to be necessary and don't currently work with Zephyr. Drop them. BUG=b:175434113 BRANCH=none TEST=build zephyr for volteer emerge-volteer -q chromeos-ec Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I482a4a701265631439e3302c4a360e4cb5dba051 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2595220 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* SYV682: Disable VCONN on VCONN OCPEric Herrmann2020-12-081-4/+26
| | | | | | | | | | | | | | | | | | | The SYV682 has a 'soft' overcurrent protection on VCONN which current limits to ~600mA. If the cause is a short it will eventually hit thermal shutdown. Instead, we should disable VCONN when we get an OCP event. We must allow current spikes for at least 1ms, so disable with a deglitch. BUG=b:170441866,b:172710638 TEST=make buildall TEST=On Voxel, short VCONN to ground for at least 100ms, then observe that VCONN is disabled and 'VCONN OC!' is printed in the EC console. BRANCH=None Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: I6712543b73072c959597c73cd493f248267a42ae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2572237 Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org>
* syv682x: update OVP warningEric Yilun Lin2020-12-041-1/+1
| | | | | | | | | | | | | | | | The VBAT OVP function is actually protecting the CC lines (if not VCONN SRC), and VBAT (if VCONN SRC). BUG=none TEST=none BRANCH=none Change-Id: I2eda0d2777d7e0facaf7340afe8e500454fc7169 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2573664 Reviewed-by: Ayo Wu <ayowu@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* atomic: rename atomic_read_clear to atomic_clearDawid Niedzwiecki2020-11-024-4/+4
| | | | | | | | | | | | | | | | | Rename atomic_read_clear to atomic_clear to be consistent with the rest of the atomic functions, which return the previous value of the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I2588971bd7687879a28ec637cf5f6c3d27d393f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505143 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* SYV682X: Handle CC OVP eventsEric Herrmann2020-10-311-3/+12
| | | | | | | | | | | | | | | Handle VBAT OVP events by resetting the syv682x and calling the pd handler. BUG=b:171156342 TEST=On Volteer, check that there is a successful PD re-negotiation after shorting VCONN to 20V. BRANCH=none Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: Id7b9d3087aa8fcb17b4eda12c644ac3c5cbe3bc5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2504482 Reviewed-by: Keith Short <keithshort@chromium.org>
* tree: Use new atomic_* implementationDawid Niedzwiecki2020-10-274-11/+10
| | | | | | | | | | | | | | | | | | | | | | | It is done as a part of porting to Zephyr. Since the implementation of atomic functions is done for all architectures use atomic_* instead of deprecated_atomic_*. Sometimes there was a compilation error "discards 'volatile' qualifier" due to dropping "volatile" in the argument of the functions, thus some pointers casts need to be made. It shouldn't cause any issues, because we are sure about generated asm (store operation will be performed). BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949 Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* syv682x: disable smart discharge modeEric Yilun Lin2020-10-261-11/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This config was enabled on CL:2051311. However, with SDSG enabled, the i2c transactions will be blocked until channel transition finished and this takes above 50ms. The extra 50ms stops us from disabling Vconn if we unplug a SNK device which violates tVconnOff timer (35ms). This CL reverts CL:2051311, and control VBUS discharge by EC, and reduce the Vconn off time to 20ms. BUG=b:160548079, b:148870148, b:163143427 TEST=on asurada, and volteer: tested that 1. vbus is discharged within tVbussOff(650ms) when unplug a SNK device. 2. Vconn is off within tVconnOff(35ms) when unplug a SNK device 3. able to source/sink normally across plug/unplug SRC/SNK/DRP devices. 4. discharge FET is disabled when a SRC device is connected. 5. Plug two adapters respectively, and see syv682x's discharge FET are turned off for both ports. BRANCH=none Change-Id: I656c0a912b4196846de03adf2100dbb6dd89e899 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2423665 Tested-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* core: rename atomic_clear to atomic_clear_bitsDawid Niedzwiecki2020-10-061-1/+1
| | | | | | | | | | | | | | | | | | Change the name of atomic_clear to atomic_clear_bits to make to name more clear - the function clears only selected bits, but the name may suggest that it clears the whole variable. It is done as a part of porting to Zephyr, where atomic_clear zeros the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943 Reviewed-by: Jett Rink <jettrink@chromium.org>
* tree: rename atomic_* functions to deprecated_atomic_*Jack Rosenthal2020-09-294-10/+11
| | | | | | | | | | | | | | | | We will move to an API compatible with Zephyr's API. See the bug for complete rationale and plan. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* syv682: Shorten discharge timeAbe Levkoy2020-09-111-1/+1
| | | | | | | | | | | | | | | | | This part ignores I2C writes while discharging VBUS. This effectively elongates transitions out of Attached.SRC by the Type-C state machine to the amount of time required to discharge VBUS. Mitigate this by configuring the shortest possible VBUS discharge time (50 ms). BUG=b:163143427 TEST=Connect Volteer C1 to Volteer C1; observe stable Attached states BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I072888f9ac8d3d06321872a237d9848688eced55 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2401583 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* syv682x: Set SYV682X HV_ILIM depend on sink path.David Huang2020-08-171-0/+2
| | | | | | | | | | | | | Set syv682x HV_ILIM when source path enable. BUG=b:161762373 BRANCH=master TEST=Use ppc_dump <port> to check the setting correct. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I3443762654244e1289700d57acff1c646eb5e66f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2316176 Reviewed-by: Keith Short <keithshort@chromium.org>
* syv682x: set CONFIG_SYV682X_HV_ILIM for set HV_ILIMDavid Huang2020-08-141-1/+1
| | | | | | | | | | | | | | | | Use CONFIG_SYV682X_HV_ILIM for board define default support HV_ILIM value. BUG=b:161762373 BRANCH=master TEST=Use ppc_dump <port> to check the setting correct. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: Ifc37fb273e769e3d3555a04fb1da13946821d19a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315948 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* AOZ1380: initialize srcing/snking flags to reflect hardwareDenis Brockus2020-07-281-0/+11
| | | | | | | | | | | | | | | | | | | The AOZ1380 always started off with not sinking and not sourcing. In a batteryless or dead battery condition this is not true. So making sure we start with an accurate state. BUG=b:162016100 BRANCH=none TEST=trembyle cold boot with only AC power Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ic542e52b3b8d715b7526e7e393ae4f4c40c721ac Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321132 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* syv682X: Add support for FRSEric Herrmann2020-07-171-9/+105
| | | | | | | | | | | | | | | | | | | | | Add interrupt for FRS signal and implement function to enable FRS by setting the FRS gpio. Only the TCPMv2 stack works with FRS. There are 2 workarounds in this CL for this version of the SYV682: 1. Only use the CC trigger when charging at 5V. If charging at greater than vSafe5V, just use VBUS falling to detect an FRS. 2. Use the TCPC CC trigger if available to signal FRS to the TCPM. BUG=b:148144711 TEST=make buildall TEST=After enabling FRS config options, check that FRS occurs and is properly signaled to the TCPM BRANCH=none Change-Id: Icd1ef8902925817ea5948b42f03b292a97a2b5bd Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277209 Reviewed-by: Keith Short <keithshort@chromium.org>
* SYV682X: Add 100ms source current limit deglitchEric Herrmann2020-07-071-61/+84
| | | | | | | | | | | | | | | | | | | | | | The SYV682X source current limit is not a hard current limit, but rather will clamp the current to the setpoint. It still generates an interrupt, but will not cut off the channel until thermal shutdown. Disabling the channel at thermal shutdown isn't acceptable for safety reasons. Instead, disable the channel and signal overcurrent to the TCPM if the overcurrent status remains for 100ms. BUG=b:159161457,b:160335402,b:148144711 TEST=Check that we don't trip overcurrent with devices which spike VBUS TEST=With a load which exceeds the source setpoint, confirm that VBUS is disabled after 100ms +/- 10ms once the current passes the setpoint. TEST=make buildall BRANCH=none Change-Id: I8121b91e9c3b6aa6b9eee05d34012c0ab063bdfc Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277881 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* ppc: string de-duplicationKeith Short2020-07-024-42/+41
| | | | | | | | | | | | | | | De-duplicate strings in PPC drivers. Saves 312 bytes on Volteer. Average flash increase of 211 bytes. BUG=b:158572770 BRANCH=none TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I5ca5c935f974b04216ce4d90e6f6d6b9103e8b75 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278586 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* sn5s330: initialize chip after EFS2 sysjumpCaveh Jalali2020-06-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | this fixes an issue where the pcc was not fully initialized as intended due to EFS2 interactions. when EFS2 is enabled, we sysjump to RW very early - before INIT_HOOKS run. any code in pd_task that is predicated by system_jumped_to_this_image() will either always run or never run. this is not the intended behavior. sn5s330_init() is called from ppc_init() which runs as part of initialization done by pd_task(). we now need to check system_jumped_late() instead of system_jumped_to_this_image() to get the intended behavior. BRANCH=none BUG=b:159769490, chromium:1072743 TEST=verified all of sn5s330_init() now runs using additional debug printfs. Change-Id: I3a8e6627e6e57e22b287b3f97bc79b0f3a07e5fa Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2265608 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org>
* Syv682x: Set 5V source current limit base on the config definitionDavid Huang2020-06-151-1/+11
| | | | | | | | | | | | | | | Add set 5V source current limit in init based on CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT. Default is set to 1.5A if there's no define config. BUG=b:154772847, b:156711950 BRANCH=octopus TEST=connect a sink device with a pd analyzer to see if OC is triggered in PPC when pulling more than 1.75A by external sink device. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I55aae8655703870ea9e023d1a4ddbb9efe1ffd14 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2241076 Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* syv682x: fix chip init sequenceCaveh Jalali2020-05-152-43/+28
| | | | | | | | | | | | | | | | | This fixes a failure mode in the syv682 chip init sequence. Resetting the chip registers using the RST_REG sets the over-voltage threshold to 6V and at the same time enables the high voltage path. It is not unusual for the high voltage channel to carry a high voltage like 15V, so we get an OVP interrupt before finishing our chip init sequence. BRANCH=none BUG=b:156585531 TEST=no more VBUS OVP interrupts Change-Id: Iab19012d390e0c5dd8f2cb726ac45cd14732c6f8 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2201396 Reviewed-by: Keith Short <keithshort@chromium.org>
* ppc/sn5s330: set the deglitch time to 1000 us for PP2James_Chao2020-05-121-4/+8
| | | | | | | | | | | | | | | | | | | | | | | Some type-c device (eg. ASUS MB16ACE) and dongle (eg. Hub-type-c-promate-0001) can't be detect when system resume from S5. After modulating PPC parameter PP1_ILIM_DEGLITCH_0 from 200us to 1ms, those devices can be detect work normally. BUG=b:155109735 BRANCH=octopus TEST=Check the devices can work normally 1.Promate Hub-type-c-promate-0001 2.Apple USB-C Digital AV Multiport Adapter 3.Dell S2718D 4.MONITOR-PHILIPS-258B6QU 5.BENQ EW3270U 6.ASUS MB16ACE,MX27UC 7.LG-34WK95U-W Change-Id: I8a62cb309055b8e64babf1d447eacacc518f9bbd Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2193251 Reviewed-by: Diana Z <dzigterman@chromium.org>
* SYV682: Update PPC initialization for no battery conditionKeith Short2020-04-252-38/+104
| | | | | | | | | | | | | | | | | | | | Perform a more targeted reset action for the SYV682 PPC during initialization. This prevents a brownout of the EC when operating without a battery and also prevents over voltage trips following an EC reset when there was an existing PD contract. BUG=b:153523568 BRANCH=none TEST=make buildall TEST=On Volteer, connect PD charger to C1 port without battery. Verify board boots after issuing cold reset from servo. Test=On Volteer, verify SNK and SRC operation. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ibf4e816ce468792e90d5f9337bc4262b07c831a9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2159083 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Eric Herrmann <eherrmann@chromium.org>
* syv682x: Create interrupt handlerEric Herrmann2020-04-082-1/+153
| | | | | | | | | | | | | | | | | | | | Add interrupt handler to SYV682. All alerts are clear on read, so interrupts must be checked regardless of why the register is being read. It is also very spammy so flags are used to trigger only on rising edges of alerts. BUG=b:149531621 BRANCH=none TEST=make buildall TEST=On Volteer Connect a passive USB C-to-A adapter to the USB4 DB. Short the VBUS and ground pins; make sure the OC event is seen by the EC with the C1 overcurrent console message. Change-Id: I61c1a6b962e60d813adab92fcbd21fbdf838f188 Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057380 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* syv682x: Don't turn off VBUS when disabling sink modeKeith Short2020-02-141-1/+8
| | | | | | | | | | | | | | | | | | When the last charger is removed from the system, boards call ppc_vbus_sink_enable() to disable sink mode on all PD ports. The SYV682 doesn't support turning of VBUS and VCHG independently, so do nothing if if the SYV682 is currently the VBUS source. BUG=b:149428774 BRANCH=none TEST=make buildall TEST=On volteer, connect a charger to C0, connect a SNK device to C1. Disconnect charger and C0 and verify VBUS stays up on C1. Change-Id: I1747b3b19f584b0069134c520bd0ef0453a0a06a Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2053036 Reviewed-by: caveh jalali <caveh@chromium.org>
* syv682x: Enable smart discharge modeKeith Short2020-02-142-30/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | The SYV682A device provides a smart discharge mode that automatically discharges VBUS and VCHG when the channel is shutdown. This works better than the manual dicharge mode which must be explicitly cleared after the discharge completes. This change also adds BUSY detection to the driver and performs a register reset during initialization. BUG=b:148870148, b:148467221 BRANCH=none TEST=make buildall TEST=Verify connection of SRC devices start battery charging, including DRP devices. TEST=Verify SNK devices are detected and reported by the kernel TEST=Measture VBUS discharge times of 20 ms when disconnecting both SNK and SRC devices. TEST=Write non-default value in SYV682 register, reboot EC, verify register updates to default plus EC changes. Change-Id: I54a5367924f3ae5adc473cb4b0a11789476e7bc3 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051311 Reviewed-by: caveh jalali <caveh@chromium.org>
* nx20p3483: vbus_source_enable failure correctionDenis Brockus2020-02-121-30/+32
| | | | | | | | | | | | | | The nx20p3483 can not use the switch status register because TCPCI was used to enable the switch control. BUG=none BRANCH=none TEST=verify on TCPMv2 that USB3.1 gen 2 functions Change-Id: I5681996640568d74b51fdfc2d5dac20a97e4908a Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051010 Reviewed-by: Edward Hill <ecgh@chromium.org>
* syv682x: disable VBUS discharge in sink modeCaveh Jalali2020-02-041-17/+26
| | | | | | | | | | | | | | | | | | | The syv682x needs to have FDSG (force discharge mode) disabled in order to allow charging. BRANCH=none BUG=b:148487130,b:148467221 TEST=verified PD charging works with USB3 daughterboard (crrev.com/c/2013656 needed to enable USB3 board). Change-Id: Ifff20576accf88822228b7bd7b9eeb6b6cff6a6b Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2037097 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org> Tested-by: Eric Herrmann <eherrmann@chromium.org>
* syv682x: fix status register readCaveh Jalali2020-01-141-1/+4
| | | | | | | | | | | | | | | | We were reading CONTROL_1_REG instead of STATUS_REG to check the VSAFE_0V status. This corrects the register being accessed. BRANCH=none BUG=none TEST=volteer boots without a battery Change-Id: I06d0fbc0b9313b809ed43be13138241beca395a5 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1999619 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* aoz1380: ignore false positive over current/tempDenis Brockus2020-01-091-8/+49
| | | | | | | | | | | | | | | | | AOZ1380 can issue an over current/temperature interrupt when we disconnect as source or sink. Ignoring it recovers the issue without having to alert the USB PD stack. If the interrupts hits a second time, don't ignore it. BUG=b:147359722 BRANCH=none TEST=connect/disconnect charger to AOZ1380 attached port Change-Id: I2d3250de91c3607431c64c0a5eaeafa759abdcc0 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1984040 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* ppc: Use hard reset to recover from CC overvoltageEdward Hill2019-12-061-66/+27
| | | | | | | | | | | | | | | When sn5s330 PPC detects CC overvoltage, recover via hard reset and don't enable PP2 sink FET directly. Also clean up the interrupt unmasking in sn5s330_init(). BUG=b:144892533 BRANCH=grunt TEST=Do ESD test to trigger CC1/CC2 OVP, device recovers to sink Change-Id: I662bf164b55508be4d5cc1b3ad639c9613bd1935 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949264 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Add a board specific helper to return USB PD port countKarthikeyan Ramasubramanian2019-11-093-3/+3
| | | | | | | | | | | | | | | | | | | | | Certain SKUs of certain boards have less number of USB PD ports than configured in CONFIG_USB_PD_PORT_MAX_COUNT. Hence define an overrideable board specific helper to return the number of USB PD ports. This helps to avoid initiating a PD firmware update in SKUs where there are less number of USB PD ports. Also update charge manager to ensure that absent/ invalid PD ports are skipped during port initialization and management. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS in bobba(2A + 2C config) and garg(2A + 1C + 1HDMI config). Change-Id: Ie345cef470ad878ec443ddf4797e5d17cfe1f61e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879338 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-014-8/+8
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* helios: Detect PPC sn5s330 CC1/CC2 OVP and release OVP.Michael5 Chen2019-10-142-14/+58
| | | | | | | | | | | | | | | | If PPC have CC OVP protection, check VBUS_GOOD. If VBUS_GOOD is ok, release CC OVP. BUG=b:141587322 BRANCH=Master TEST=Manual Do ESD test to trigger CC1/CC2 OVP. Using EC console command PPC_DUMP to check ppc regiset is correct. Change-Id: I3b817cc1dcec4c14ed4e2098b7ad7582b938f613 Signed-off-by: Michael5 Chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1826098 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* trembyle: board specific fast switch enable/disableDenis Brockus2019-10-091-3/+3
| | | | | | | | | | | | | | | | | Added board specific tcpc FRS enable/disable to work around timing issues that we found with trembyle. Also added some of the bringup debug settings BUG=b:138599218 BRANCH=none TEST=make buildall -j Change-Id: Ia16db22a9c2b3a47a4273ea1350a5ea58b78f5aa Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1847174 Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* ppc: driver changes for FRSDenis Brockus2019-10-081-1/+1
| | | | | | | | | | | | BUG=b:138599955 BRANCH=none TEST=make buildall -j Change-Id: I84f54f4bef9f38bc194e2a45802fb6fcf335e643 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834023 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ppc: add AOZ1380 driverDenis Brockus2019-10-062-0/+159
| | | | | | | | | | | BUG=b:138599218 BRANCH=none TEST=make buildall -j Change-Id: Ib06053b2129623683fece8a63ee182d52cb07422 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1833922 Reviewed-by: Edward Hill <ecgh@chromium.org>
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