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* atomic: rename atomic_read_clear to atomic_clearDawid Niedzwiecki2020-11-024-4/+4
| | | | | | | | | | | | | | | | | Rename atomic_read_clear to atomic_clear to be consistent with the rest of the atomic functions, which return the previous value of the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I2588971bd7687879a28ec637cf5f6c3d27d393f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2505143 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* SYV682X: Handle CC OVP eventsEric Herrmann2020-10-311-3/+12
| | | | | | | | | | | | | | | Handle VBAT OVP events by resetting the syv682x and calling the pd handler. BUG=b:171156342 TEST=On Volteer, check that there is a successful PD re-negotiation after shorting VCONN to 20V. BRANCH=none Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Change-Id: Id7b9d3087aa8fcb17b4eda12c644ac3c5cbe3bc5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2504482 Reviewed-by: Keith Short <keithshort@chromium.org>
* tree: Use new atomic_* implementationDawid Niedzwiecki2020-10-274-11/+10
| | | | | | | | | | | | | | | | | | | | | | | It is done as a part of porting to Zephyr. Since the implementation of atomic functions is done for all architectures use atomic_* instead of deprecated_atomic_*. Sometimes there was a compilation error "discards 'volatile' qualifier" due to dropping "volatile" in the argument of the functions, thus some pointers casts need to be made. It shouldn't cause any issues, because we are sure about generated asm (store operation will be performed). BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949 Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* syv682x: disable smart discharge modeEric Yilun Lin2020-10-261-11/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This config was enabled on CL:2051311. However, with SDSG enabled, the i2c transactions will be blocked until channel transition finished and this takes above 50ms. The extra 50ms stops us from disabling Vconn if we unplug a SNK device which violates tVconnOff timer (35ms). This CL reverts CL:2051311, and control VBUS discharge by EC, and reduce the Vconn off time to 20ms. BUG=b:160548079, b:148870148, b:163143427 TEST=on asurada, and volteer: tested that 1. vbus is discharged within tVbussOff(650ms) when unplug a SNK device. 2. Vconn is off within tVconnOff(35ms) when unplug a SNK device 3. able to source/sink normally across plug/unplug SRC/SNK/DRP devices. 4. discharge FET is disabled when a SRC device is connected. 5. Plug two adapters respectively, and see syv682x's discharge FET are turned off for both ports. BRANCH=none Change-Id: I656c0a912b4196846de03adf2100dbb6dd89e899 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2423665 Tested-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* core: rename atomic_clear to atomic_clear_bitsDawid Niedzwiecki2020-10-061-1/+1
| | | | | | | | | | | | | | | | | | Change the name of atomic_clear to atomic_clear_bits to make to name more clear - the function clears only selected bits, but the name may suggest that it clears the whole variable. It is done as a part of porting to Zephyr, where atomic_clear zeros the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943 Reviewed-by: Jett Rink <jettrink@chromium.org>
* tree: rename atomic_* functions to deprecated_atomic_*Jack Rosenthal2020-09-294-10/+11
| | | | | | | | | | | | | | | | We will move to an API compatible with Zephyr's API. See the bug for complete rationale and plan. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* syv682: Shorten discharge timeAbe Levkoy2020-09-111-1/+1
| | | | | | | | | | | | | | | | | This part ignores I2C writes while discharging VBUS. This effectively elongates transitions out of Attached.SRC by the Type-C state machine to the amount of time required to discharge VBUS. Mitigate this by configuring the shortest possible VBUS discharge time (50 ms). BUG=b:163143427 TEST=Connect Volteer C1 to Volteer C1; observe stable Attached states BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I072888f9ac8d3d06321872a237d9848688eced55 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2401583 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* syv682x: Set SYV682X HV_ILIM depend on sink path.David Huang2020-08-171-0/+2
| | | | | | | | | | | | | Set syv682x HV_ILIM when source path enable. BUG=b:161762373 BRANCH=master TEST=Use ppc_dump <port> to check the setting correct. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I3443762654244e1289700d57acff1c646eb5e66f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2316176 Reviewed-by: Keith Short <keithshort@chromium.org>
* syv682x: set CONFIG_SYV682X_HV_ILIM for set HV_ILIMDavid Huang2020-08-141-1/+1
| | | | | | | | | | | | | | | | Use CONFIG_SYV682X_HV_ILIM for board define default support HV_ILIM value. BUG=b:161762373 BRANCH=master TEST=Use ppc_dump <port> to check the setting correct. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: Ifc37fb273e769e3d3555a04fb1da13946821d19a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315948 Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* AOZ1380: initialize srcing/snking flags to reflect hardwareDenis Brockus2020-07-281-0/+11
| | | | | | | | | | | | | | | | | | | The AOZ1380 always started off with not sinking and not sourcing. In a batteryless or dead battery condition this is not true. So making sure we start with an accurate state. BUG=b:162016100 BRANCH=none TEST=trembyle cold boot with only AC power Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ic542e52b3b8d715b7526e7e393ae4f4c40c721ac Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321132 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* syv682X: Add support for FRSEric Herrmann2020-07-171-9/+105
| | | | | | | | | | | | | | | | | | | | | Add interrupt for FRS signal and implement function to enable FRS by setting the FRS gpio. Only the TCPMv2 stack works with FRS. There are 2 workarounds in this CL for this version of the SYV682: 1. Only use the CC trigger when charging at 5V. If charging at greater than vSafe5V, just use VBUS falling to detect an FRS. 2. Use the TCPC CC trigger if available to signal FRS to the TCPM. BUG=b:148144711 TEST=make buildall TEST=After enabling FRS config options, check that FRS occurs and is properly signaled to the TCPM BRANCH=none Change-Id: Icd1ef8902925817ea5948b42f03b292a97a2b5bd Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277209 Reviewed-by: Keith Short <keithshort@chromium.org>
* SYV682X: Add 100ms source current limit deglitchEric Herrmann2020-07-071-61/+84
| | | | | | | | | | | | | | | | | | | | | | The SYV682X source current limit is not a hard current limit, but rather will clamp the current to the setpoint. It still generates an interrupt, but will not cut off the channel until thermal shutdown. Disabling the channel at thermal shutdown isn't acceptable for safety reasons. Instead, disable the channel and signal overcurrent to the TCPM if the overcurrent status remains for 100ms. BUG=b:159161457,b:160335402,b:148144711 TEST=Check that we don't trip overcurrent with devices which spike VBUS TEST=With a load which exceeds the source setpoint, confirm that VBUS is disabled after 100ms +/- 10ms once the current passes the setpoint. TEST=make buildall BRANCH=none Change-Id: I8121b91e9c3b6aa6b9eee05d34012c0ab063bdfc Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277881 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* ppc: string de-duplicationKeith Short2020-07-024-42/+41
| | | | | | | | | | | | | | | De-duplicate strings in PPC drivers. Saves 312 bytes on Volteer. Average flash increase of 211 bytes. BUG=b:158572770 BRANCH=none TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I5ca5c935f974b04216ce4d90e6f6d6b9103e8b75 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278586 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* sn5s330: initialize chip after EFS2 sysjumpCaveh Jalali2020-06-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | this fixes an issue where the pcc was not fully initialized as intended due to EFS2 interactions. when EFS2 is enabled, we sysjump to RW very early - before INIT_HOOKS run. any code in pd_task that is predicated by system_jumped_to_this_image() will either always run or never run. this is not the intended behavior. sn5s330_init() is called from ppc_init() which runs as part of initialization done by pd_task(). we now need to check system_jumped_late() instead of system_jumped_to_this_image() to get the intended behavior. BRANCH=none BUG=b:159769490, chromium:1072743 TEST=verified all of sn5s330_init() now runs using additional debug printfs. Change-Id: I3a8e6627e6e57e22b287b3f97bc79b0f3a07e5fa Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2265608 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org>
* Syv682x: Set 5V source current limit base on the config definitionDavid Huang2020-06-151-1/+11
| | | | | | | | | | | | | | | Add set 5V source current limit in init based on CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT. Default is set to 1.5A if there's no define config. BUG=b:154772847, b:156711950 BRANCH=octopus TEST=connect a sink device with a pd analyzer to see if OC is triggered in PPC when pulling more than 1.75A by external sink device. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I55aae8655703870ea9e023d1a4ddbb9efe1ffd14 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2241076 Reviewed-by: Marco Chen <marcochen@chromium.org> Commit-Queue: Marco Chen <marcochen@chromium.org>
* syv682x: fix chip init sequenceCaveh Jalali2020-05-152-43/+28
| | | | | | | | | | | | | | | | | This fixes a failure mode in the syv682 chip init sequence. Resetting the chip registers using the RST_REG sets the over-voltage threshold to 6V and at the same time enables the high voltage path. It is not unusual for the high voltage channel to carry a high voltage like 15V, so we get an OVP interrupt before finishing our chip init sequence. BRANCH=none BUG=b:156585531 TEST=no more VBUS OVP interrupts Change-Id: Iab19012d390e0c5dd8f2cb726ac45cd14732c6f8 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2201396 Reviewed-by: Keith Short <keithshort@chromium.org>
* ppc/sn5s330: set the deglitch time to 1000 us for PP2James_Chao2020-05-121-4/+8
| | | | | | | | | | | | | | | | | | | | | | | Some type-c device (eg. ASUS MB16ACE) and dongle (eg. Hub-type-c-promate-0001) can't be detect when system resume from S5. After modulating PPC parameter PP1_ILIM_DEGLITCH_0 from 200us to 1ms, those devices can be detect work normally. BUG=b:155109735 BRANCH=octopus TEST=Check the devices can work normally 1.Promate Hub-type-c-promate-0001 2.Apple USB-C Digital AV Multiport Adapter 3.Dell S2718D 4.MONITOR-PHILIPS-258B6QU 5.BENQ EW3270U 6.ASUS MB16ACE,MX27UC 7.LG-34WK95U-W Change-Id: I8a62cb309055b8e64babf1d447eacacc518f9bbd Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2193251 Reviewed-by: Diana Z <dzigterman@chromium.org>
* SYV682: Update PPC initialization for no battery conditionKeith Short2020-04-252-38/+104
| | | | | | | | | | | | | | | | | | | | Perform a more targeted reset action for the SYV682 PPC during initialization. This prevents a brownout of the EC when operating without a battery and also prevents over voltage trips following an EC reset when there was an existing PD contract. BUG=b:153523568 BRANCH=none TEST=make buildall TEST=On Volteer, connect PD charger to C1 port without battery. Verify board boots after issuing cold reset from servo. Test=On Volteer, verify SNK and SRC operation. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ibf4e816ce468792e90d5f9337bc4262b07c831a9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2159083 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Eric Herrmann <eherrmann@chromium.org>
* syv682x: Create interrupt handlerEric Herrmann2020-04-082-1/+153
| | | | | | | | | | | | | | | | | | | | Add interrupt handler to SYV682. All alerts are clear on read, so interrupts must be checked regardless of why the register is being read. It is also very spammy so flags are used to trigger only on rising edges of alerts. BUG=b:149531621 BRANCH=none TEST=make buildall TEST=On Volteer Connect a passive USB C-to-A adapter to the USB4 DB. Short the VBUS and ground pins; make sure the OC event is seen by the EC with the C1 overcurrent console message. Change-Id: I61c1a6b962e60d813adab92fcbd21fbdf838f188 Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2057380 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* syv682x: Don't turn off VBUS when disabling sink modeKeith Short2020-02-141-1/+8
| | | | | | | | | | | | | | | | | | When the last charger is removed from the system, boards call ppc_vbus_sink_enable() to disable sink mode on all PD ports. The SYV682 doesn't support turning of VBUS and VCHG independently, so do nothing if if the SYV682 is currently the VBUS source. BUG=b:149428774 BRANCH=none TEST=make buildall TEST=On volteer, connect a charger to C0, connect a SNK device to C1. Disconnect charger and C0 and verify VBUS stays up on C1. Change-Id: I1747b3b19f584b0069134c520bd0ef0453a0a06a Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2053036 Reviewed-by: caveh jalali <caveh@chromium.org>
* syv682x: Enable smart discharge modeKeith Short2020-02-142-30/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | The SYV682A device provides a smart discharge mode that automatically discharges VBUS and VCHG when the channel is shutdown. This works better than the manual dicharge mode which must be explicitly cleared after the discharge completes. This change also adds BUSY detection to the driver and performs a register reset during initialization. BUG=b:148870148, b:148467221 BRANCH=none TEST=make buildall TEST=Verify connection of SRC devices start battery charging, including DRP devices. TEST=Verify SNK devices are detected and reported by the kernel TEST=Measture VBUS discharge times of 20 ms when disconnecting both SNK and SRC devices. TEST=Write non-default value in SYV682 register, reboot EC, verify register updates to default plus EC changes. Change-Id: I54a5367924f3ae5adc473cb4b0a11789476e7bc3 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051311 Reviewed-by: caveh jalali <caveh@chromium.org>
* nx20p3483: vbus_source_enable failure correctionDenis Brockus2020-02-121-30/+32
| | | | | | | | | | | | | | The nx20p3483 can not use the switch status register because TCPCI was used to enable the switch control. BUG=none BRANCH=none TEST=verify on TCPMv2 that USB3.1 gen 2 functions Change-Id: I5681996640568d74b51fdfc2d5dac20a97e4908a Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2051010 Reviewed-by: Edward Hill <ecgh@chromium.org>
* syv682x: disable VBUS discharge in sink modeCaveh Jalali2020-02-041-17/+26
| | | | | | | | | | | | | | | | | | | The syv682x needs to have FDSG (force discharge mode) disabled in order to allow charging. BRANCH=none BUG=b:148487130,b:148467221 TEST=verified PD charging works with USB3 daughterboard (crrev.com/c/2013656 needed to enable USB3 board). Change-Id: Ifff20576accf88822228b7bd7b9eeb6b6cff6a6b Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2037097 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org> Tested-by: Eric Herrmann <eherrmann@chromium.org>
* syv682x: fix status register readCaveh Jalali2020-01-141-1/+4
| | | | | | | | | | | | | | | | We were reading CONTROL_1_REG instead of STATUS_REG to check the VSAFE_0V status. This corrects the register being accessed. BRANCH=none BUG=none TEST=volteer boots without a battery Change-Id: I06d0fbc0b9313b809ed43be13138241beca395a5 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1999619 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* aoz1380: ignore false positive over current/tempDenis Brockus2020-01-091-8/+49
| | | | | | | | | | | | | | | | | AOZ1380 can issue an over current/temperature interrupt when we disconnect as source or sink. Ignoring it recovers the issue without having to alert the USB PD stack. If the interrupts hits a second time, don't ignore it. BUG=b:147359722 BRANCH=none TEST=connect/disconnect charger to AOZ1380 attached port Change-Id: I2d3250de91c3607431c64c0a5eaeafa759abdcc0 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1984040 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* ppc: Use hard reset to recover from CC overvoltageEdward Hill2019-12-061-66/+27
| | | | | | | | | | | | | | | When sn5s330 PPC detects CC overvoltage, recover via hard reset and don't enable PP2 sink FET directly. Also clean up the interrupt unmasking in sn5s330_init(). BUG=b:144892533 BRANCH=grunt TEST=Do ESD test to trigger CC1/CC2 OVP, device recovers to sink Change-Id: I662bf164b55508be4d5cc1b3ad639c9613bd1935 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949264 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Add a board specific helper to return USB PD port countKarthikeyan Ramasubramanian2019-11-093-3/+3
| | | | | | | | | | | | | | | | | | | | | Certain SKUs of certain boards have less number of USB PD ports than configured in CONFIG_USB_PD_PORT_MAX_COUNT. Hence define an overrideable board specific helper to return the number of USB PD ports. This helps to avoid initiating a PD firmware update in SKUs where there are less number of USB PD ports. Also update charge manager to ensure that absent/ invalid PD ports are skipped during port initialization and management. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS in bobba(2A + 2C config) and garg(2A + 1C + 1HDMI config). Change-Id: Ie345cef470ad878ec443ddf4797e5d17cfe1f61e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879338 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-014-8/+8
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* helios: Detect PPC sn5s330 CC1/CC2 OVP and release OVP.Michael5 Chen2019-10-142-14/+58
| | | | | | | | | | | | | | | | If PPC have CC OVP protection, check VBUS_GOOD. If VBUS_GOOD is ok, release CC OVP. BUG=b:141587322 BRANCH=Master TEST=Manual Do ESD test to trigger CC1/CC2 OVP. Using EC console command PPC_DUMP to check ppc regiset is correct. Change-Id: I3b817cc1dcec4c14ed4e2098b7ad7582b938f613 Signed-off-by: Michael5 Chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1826098 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* trembyle: board specific fast switch enable/disableDenis Brockus2019-10-091-3/+3
| | | | | | | | | | | | | | | | | Added board specific tcpc FRS enable/disable to work around timing issues that we found with trembyle. Also added some of the bringup debug settings BUG=b:138599218 BRANCH=none TEST=make buildall -j Change-Id: Ia16db22a9c2b3a47a4273ea1350a5ea58b78f5aa Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1847174 Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* ppc: driver changes for FRSDenis Brockus2019-10-081-1/+1
| | | | | | | | | | | | BUG=b:138599955 BRANCH=none TEST=make buildall -j Change-Id: I84f54f4bef9f38bc194e2a45802fb6fcf335e643 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1834023 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ppc: add AOZ1380 driverDenis Brockus2019-10-062-0/+159
| | | | | | | | | | | BUG=b:138599218 BRANCH=none TEST=make buildall -j Change-Id: Ib06053b2129623683fece8a63ee182d52cb07422 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1833922 Reviewed-by: Edward Hill <ecgh@chromium.org>
* printf: Fix formatting errorsEvan Green2019-10-051-1/+2
| | | | | | | | | | | | | | | | | | | This change fixes the printf formatting errors found by the compile-time prinf format checker. The errors fall into a few categories: 1. Incorrect size specifier (missing or extra l). 2. Missing or extra arguments. 3. Bad line splitting. BUG=chromium:984041 TEST=make -j buildall BRANCH=none Change-Id: I5618097a581210b9fcbfc81560dec050ae30b61c Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1819653 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* ppc: initialize vbus current limit on initJett Rink2019-08-131-0/+9
| | | | | | | | | | | | | | | The nx20p348 should also set the initial current limit during its initialization. BRANCH=octopus BUG=b:139110010,b:139201733 TEST=with CL stack, phaser limits both ports to 1.5A Change-Id: I876b32434bd37bf410d546a3d27f0f7ba949d3ea Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1749945 Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-206-59/+59
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-196-71/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-262-4/+4
| | | | | | | | | | | | | | | | | Mechanical replacement of bit operation where operand is a constant. More bit operation exist, but prone to errors. Reveal a bug in npcx: chip/npcx/system-npcx7.c:114:54: error: conversion from 'long unsigned int' to 'uint8_t' {aka 'volatile unsigned char'} changes value from '16777215' to '255' [-Werror=overflow] BUG=None BRANCH=None TEST=None Change-Id: I006614026143fa180702ac0d1cc2ceb1b3c6eeb0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518660 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: replace 1 << digits, with BIT(digits)Gwendal Grignou2019-03-265-67/+67
| | | | | | | | | | | | | | | | Requested for linux integration, use BIT instead of 1 << First step replace bit operation with operand containing only digits. Fix an error in motion_lid try to set bit 31 of a signed integer. BUG=None BRANCH=None TEST=compile Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* sn5s330: Add VCONN overcurrent logging.Aseda Aboagye2019-03-262-0/+28
| | | | | | | | | | | | | | | | | | | | | | | The TI SN5S330 has VCONN overcurrent protection and will automatically latch off VCONN if a port overcurrents it. Keeping VCONN latched off is allowed per the USB Type-C spec. This commit simply logs a message on the EC console such that it will be easier to tell when it happens. BUG=none BRANCH=firmware-nocturne-10984.B TEST=flash nocturne, plug in a Type-C adapter which overcurrents VCONN, verify that a console message indicating the overcurrent event is shown. Change-Id: I22da6e8d43ac7739dc213d5a1f049b98d7ee829d Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1328321 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1330162 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* sn5s330: Add support for SBU FET control.Aseda Aboagye2019-03-261-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 has FETs for the SBU lines which need to be controlled by the TCPM. This commit adds a function to control the SBU FETs and enables them when configuring the USB mux. This commit also fixes a bug with the external VBUS current limit setting by setting it appropriately to a min of ~3A. BUG=b:114340064 BRANCH=firmware-nocturne-10984.B TEST=Flash nocturne; plug in hoho; verify that external display is shown. Bounce thru S5, verify that external display still works. TEST=Repeat above with superspeed hub instead. Change-Id: I931f7a47d4eb28e8d9e3cb188601ce0889a44f8d Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1244382 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1530125 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* driver/ppc/nx20p348.c: Handle overcurrent eventKarthikeyan Ramasubramanian2019-01-171-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the overcurrent event is logged but not handled. Report the overcurrent event to the USB PD framework which in turn will handle the overcurrent event further. BUG=b:115475862 BRANCH=octopus TEST=Boot to ChromeOS in grabbiter. No overcurrent events reported when the sink is drawing <= 3.20 A. Overcurrent events are reported when the sink is drawing > 3.25 A. After 3 reports, the port is latched off and power delivery is stopped. The port is re-enabled only after the sink is disconnected. Also when the sink is drawing current at 3.24 A, there is one report of overcurrent. The port gets disabled in response to that event. But the port is re-enabled after 1 second since overcurrent event is reported only once. After the port is re-enabled, the sink is able to draw the set current. When the overcurrent event is reported, I can see in the kernel logs that the overcurrent condition is detected by the kernel. EC Logs: [3391.984462 C1: PPC detected Vbus overcurrent!] [3391.984953 C1: overcurrent!] [3392.044935 C1: PPC detected Vbus overcurrent!] [3392.045425 C1: overcurrent!] [3392.061404 C1: PPC detected Vbus overcurrent!] [3392.061894 C1: overcurrent!] [3392.062142 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.077226 C1: PPC detected Vbus overcurrent!] [3392.077532 C1: overcurrent!] [3392.077891 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.092660 C1: PPC detected Vbus overcurrent!] [3392.092966 C1: overcurrent!] [3392.093213 C1: OC event limit reached! Source path disabled until physical disconnect.] Kernel Logs: [ 3356.560456] usb usb2-port1: over-current condition [ 3356.768434] usb usb2-port2: over-current condition [ 3356.976446] usb usb2-port4: over-current condition [ 3357.184441] usb usb2-port5: over-current condition [ 3357.392445] usb usb2-port6: over-current condition Change-Id: I0af69a132fdd1dd5bab4d530c3b060b2a5aea501 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/1412448 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* USB PD: PPC: Add overcurrent handling.Aseda Aboagye2019-01-171-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Type-C Power Path Controllers provide overcurrent protection. This commit adds support into the USB PD task for overcurrent events while we are in source role. The USB PD 3.0 spec recommends that ports issue a hard reset when an overcurrent condition occurs on a port. Additionally, we'll allow a source port to overcurrent 3 times before latching off VBUS from the port entirely. The source path will be re-enabled after ~1s after each overcurrent event. BUG=b:69935262,b:114680657 BRANCH=None TEST=Boot to ChromeOS in grabbiter. No overcurrent events reported when the sink is drawing <= 3.20 A. Overcurrent events are reported when the sink is drawing > 3.25 A. After 3 reports, the port is latched off and power delivery is stopped. The port is re-enabled only after the sink is disconnected. Also when the sink is drawing current at 3.24 A, there is one report of overcurrent. The port gets disabled in response to that event. But the port is re-enabled after 1 second since overcurrent event is reported only once. After the port is re-enabled, the sink is able to draw the set current. When the overcurrent event is reported, I can see in the kernel logs that the overcurrent condition is detected by the kernel. EC Logs: [3391.984462 C1: PPC detected Vbus overcurrent!] [3391.984953 C1: overcurrent!] [3392.044935 C1: PPC detected Vbus overcurrent!] [3392.045425 C1: overcurrent!] [3392.061404 C1: PPC detected Vbus overcurrent!] [3392.061894 C1: overcurrent!] [3392.062142 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.077226 C1: PPC detected Vbus overcurrent!] [3392.077532 C1: overcurrent!] [3392.077891 C1: OC event limit reached! Source path disabled until physical disconnect.] [3392.092660 C1: PPC detected Vbus overcurrent!] [3392.092966 C1: overcurrent!] [3392.093213 C1: OC event limit reached! Source path disabled until physical disconnect.] Kernel Logs: [ 3356.560456] usb usb2-port1: over-current condition [ 3356.768434] usb usb2-port2: over-current condition [ 3356.976446] usb usb2-port4: over-current condition [ 3357.184441] usb usb2-port5: over-current condition [ 3357.392445] usb usb2-port6: over-current condition Change-Id: Ib070f261e98264cd88725ebce7d10e0798267e3b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/1286300 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/807633 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ppc/nx20: add more fault condition printsJett Rink2018-11-161-2/+11
| | | | | | | | | | | | | | When the PPC detects a fault condition such as a short or reverse current, we should print something to the EC console. BRANCH=none BUG=b:115307099 TEST=build. Couldn't get this to trip on demand though. Change-Id: Ib5298074b08a7d7d0d278258822fb7edf562c7aa Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1334527 Reviewed-by: Diana Z <dzigterman@chromium.org>
* SN5S330: treat interrupts as level-sensitiveDiana Z2018-11-131-22/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 PPC will pull its /INT pin low until all interrupts are cleared. Since the interrupt pin is treated as edge-sensitive, its handler needs to provide level-checking before exiting. Otherwise, if not all interrupts are cleared before the handler exits, the EC won't see another edge to call the handler again. Boards which share the PPC interrupt pin with other sources may choose to implement their own callback, if they are able to determine which chip was the source of the interrupt. BUG=b:118846062 BRANCH=None TEST=performed several power swaps and unplugs on a pair of Careenas, verifying that in instances where the handler had to loop around we correctly cleared the interrupts and the "ectool usbpdpower" output was normal Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1327123 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Octopus: Vbus gone from USB-C port after cold reboot with USB-A driveDiana Z2018-10-251-8/+13
| | | | | | | | | | | | | | | | | | | | | When Vbus turns on while we're in the process of running nx20p348x_vbus_source_enable(), a sink can incorrectly be detected as a charger. This change moves the initialization of the flag indicating we're attempting to source Vbus, and will restore the previous flag state on failure. BRANCH=None BUG=b:117616479 TEST=on yorp, cold booted with USB key and saw it was not detected as a charger on both ports, cold booted with actual charger to verify it was correctly detected on both ports Change-Id: Ie8de18f4b4cd335118d5d44e1476b0ececbcc029 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1298400 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ppc: syv682x: Add trigger for BC 1.2 when turning src path on/offScott Collyer2018-10-241-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | When using the syv682x PPC for VBUS detection, VBUS changes need to result in a call to usb_charger_vbus_change() which will set an event to wake the USB_CHG_N task. This was being handled when the port was attached as a sink, but was not being done when the port was attached as source. This CL adds a call to usb_charger_vbus_change() when the source path is enabled or disabled. BRANCH=none BUG=b:113267982 TEST=On DragonEgg, connect a USB 2.0 keyboard and verfied that it enumerates. localhost ~ # lsusb Bus 003 Device 003: ID 046d:c31c Logitech, Inc. Keyboard K120 Change-Id: Ie26ad1a062320eb1290fe8c6f6f8b3de8261a03f Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1285295 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ppc: syv682x: Make source disable dependent on VBUS presenceScott Collyer2018-10-231-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The syv682x PPC does not provide independent disabling of the source and sink paths. Instead there is a single bit PWR_ENB, which when set, will disable both the source and sink paths. As part of USB PD initialization, pd_power_supply_reset(0) is called to ensure VBUS isn't being sourced. If the source path isn't currently active, then PWR_ENB bit should not be set as that will also disable the sink path which may be active in a dead battery start up case. This CL modifies the syv682x driver to only set PWR_ENB if the bit in flags is set to indicate that the VBUS was being sourced. BRANCH=none BUG=b:117657778 TEST=Tested on DragonEgg. With no battery, connected external to port 1 and verified that the system boots successfully. Previously, it would lose power. Change-Id: I92b8f86a4b5b4e103dbeeafda2cf8da9ac7c17f2 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1285294 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* syv682x: Support USB changer when VBUS status changesScott Collyer2018-10-021-0/+11
| | | | | | | | | | | | | | | | | | When VBUS changes, the USB charger task needs to be notified. This CL adds a flag to track the value of vbus so when it's checked, a change in status can be determined. BUG=b:113267982 BRANCH=none TEST=Verfied that when external USB charger is connected/removed the USB charger task gets notified with the new current state. Change-Id: I85025586768e68972129fb3438c7e078373c13f4 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1208522 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ppc: Increase deglitch time on SN5S330Jonathan Brandmeyer2018-09-142-0/+28
| | | | | | | | | | | | | | | | | | | The default deglitch time is short enough to trip the current limit with some commercially available USB-C -> HDMI adapters. Increase the deglitch timeout to improve compatibility with those adapters. BUG=b:113777138, b:113365815 BRANCH=none TEST=Insert 7 different USB-C to HDMI adapters, including both single-function and multifunction devices, and observe that a Careena clamshell will extend the screen to include the attached monitor on both USB-C ports 0 and 1. Brands tested include SIIG, StarTech, Amazon basics, iogear, Apple, and an unlabeled device. Change-Id: I403e4a65e90c85bdaa8078230751d611d04c9c67 Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1225354 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ppc: Add support for nx20p3481Scott Collyer2018-09-132-14/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL is an incremental change to the nx20p348x driver to add support for the nx20p3481 ppc. Sink/source modes are controlled via the switch control register instead of gpio signals. Another difference is that the values of mode in register 0x1 are slightly different between the 3481 and 3483. The 3481 needs to use the switch status register to verify whether it's in sink or source mode. This register is now checked for both the 3483 and 3481. A delay is required for the switch status register to reflect the control setting just applied. In addition, the nx20p3481 supports Fast Role Swap (FRS). For FRS, only the detection is supported, and it's assumed that it's caused by the removal of an external charger, not an actual FRS event. BUG=b:111281797 BRANCH=none TEST=Verified on DragonEgg that port acts correctly as a sink. Have not been able to verify source operation. Change-Id: I2fb4200a5d9c3ce460e9b913a5b09441e458bb7e Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1178995 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
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